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ASoC: wm8961: replace codec to component
Now we can replace Codec to Component. Let's do it. Note: xxx_codec_xxx() -> xxx_component_xxx() .idle_bias_off = 0 -> .idle_bias_on = 1 .ignore_pmdown_time = 0 -> .use_pmdown_time = 1 - -> .endianness = 1 - -> .non_legacy_dai_naming = 1 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
7928b2cbe5
commit
ce8d1015a2
1 changed files with 117 additions and 124 deletions
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@ -194,89 +194,89 @@ static bool wm8961_readable(struct device *dev, unsigned int reg)
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static int wm8961_hp_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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u16 hp_reg = snd_soc_read(codec, WM8961_ANALOGUE_HP_0);
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u16 cp_reg = snd_soc_read(codec, WM8961_CHARGE_PUMP_1);
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u16 pwr_reg = snd_soc_read(codec, WM8961_PWR_MGMT_2);
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u16 dcs_reg = snd_soc_read(codec, WM8961_DC_SERVO_1);
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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u16 hp_reg = snd_soc_component_read32(component, WM8961_ANALOGUE_HP_0);
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u16 cp_reg = snd_soc_component_read32(component, WM8961_CHARGE_PUMP_1);
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u16 pwr_reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_2);
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u16 dcs_reg = snd_soc_component_read32(component, WM8961_DC_SERVO_1);
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int timeout = 500;
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if (event & SND_SOC_DAPM_POST_PMU) {
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/* Make sure the output is shorted */
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hp_reg &= ~(WM8961_HPR_RMV_SHORT | WM8961_HPL_RMV_SHORT);
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snd_soc_write(codec, WM8961_ANALOGUE_HP_0, hp_reg);
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snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
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/* Enable the charge pump */
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cp_reg |= WM8961_CP_ENA;
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snd_soc_write(codec, WM8961_CHARGE_PUMP_1, cp_reg);
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snd_soc_component_write(component, WM8961_CHARGE_PUMP_1, cp_reg);
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mdelay(5);
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/* Enable the PGA */
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pwr_reg |= WM8961_LOUT1_PGA | WM8961_ROUT1_PGA;
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snd_soc_write(codec, WM8961_PWR_MGMT_2, pwr_reg);
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snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg);
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/* Enable the amplifier */
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hp_reg |= WM8961_HPR_ENA | WM8961_HPL_ENA;
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snd_soc_write(codec, WM8961_ANALOGUE_HP_0, hp_reg);
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snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
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/* Second stage enable */
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hp_reg |= WM8961_HPR_ENA_DLY | WM8961_HPL_ENA_DLY;
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snd_soc_write(codec, WM8961_ANALOGUE_HP_0, hp_reg);
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snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
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/* Enable the DC servo & trigger startup */
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dcs_reg |=
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WM8961_DCS_ENA_CHAN_HPR | WM8961_DCS_TRIG_STARTUP_HPR |
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WM8961_DCS_ENA_CHAN_HPL | WM8961_DCS_TRIG_STARTUP_HPL;
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dev_dbg(codec->dev, "Enabling DC servo\n");
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dev_dbg(component->dev, "Enabling DC servo\n");
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snd_soc_write(codec, WM8961_DC_SERVO_1, dcs_reg);
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snd_soc_component_write(component, WM8961_DC_SERVO_1, dcs_reg);
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do {
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msleep(1);
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dcs_reg = snd_soc_read(codec, WM8961_DC_SERVO_1);
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dcs_reg = snd_soc_component_read32(component, WM8961_DC_SERVO_1);
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} while (--timeout &&
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dcs_reg & (WM8961_DCS_TRIG_STARTUP_HPR |
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WM8961_DCS_TRIG_STARTUP_HPL));
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if (dcs_reg & (WM8961_DCS_TRIG_STARTUP_HPR |
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WM8961_DCS_TRIG_STARTUP_HPL))
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dev_err(codec->dev, "DC servo timed out\n");
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dev_err(component->dev, "DC servo timed out\n");
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else
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dev_dbg(codec->dev, "DC servo startup complete\n");
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dev_dbg(component->dev, "DC servo startup complete\n");
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/* Enable the output stage */
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hp_reg |= WM8961_HPR_ENA_OUTP | WM8961_HPL_ENA_OUTP;
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snd_soc_write(codec, WM8961_ANALOGUE_HP_0, hp_reg);
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snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
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/* Remove the short on the output stage */
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hp_reg |= WM8961_HPR_RMV_SHORT | WM8961_HPL_RMV_SHORT;
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snd_soc_write(codec, WM8961_ANALOGUE_HP_0, hp_reg);
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snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
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}
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if (event & SND_SOC_DAPM_PRE_PMD) {
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/* Short the output */
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hp_reg &= ~(WM8961_HPR_RMV_SHORT | WM8961_HPL_RMV_SHORT);
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snd_soc_write(codec, WM8961_ANALOGUE_HP_0, hp_reg);
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snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
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/* Disable the output stage */
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hp_reg &= ~(WM8961_HPR_ENA_OUTP | WM8961_HPL_ENA_OUTP);
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snd_soc_write(codec, WM8961_ANALOGUE_HP_0, hp_reg);
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snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
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/* Disable DC offset cancellation */
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dcs_reg &= ~(WM8961_DCS_ENA_CHAN_HPR |
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WM8961_DCS_ENA_CHAN_HPL);
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snd_soc_write(codec, WM8961_DC_SERVO_1, dcs_reg);
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snd_soc_component_write(component, WM8961_DC_SERVO_1, dcs_reg);
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/* Finish up */
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hp_reg &= ~(WM8961_HPR_ENA_DLY | WM8961_HPR_ENA |
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WM8961_HPL_ENA_DLY | WM8961_HPL_ENA);
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snd_soc_write(codec, WM8961_ANALOGUE_HP_0, hp_reg);
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snd_soc_component_write(component, WM8961_ANALOGUE_HP_0, hp_reg);
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/* Disable the PGA */
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pwr_reg &= ~(WM8961_LOUT1_PGA | WM8961_ROUT1_PGA);
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snd_soc_write(codec, WM8961_PWR_MGMT_2, pwr_reg);
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snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg);
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/* Disable the charge pump */
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dev_dbg(codec->dev, "Disabling charge pump\n");
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snd_soc_write(codec, WM8961_CHARGE_PUMP_1,
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dev_dbg(component->dev, "Disabling charge pump\n");
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snd_soc_component_write(component, WM8961_CHARGE_PUMP_1,
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cp_reg & ~WM8961_CP_ENA);
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}
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@ -286,28 +286,28 @@ static int wm8961_hp_event(struct snd_soc_dapm_widget *w,
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static int wm8961_spk_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
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u16 pwr_reg = snd_soc_read(codec, WM8961_PWR_MGMT_2);
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u16 spk_reg = snd_soc_read(codec, WM8961_CLASS_D_CONTROL_1);
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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u16 pwr_reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_2);
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u16 spk_reg = snd_soc_component_read32(component, WM8961_CLASS_D_CONTROL_1);
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if (event & SND_SOC_DAPM_POST_PMU) {
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/* Enable the PGA */
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pwr_reg |= WM8961_SPKL_PGA | WM8961_SPKR_PGA;
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snd_soc_write(codec, WM8961_PWR_MGMT_2, pwr_reg);
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snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg);
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/* Enable the amplifier */
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spk_reg |= WM8961_SPKL_ENA | WM8961_SPKR_ENA;
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snd_soc_write(codec, WM8961_CLASS_D_CONTROL_1, spk_reg);
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snd_soc_component_write(component, WM8961_CLASS_D_CONTROL_1, spk_reg);
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}
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if (event & SND_SOC_DAPM_PRE_PMD) {
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/* Disable the amplifier */
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spk_reg &= ~(WM8961_SPKL_ENA | WM8961_SPKR_ENA);
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snd_soc_write(codec, WM8961_CLASS_D_CONTROL_1, spk_reg);
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snd_soc_component_write(component, WM8961_CLASS_D_CONTROL_1, spk_reg);
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/* Disable the PGA */
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pwr_reg &= ~(WM8961_SPKL_PGA | WM8961_SPKR_PGA);
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snd_soc_write(codec, WM8961_PWR_MGMT_2, pwr_reg);
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snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg);
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}
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return 0;
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@ -505,15 +505,15 @@ static int wm8961_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct wm8961_priv *wm8961 = snd_soc_codec_get_drvdata(codec);
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struct snd_soc_component *component = dai->component;
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struct wm8961_priv *wm8961 = snd_soc_component_get_drvdata(component);
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int i, best, target, fs;
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u16 reg;
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fs = params_rate(params);
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if (!wm8961->sysclk) {
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dev_err(codec->dev, "MCLK has not been specified\n");
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dev_err(component->dev, "MCLK has not been specified\n");
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return -EINVAL;
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}
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@ -524,23 +524,23 @@ static int wm8961_hw_params(struct snd_pcm_substream *substream,
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abs(wm8961_srate[best].rate - fs))
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best = i;
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}
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reg = snd_soc_read(codec, WM8961_ADDITIONAL_CONTROL_3);
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reg = snd_soc_component_read32(component, WM8961_ADDITIONAL_CONTROL_3);
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reg &= ~WM8961_SAMPLE_RATE_MASK;
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reg |= wm8961_srate[best].val;
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snd_soc_write(codec, WM8961_ADDITIONAL_CONTROL_3, reg);
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dev_dbg(codec->dev, "Selected SRATE %dHz for %dHz\n",
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snd_soc_component_write(component, WM8961_ADDITIONAL_CONTROL_3, reg);
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dev_dbg(component->dev, "Selected SRATE %dHz for %dHz\n",
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wm8961_srate[best].rate, fs);
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/* Select a CLK_SYS/fs ratio equal to or higher than required */
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target = wm8961->sysclk / fs;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && target < 64) {
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dev_err(codec->dev,
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dev_err(component->dev,
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"SYSCLK must be at least 64*fs for DAC\n");
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return -EINVAL;
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}
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE && target < 256) {
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dev_err(codec->dev,
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dev_err(component->dev,
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"SYSCLK must be at least 256*fs for ADC\n");
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return -EINVAL;
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}
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@ -550,19 +550,19 @@ static int wm8961_hw_params(struct snd_pcm_substream *substream,
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break;
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}
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if (i == ARRAY_SIZE(wm8961_clk_sys_ratio)) {
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dev_err(codec->dev, "Unable to generate CLK_SYS_RATE\n");
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dev_err(component->dev, "Unable to generate CLK_SYS_RATE\n");
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return -EINVAL;
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}
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dev_dbg(codec->dev, "Selected CLK_SYS_RATE of %d for %d/%d=%d\n",
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dev_dbg(component->dev, "Selected CLK_SYS_RATE of %d for %d/%d=%d\n",
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wm8961_clk_sys_ratio[i].ratio, wm8961->sysclk, fs,
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wm8961->sysclk / fs);
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reg = snd_soc_read(codec, WM8961_CLOCKING_4);
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reg = snd_soc_component_read32(component, WM8961_CLOCKING_4);
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reg &= ~WM8961_CLK_SYS_RATE_MASK;
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reg |= wm8961_clk_sys_ratio[i].val << WM8961_CLK_SYS_RATE_SHIFT;
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snd_soc_write(codec, WM8961_CLOCKING_4, reg);
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snd_soc_component_write(component, WM8961_CLOCKING_4, reg);
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reg = snd_soc_read(codec, WM8961_AUDIO_INTERFACE_0);
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reg = snd_soc_component_read32(component, WM8961_AUDIO_INTERFACE_0);
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reg &= ~WM8961_WL_MASK;
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switch (params_width(params)) {
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case 16:
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@ -579,15 +579,15 @@ static int wm8961_hw_params(struct snd_pcm_substream *substream,
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default:
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return -EINVAL;
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}
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snd_soc_write(codec, WM8961_AUDIO_INTERFACE_0, reg);
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snd_soc_component_write(component, WM8961_AUDIO_INTERFACE_0, reg);
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/* Sloping stop-band filter is recommended for <= 24kHz */
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reg = snd_soc_read(codec, WM8961_ADC_DAC_CONTROL_2);
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reg = snd_soc_component_read32(component, WM8961_ADC_DAC_CONTROL_2);
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if (fs <= 24000)
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reg |= WM8961_DACSLOPE;
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else
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reg &= ~WM8961_DACSLOPE;
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snd_soc_write(codec, WM8961_ADC_DAC_CONTROL_2, reg);
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snd_soc_component_write(component, WM8961_ADC_DAC_CONTROL_2, reg);
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return 0;
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}
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@ -596,25 +596,25 @@ static int wm8961_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq,
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int dir)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct wm8961_priv *wm8961 = snd_soc_codec_get_drvdata(codec);
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u16 reg = snd_soc_read(codec, WM8961_CLOCKING1);
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struct snd_soc_component *component = dai->component;
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struct wm8961_priv *wm8961 = snd_soc_component_get_drvdata(component);
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u16 reg = snd_soc_component_read32(component, WM8961_CLOCKING1);
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if (freq > 33000000) {
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dev_err(codec->dev, "MCLK must be <33MHz\n");
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dev_err(component->dev, "MCLK must be <33MHz\n");
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return -EINVAL;
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}
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if (freq > 16500000) {
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dev_dbg(codec->dev, "Using MCLK/2 for %dHz MCLK\n", freq);
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dev_dbg(component->dev, "Using MCLK/2 for %dHz MCLK\n", freq);
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reg |= WM8961_MCLKDIV;
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freq /= 2;
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} else {
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dev_dbg(codec->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
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dev_dbg(component->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
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reg &= ~WM8961_MCLKDIV;
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}
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snd_soc_write(codec, WM8961_CLOCKING1, reg);
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snd_soc_component_write(component, WM8961_CLOCKING1, reg);
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wm8961->sysclk = freq;
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@ -623,8 +623,8 @@ static int wm8961_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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static int wm8961_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec = dai->codec;
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u16 aif = snd_soc_read(codec, WM8961_AUDIO_INTERFACE_0);
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struct snd_soc_component *component = dai->component;
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u16 aif = snd_soc_component_read32(component, WM8961_AUDIO_INTERFACE_0);
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aif &= ~(WM8961_BCLKINV | WM8961_LRP |
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WM8961_MS | WM8961_FORMAT_MASK);
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@ -684,26 +684,26 @@ static int wm8961_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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return -EINVAL;
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}
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return snd_soc_write(codec, WM8961_AUDIO_INTERFACE_0, aif);
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return snd_soc_component_write(component, WM8961_AUDIO_INTERFACE_0, aif);
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}
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static int wm8961_set_tristate(struct snd_soc_dai *dai, int tristate)
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{
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struct snd_soc_codec *codec = dai->codec;
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u16 reg = snd_soc_read(codec, WM8961_ADDITIONAL_CONTROL_2);
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struct snd_soc_component *component = dai->component;
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u16 reg = snd_soc_component_read32(component, WM8961_ADDITIONAL_CONTROL_2);
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if (tristate)
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reg |= WM8961_TRIS;
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else
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reg &= ~WM8961_TRIS;
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return snd_soc_write(codec, WM8961_ADDITIONAL_CONTROL_2, reg);
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return snd_soc_component_write(component, WM8961_ADDITIONAL_CONTROL_2, reg);
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}
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static int wm8961_digital_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_codec *codec = dai->codec;
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u16 reg = snd_soc_read(codec, WM8961_ADC_DAC_CONTROL_1);
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struct snd_soc_component *component = dai->component;
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u16 reg = snd_soc_component_read32(component, WM8961_ADC_DAC_CONTROL_1);
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if (mute)
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reg |= WM8961_DACMU;
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@ -712,27 +712,27 @@ static int wm8961_digital_mute(struct snd_soc_dai *dai, int mute)
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msleep(17);
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return snd_soc_write(codec, WM8961_ADC_DAC_CONTROL_1, reg);
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return snd_soc_component_write(component, WM8961_ADC_DAC_CONTROL_1, reg);
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}
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static int wm8961_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct snd_soc_component *component = dai->component;
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u16 reg;
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switch (div_id) {
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case WM8961_BCLK:
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reg = snd_soc_read(codec, WM8961_CLOCKING2);
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reg = snd_soc_component_read32(component, WM8961_CLOCKING2);
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reg &= ~WM8961_BCLKDIV_MASK;
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reg |= div;
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snd_soc_write(codec, WM8961_CLOCKING2, reg);
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snd_soc_component_write(component, WM8961_CLOCKING2, reg);
|
||||
break;
|
||||
|
||||
case WM8961_LRCLK:
|
||||
reg = snd_soc_read(codec, WM8961_AUDIO_INTERFACE_2);
|
||||
reg = snd_soc_component_read32(component, WM8961_AUDIO_INTERFACE_2);
|
||||
reg &= ~WM8961_LRCLK_RATE_MASK;
|
||||
reg |= div;
|
||||
snd_soc_write(codec, WM8961_AUDIO_INTERFACE_2, reg);
|
||||
snd_soc_component_write(component, WM8961_AUDIO_INTERFACE_2, reg);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -742,7 +742,7 @@ static int wm8961_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int wm8961_set_bias_level(struct snd_soc_codec *codec,
|
||||
static int wm8961_set_bias_level(struct snd_soc_component *component,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
u16 reg;
|
||||
|
@ -757,36 +757,36 @@ static int wm8961_set_bias_level(struct snd_soc_codec *codec,
|
|||
break;
|
||||
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY) {
|
||||
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
|
||||
/* Enable bias generation */
|
||||
reg = snd_soc_read(codec, WM8961_ANTI_POP);
|
||||
reg = snd_soc_component_read32(component, WM8961_ANTI_POP);
|
||||
reg |= WM8961_BUFIOEN | WM8961_BUFDCOPEN;
|
||||
snd_soc_write(codec, WM8961_ANTI_POP, reg);
|
||||
snd_soc_component_write(component, WM8961_ANTI_POP, reg);
|
||||
|
||||
/* VMID=2*50k, VREF */
|
||||
reg = snd_soc_read(codec, WM8961_PWR_MGMT_1);
|
||||
reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_1);
|
||||
reg &= ~WM8961_VMIDSEL_MASK;
|
||||
reg |= (1 << WM8961_VMIDSEL_SHIFT) | WM8961_VREF;
|
||||
snd_soc_write(codec, WM8961_PWR_MGMT_1, reg);
|
||||
snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
|
||||
}
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_PREPARE) {
|
||||
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE) {
|
||||
/* VREF off */
|
||||
reg = snd_soc_read(codec, WM8961_PWR_MGMT_1);
|
||||
reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_1);
|
||||
reg &= ~WM8961_VREF;
|
||||
snd_soc_write(codec, WM8961_PWR_MGMT_1, reg);
|
||||
snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
|
||||
|
||||
/* Bias generation off */
|
||||
reg = snd_soc_read(codec, WM8961_ANTI_POP);
|
||||
reg = snd_soc_component_read32(component, WM8961_ANTI_POP);
|
||||
reg &= ~(WM8961_BUFIOEN | WM8961_BUFDCOPEN);
|
||||
snd_soc_write(codec, WM8961_ANTI_POP, reg);
|
||||
snd_soc_component_write(component, WM8961_ANTI_POP, reg);
|
||||
|
||||
/* VMID off */
|
||||
reg = snd_soc_read(codec, WM8961_PWR_MGMT_1);
|
||||
reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_1);
|
||||
reg &= ~WM8961_VMIDSEL_MASK;
|
||||
snd_soc_write(codec, WM8961_PWR_MGMT_1, reg);
|
||||
snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
|
||||
}
|
||||
break;
|
||||
|
||||
|
@ -830,51 +830,51 @@ static struct snd_soc_dai_driver wm8961_dai = {
|
|||
.ops = &wm8961_dai_ops,
|
||||
};
|
||||
|
||||
static int wm8961_probe(struct snd_soc_codec *codec)
|
||||
static int wm8961_probe(struct snd_soc_component *component)
|
||||
{
|
||||
u16 reg;
|
||||
|
||||
/* Enable class W */
|
||||
reg = snd_soc_read(codec, WM8961_CHARGE_PUMP_B);
|
||||
reg = snd_soc_component_read32(component, WM8961_CHARGE_PUMP_B);
|
||||
reg |= WM8961_CP_DYN_PWR_MASK;
|
||||
snd_soc_write(codec, WM8961_CHARGE_PUMP_B, reg);
|
||||
snd_soc_component_write(component, WM8961_CHARGE_PUMP_B, reg);
|
||||
|
||||
/* Latch volume update bits (right channel only, we always
|
||||
* write both out) and default ZC on. */
|
||||
reg = snd_soc_read(codec, WM8961_ROUT1_VOLUME);
|
||||
snd_soc_write(codec, WM8961_ROUT1_VOLUME,
|
||||
reg = snd_soc_component_read32(component, WM8961_ROUT1_VOLUME);
|
||||
snd_soc_component_write(component, WM8961_ROUT1_VOLUME,
|
||||
reg | WM8961_LO1ZC | WM8961_OUT1VU);
|
||||
snd_soc_write(codec, WM8961_LOUT1_VOLUME, reg | WM8961_LO1ZC);
|
||||
reg = snd_soc_read(codec, WM8961_ROUT2_VOLUME);
|
||||
snd_soc_write(codec, WM8961_ROUT2_VOLUME,
|
||||
snd_soc_component_write(component, WM8961_LOUT1_VOLUME, reg | WM8961_LO1ZC);
|
||||
reg = snd_soc_component_read32(component, WM8961_ROUT2_VOLUME);
|
||||
snd_soc_component_write(component, WM8961_ROUT2_VOLUME,
|
||||
reg | WM8961_SPKRZC | WM8961_SPKVU);
|
||||
snd_soc_write(codec, WM8961_LOUT2_VOLUME, reg | WM8961_SPKLZC);
|
||||
snd_soc_component_write(component, WM8961_LOUT2_VOLUME, reg | WM8961_SPKLZC);
|
||||
|
||||
reg = snd_soc_read(codec, WM8961_RIGHT_ADC_VOLUME);
|
||||
snd_soc_write(codec, WM8961_RIGHT_ADC_VOLUME, reg | WM8961_ADCVU);
|
||||
reg = snd_soc_read(codec, WM8961_RIGHT_INPUT_VOLUME);
|
||||
snd_soc_write(codec, WM8961_RIGHT_INPUT_VOLUME, reg | WM8961_IPVU);
|
||||
reg = snd_soc_component_read32(component, WM8961_RIGHT_ADC_VOLUME);
|
||||
snd_soc_component_write(component, WM8961_RIGHT_ADC_VOLUME, reg | WM8961_ADCVU);
|
||||
reg = snd_soc_component_read32(component, WM8961_RIGHT_INPUT_VOLUME);
|
||||
snd_soc_component_write(component, WM8961_RIGHT_INPUT_VOLUME, reg | WM8961_IPVU);
|
||||
|
||||
/* Use soft mute by default */
|
||||
reg = snd_soc_read(codec, WM8961_ADC_DAC_CONTROL_2);
|
||||
reg = snd_soc_component_read32(component, WM8961_ADC_DAC_CONTROL_2);
|
||||
reg |= WM8961_DACSMM;
|
||||
snd_soc_write(codec, WM8961_ADC_DAC_CONTROL_2, reg);
|
||||
snd_soc_component_write(component, WM8961_ADC_DAC_CONTROL_2, reg);
|
||||
|
||||
/* Use automatic clocking mode by default; for now this is all
|
||||
* we support.
|
||||
*/
|
||||
reg = snd_soc_read(codec, WM8961_CLOCKING_3);
|
||||
reg = snd_soc_component_read32(component, WM8961_CLOCKING_3);
|
||||
reg &= ~WM8961_MANUAL_MODE;
|
||||
snd_soc_write(codec, WM8961_CLOCKING_3, reg);
|
||||
snd_soc_component_write(component, WM8961_CLOCKING_3, reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
static int wm8961_resume(struct snd_soc_codec *codec)
|
||||
static int wm8961_resume(struct snd_soc_component *component)
|
||||
{
|
||||
snd_soc_cache_sync(codec);
|
||||
snd_soc_component_cache_sync(component);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -882,20 +882,21 @@ static int wm8961_resume(struct snd_soc_codec *codec)
|
|||
#define wm8961_resume NULL
|
||||
#endif
|
||||
|
||||
static const struct snd_soc_codec_driver soc_codec_dev_wm8961 = {
|
||||
.probe = wm8961_probe,
|
||||
.resume = wm8961_resume,
|
||||
.set_bias_level = wm8961_set_bias_level,
|
||||
.suspend_bias_off = true,
|
||||
|
||||
.component_driver = {
|
||||
.controls = wm8961_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8961_snd_controls),
|
||||
.dapm_widgets = wm8961_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8961_dapm_widgets),
|
||||
.dapm_routes = audio_paths,
|
||||
.num_dapm_routes = ARRAY_SIZE(audio_paths),
|
||||
},
|
||||
static const struct snd_soc_component_driver soc_component_dev_wm8961 = {
|
||||
.probe = wm8961_probe,
|
||||
.resume = wm8961_resume,
|
||||
.set_bias_level = wm8961_set_bias_level,
|
||||
.controls = wm8961_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8961_snd_controls),
|
||||
.dapm_widgets = wm8961_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8961_dapm_widgets),
|
||||
.dapm_routes = audio_paths,
|
||||
.num_dapm_routes = ARRAY_SIZE(audio_paths),
|
||||
.suspend_bias_off = 1,
|
||||
.idle_bias_on = 1,
|
||||
.use_pmdown_time = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct regmap_config wm8961_regmap = {
|
||||
|
@ -961,19 +962,12 @@ static int wm8961_i2c_probe(struct i2c_client *i2c,
|
|||
|
||||
i2c_set_clientdata(i2c, wm8961);
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8961, &wm8961_dai, 1);
|
||||
ret = devm_snd_soc_register_component(&i2c->dev,
|
||||
&soc_component_dev_wm8961, &wm8961_dai, 1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8961_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id wm8961_i2c_id[] = {
|
||||
{ "wm8961", 0 },
|
||||
{ }
|
||||
|
@ -985,7 +979,6 @@ static struct i2c_driver wm8961_i2c_driver = {
|
|||
.name = "wm8961",
|
||||
},
|
||||
.probe = wm8961_i2c_probe,
|
||||
.remove = wm8961_i2c_remove,
|
||||
.id_table = wm8961_i2c_id,
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in a new issue