mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-27 12:57:53 +00:00
This pull request contains Broadcom SoCs Device Tree changes for 6.12,
please pull the following: - Krzysztof documents the AVS monitor binding present on 2711 (Raspberry Pi 4) - Rafal updates the Broadcom Northstar DTS files to use the recent NVMEM binding - Artur factors the nodes between the BCM21664 and BCM23550 SoCs since they are nearly identical - Stefan converts the bcm2835-system-timer and bcm2836-l1-intc to a YAML binding syntax -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmbZ48EACgkQh9CWnEQH BwTAexAAz8usfam1HCq1HC611CGcdPAv/twpi+E3edRVKu/ZM+DX6GxUC9MyCAcw GKN6Y4sn8cFSs2dPgIS0OqM65PSZhxcCiTVoSkBG17/IFWv8pwJyiPbYatt5oalS cqIuDnagA35ff2XA1/gU5ymbDF0MN9/XwtzkZ+eznF7weFs4BrOH4cvQZeggSQj/ OBy9s4QWrbEbZz/Lzw9tIG+dRGGO037IqhgEUAcagKG9Qg1YvPPi/xtGR+yguJ4n g5exzJw9vLWeiBagrL7YXzWrEnKK0aql+XlutbJpyUhRV1spxigQ3NMCeglHawRC Ra09zVWou6sXdyzzatO7UVtpzjR66XiAiG6yqICfnVl54rsBj6OjnFeVfobzkTEm 6HqiSNlHLGQAo6H5tH7wwE4Kp1yvj1mMvy4l7TF/E3D3cp4vmKleYHdtZmHoiOAH E9V7GIKyTTU+q19RI5Aq0gIKk48rMJsaXfalE8Cdb/HOGZ/DC7yOitBEVIaU7a6e a9zDZPVv0XJ3od+ifKHny4sdcAE/FdrgVrsiJPzbxTZReLJ4w+YiD4NO7Qbeiu77 RgiMxzLKdDDQdVf5wKGrqEZmh/NO3wLzBjRDxzWj0JW/ZCZ8iSclaO2sRYJa3L/Q zWc+peCanRKcIuO6X4M3XqH0Ot7ekjTTraF1ZQAxqlb8LSXK4Ws= =pLbU -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmbhVpEACgkQYKtH/8kJ UifgOg//bCawzXYiC7XzS2v1KJAayVfW8D02Ff70c1YQnn89cUcJx1gUbMG49Cdh UXBFnSikZvsGiiij136niLSjByL1K7hEvfetpPAd1+/2jOEi8Sbg6csfwTUkP5jl fIUKsbLuPwRbiT/48Bpgpvx+zGlAGHNU/fB4VAq0FEIZzUxppL8eR4bZY9rVq1yk oPxHrHVNcV1WPibzm4r3ENINWgjXb736MrvZ03EJ57Q5Mu4XULALUMFjEXoybH2k 922QZpPK2sgHIxljgKff3CuaHfukgXgAN2rSBARjNOTcAAdg6YGPtzS9uKoFzJ2U qKKr/L4VJlqRKqtskfRMK+DZs0VEK2eahN/dTP2pYNdtpEpLSM50fv/sBTAGwhJe nGalBhARUie1IVloBazMTpdSIbYteBtB+BHbjEFGyblEJADVCFGSx9LDFP2x96QE X+HFeG/r8+BOnx8vFtn6rvM3lpmSxZZ9OPeQWEcCYms31XN/F4MzlhjYA9mvia5m //l+IPE8myaHd8JoNJLqUtvk3Y8IBhjkXg3Qlxhq3bbakssmdK0zrmhyY3EjB2RR Sg/pGf0PnDYL4ppDWixREeIDty2MMW1GXR0YwoVPNJxWLFB81rRsAjsLRRxIQTQt pt1677g1swERmZF0e8/lH4QEwuyyLPjJ5TTUp0DoGzuaAF85tPg= =S1tP -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-6.12/devicetree' of https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom SoCs Device Tree changes for 6.12, please pull the following: - Krzysztof documents the AVS monitor binding present on 2711 (Raspberry Pi 4) - Rafal updates the Broadcom Northstar DTS files to use the recent NVMEM binding - Artur factors the nodes between the BCM21664 and BCM23550 SoCs since they are nearly identical - Stefan converts the bcm2835-system-timer and bcm2836-l1-intc to a YAML binding syntax * tag 'arm-soc/for-6.12/devicetree' of https://github.com/Broadcom/stblinux: dt-bindings: interrupt-controller: convert bcm2836-l1-intc to yaml dt-bindings: timer: convert bcm2835-system-timer bindings to YAML ARM: dts: bcm-mobile: Split out nodes used by both BCM21664 and BCM23550 ARM: dts: broadcom: bcm21664: Move chosen node into Garnet DTS ARM: dts: broadcom: convert NVMEM content to layout syntax dt-bindings: soc: bcm: document brcm,bcm2711-avs-monitor Link: https://lore.kernel.org/r/20240906180643.2275460-1-florian.fainelli@broadcom.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
ceb7d8adf6
11 changed files with 572 additions and 738 deletions
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@ -1,37 +0,0 @@
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BCM2836 per-CPU interrupt controller
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The BCM2836 has a per-cpu interrupt controller for the timer, PMU
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events, and SMP IPIs. One of the CPUs may receive interrupts for the
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peripheral (GPU) events, which chain to the BCM2835-style interrupt
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controller.
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Required properties:
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- compatible: Should be "brcm,bcm2836-l1-intc"
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- reg: Specifies base physical address and size of the
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registers
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- interrupt-controller: Identifies the node as an interrupt controller
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt source. The value shall be 2
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Please refer to interrupts.txt in this directory for details of the common
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Interrupt Controllers bindings used by client devices.
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The interrupt sources are as follows:
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0: CNTPSIRQ
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1: CNTPNSIRQ
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2: CNTHPIRQ
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3: CNTVIRQ
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8: GPU_FAST
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9: PMU_FAST
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Example:
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local_intc: local_intc {
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compatible = "brcm,bcm2836-l1-intc";
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reg = <0x40000000 0x100>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&local_intc>;
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};
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@ -0,0 +1,51 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2836-l1-intc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: BCM2836 per-CPU interrupt controller
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maintainers:
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- Stefan Wahren <wahrenst@gmx.net>
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- Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
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description:
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The BCM2836 has a per-cpu interrupt controller for the timer, PMU
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events, and SMP IPIs. One of the CPUs may receive interrupts for the
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peripheral (GPU) events, which chain to the BCM2835-style interrupt
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controller.
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allOf:
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- $ref: /schemas/interrupt-controller.yaml#
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properties:
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compatible:
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const: brcm,bcm2836-l1-intc
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reg:
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maxItems: 1
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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required:
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- compatible
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- reg
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- interrupt-controller
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- '#interrupt-cells'
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additionalProperties: false
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examples:
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- |
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local_intc: interrupt-controller@40000000 {
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compatible = "brcm,bcm2836-l1-intc";
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reg = <0x40000000 0x100>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&local_intc>;
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};
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...
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@ -0,0 +1,44 @@
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/bcm/brcm,bcm2711-avs-monitor.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Broadcom AVS Monitor
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maintainers:
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- Stefan Wahren <wahrenst@gmx.net>
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properties:
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compatible:
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items:
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- const: brcm,bcm2711-avs-monitor
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- const: syscon
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- const: simple-mfd
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reg:
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maxItems: 1
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thermal:
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$ref: /schemas/thermal/brcm,avs-ro-thermal.yaml
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description: Broadcom AVS ring oscillator thermal
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required:
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- compatible
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- reg
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- thermal
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additionalProperties: false
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examples:
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- |
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avs-monitor@7d5d2000 {
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compatible = "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd";
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reg = <0x7d5d2000 0xf00>;
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thermal: thermal {
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compatible = "brcm,bcm2711-thermal";
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#thermal-sensor-cells = <0>;
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};
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};
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...
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@ -1,22 +0,0 @@
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BCM2835 System Timer
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The System Timer peripheral provides four 32-bit timer channels and a
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single 64-bit free running counter. Each channel has an output compare
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register, which is compared against the 32 least significant bits of the
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free running counter values, and generates an interrupt.
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Required properties:
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- compatible : should be "brcm,bcm2835-system-timer"
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- reg : Specifies base physical address and size of the registers.
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- interrupts : A list of 4 interrupt sinks; one per timer channel.
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- clock-frequency : The frequency of the clock that drives the counter, in Hz.
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Example:
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timer {
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compatible = "brcm,bcm2835-system-timer";
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reg = <0x7e003000 0x1000>;
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interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
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clock-frequency = <1000000>;
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};
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@ -0,0 +1,50 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/timer/brcm,bcm2835-system-timer.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: BCM2835 System Timer
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maintainers:
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- Stefan Wahren <wahrenst@gmx.net>
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- Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
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description:
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The System Timer peripheral provides four 32-bit timer channels and a
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single 64-bit free running counter. Each channel has an output compare
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register, which is compared against the 32 least significant bits of the
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free running counter values, and generates an interrupt.
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properties:
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compatible:
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const: brcm,bcm2835-system-timer
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: System Timer Compare 0 match (used by VideoCore GPU)
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- description: System Timer Compare 1 match (usable for ARM core)
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- description: System Timer Compare 2 match (used by VideoCore GPU)
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- description: System Timer Compare 3 match (usable for ARM core)
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clock-frequency: true
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required:
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- compatible
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- reg
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- interrupts
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additionalProperties: false
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examples:
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- |
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timer@7e003000 {
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compatible = "brcm,bcm2835-system-timer";
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reg = <0x7e003000 0x1000>;
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interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
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clock-frequency = <1000000>;
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};
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...
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@ -11,6 +11,10 @@ / {
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model = "BCM21664 Garnet board";
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compatible = "brcm,bcm21664-garnet", "brcm,bcm21664";
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x40000000>; /* 1 GB */
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@ -1,21 +1,11 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// Copyright (C) 2014 Broadcom Corporation
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#include <dt-bindings/clock/bcm21664.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "bcm2166x-common.dtsi"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "BCM21664 SoC";
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compatible = "brcm,bcm21664";
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interrupt-parent = <&gic>;
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -34,312 +24,46 @@ cpu1: cpu@1 {
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reg = <1>;
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};
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};
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gic: interrupt-controller@3ff00100 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x3ff01000 0x1000>,
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<0x3ff00100 0x100>;
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};
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smc@3404e000 {
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compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
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reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
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};
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uartb: serial@3e000000 {
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compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
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reg = <0x3e000000 0x118>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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status = "disabled";
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};
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uartb2: serial@3e001000 {
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compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
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reg = <0x3e001000 0x118>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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status = "disabled";
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};
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uartb3: serial@3e002000 {
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compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
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reg = <0x3e002000 0x118>;
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clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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status = "disabled";
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};
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L2: cache-controller@3ff20000 {
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compatible = "arm,pl310-cache";
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reg = <0x3ff20000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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brcm,resetmgr@35001f00 {
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compatible = "brcm,bcm21664-resetmgr";
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reg = <0x35001f00 0x24>;
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};
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timer@35006000 {
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compatible = "brcm,kona-timer";
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reg = <0x35006000 0x1c>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
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};
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gpio: gpio@35003000 {
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compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
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reg = <0x35003000 0x524>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
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<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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sdio1: mmc@3f180000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f180000 0x801c>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
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status = "disabled";
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};
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sdio2: mmc@3f190000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f190000 0x801c>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
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status = "disabled";
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};
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sdio3: mmc@3f1a0000 {
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compatible = "brcm,kona-sdhci";
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reg = <0x3f1a0000 0x801c>;
|
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio4: mmc@3f1b0000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x3f1b0000 0x801c>;
|
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc1: i2c@3e016000 {
|
||||
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
|
||||
reg = <0x3e016000 0x70>;
|
||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc2: i2c@3e017000 {
|
||||
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
|
||||
reg = <0x3e017000 0x70>;
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc3: i2c@3e018000 {
|
||||
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
|
||||
reg = <0x3e018000 0x70>;
|
||||
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc4: i2c@3e01c000 {
|
||||
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
|
||||
reg = <0x3e01c000 0x70>;
|
||||
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
/*
|
||||
* Fixed clocks are defined before CCUs whose
|
||||
* clocks may depend on them.
|
||||
*/
|
||||
|
||||
ref_32k_clk: ref_32k {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
bbl_32k_clk: bbl_32k {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
ref_13m_clk: ref_13m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <13000000>;
|
||||
};
|
||||
|
||||
var_13m_clk: var_13m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <13000000>;
|
||||
};
|
||||
|
||||
dft_19_5m_clk: dft_19_5m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <19500000>;
|
||||
};
|
||||
|
||||
ref_crystal_clk: ref_crystal {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <26000000>;
|
||||
};
|
||||
|
||||
ref_52m_clk: ref_52m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
var_52m_clk: var_52m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
usb_otg_ahb_clk: usb_otg_ahb {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
ref_96m_clk: ref_96m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <96000000>;
|
||||
};
|
||||
|
||||
var_96m_clk: var_96m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <96000000>;
|
||||
};
|
||||
|
||||
ref_104m_clk: ref_104m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <104000000>;
|
||||
};
|
||||
|
||||
var_104m_clk: var_104m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <104000000>;
|
||||
};
|
||||
|
||||
ref_156m_clk: ref_156m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <156000000>;
|
||||
};
|
||||
|
||||
var_156m_clk: var_156m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <156000000>;
|
||||
};
|
||||
|
||||
root_ccu: root_ccu@35001000 {
|
||||
compatible = "brcm,bcm21664-root-ccu";
|
||||
reg = <0x35001000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "frac_1m";
|
||||
};
|
||||
|
||||
aon_ccu: aon_ccu@35002000 {
|
||||
compatible = "brcm,bcm21664-aon-ccu";
|
||||
reg = <0x35002000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "hub_timer";
|
||||
};
|
||||
|
||||
master_ccu: master_ccu@3f001000 {
|
||||
compatible = "brcm,bcm21664-master-ccu";
|
||||
reg = <0x3f001000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "sdio1",
|
||||
"sdio2",
|
||||
"sdio3",
|
||||
"sdio4",
|
||||
"sdio1_sleep",
|
||||
"sdio2_sleep",
|
||||
"sdio3_sleep",
|
||||
"sdio4_sleep";
|
||||
};
|
||||
|
||||
slave_ccu: slave_ccu@3e011000 {
|
||||
compatible = "brcm,bcm21664-slave-ccu";
|
||||
reg = <0x3e011000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "uartb",
|
||||
"uartb2",
|
||||
"uartb3",
|
||||
"bsc1",
|
||||
"bsc2",
|
||||
"bsc3",
|
||||
"bsc4";
|
||||
};
|
||||
};
|
||||
|
||||
usbotg: usb@3f120000 {
|
||||
compatible = "snps,dwc2";
|
||||
reg = <0x3f120000 0x10000>;
|
||||
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&usb_otg_ahb_clk>;
|
||||
clock-names = "otg";
|
||||
phys = <&usbphy>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@3f130000 {
|
||||
compatible = "brcm,kona-usb2-phy";
|
||||
reg = <0x3f130000 0x28>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&apps {
|
||||
gic: interrupt-controller@1c01000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0x01c01000 0x1000>,
|
||||
<0x01c00100 0x100>;
|
||||
};
|
||||
|
||||
L2: cache-controller@1c20000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0x01c20000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&bsc1 {
|
||||
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
|
||||
};
|
||||
|
||||
&bsc2 {
|
||||
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
|
||||
};
|
||||
|
||||
&bsc3 {
|
||||
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
|
||||
};
|
||||
|
||||
&bsc4 {
|
||||
compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
|
||||
};
|
||||
|
||||
&gpio {
|
||||
compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
|
||||
};
|
||||
|
||||
&smc {
|
||||
compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
|
||||
};
|
||||
|
|
|
|||
334
arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi
Normal file
334
arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi
Normal file
|
|
@ -0,0 +1,334 @@
|
|||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Common device tree for components shared between the BCM21664 and BCM23550
|
||||
* SoCs.
|
||||
*
|
||||
* Copyright (C) 2016 Broadcom
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/clock/bcm21664.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* Hub bus */
|
||||
hub: hub-bus@34000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0 0x34000000 0x102f83ac>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
smc: smc@4e000 {
|
||||
/* Compatible filled by SoC DTSI */
|
||||
reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
|
||||
};
|
||||
|
||||
resetmgr: reset-controller@1001f00 {
|
||||
compatible = "brcm,bcm21664-resetmgr";
|
||||
reg = <0x01001f00 0x24>;
|
||||
};
|
||||
|
||||
gpio: gpio@1003000 {
|
||||
/* Compatible filled by SoC DTSI */
|
||||
reg = <0x01003000 0x524>;
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
timer@1006000 {
|
||||
compatible = "brcm,kona-timer";
|
||||
reg = <0x01006000 0x1c>;
|
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Slaves bus */
|
||||
slaves: slaves-bus@3e000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0 0x3e000000 0x0001c070>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uartb: serial@0 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x00000000 0x118>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
|
||||
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uartb2: serial@1000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x00001000 0x118>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
|
||||
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uartb3: serial@2000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x00002000 0x118>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc1: i2c@16000 {
|
||||
/* Compatible filled by SoC DTSI */
|
||||
reg = <0x00016000 0x70>;
|
||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc2: i2c@17000 {
|
||||
/* Compatible filled by SoC DTSI */
|
||||
reg = <0x00017000 0x70>;
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc3: i2c@18000 {
|
||||
/* Compatible filled by SoC DTSI */
|
||||
reg = <0x00018000 0x70>;
|
||||
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc4: i2c@1c000 {
|
||||
/* Compatible filled by SoC DTSI */
|
||||
reg = <0x0001c000 0x70>;
|
||||
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
/* Apps bus */
|
||||
apps: apps-bus@3e300000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0 0x3e300000 0x01c02000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
usbotg: usb@e20000 {
|
||||
compatible = "snps,dwc2";
|
||||
reg = <0x00e20000 0x10000>;
|
||||
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&usb_otg_ahb_clk>;
|
||||
clock-names = "otg";
|
||||
phys = <&usbphy>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e30000 {
|
||||
compatible = "brcm,kona-usb2-phy";
|
||||
reg = <0x00e30000 0x28>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio1: mmc@e80000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x00e80000 0x801c>;
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio2: mmc@e90000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x00e90000 0x801c>;
|
||||
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio3: mmc@ea0000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x00ea0000 0x801c>;
|
||||
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio4: mmc@eb0000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x00eb0000 0x801c>;
|
||||
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
/*
|
||||
* Fixed clocks are defined before CCUs whose
|
||||
* clocks may depend on them.
|
||||
*/
|
||||
|
||||
ref_32k_clk: ref_32k {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
bbl_32k_clk: bbl_32k {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
ref_13m_clk: ref_13m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <13000000>;
|
||||
};
|
||||
|
||||
var_13m_clk: var_13m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <13000000>;
|
||||
};
|
||||
|
||||
dft_19_5m_clk: dft_19_5m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <19500000>;
|
||||
};
|
||||
|
||||
ref_crystal_clk: ref_crystal {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <26000000>;
|
||||
};
|
||||
|
||||
ref_52m_clk: ref_52m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
var_52m_clk: var_52m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
usb_otg_ahb_clk: usb_otg_ahb {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
ref_96m_clk: ref_96m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <96000000>;
|
||||
};
|
||||
|
||||
var_96m_clk: var_96m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <96000000>;
|
||||
};
|
||||
|
||||
ref_104m_clk: ref_104m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <104000000>;
|
||||
};
|
||||
|
||||
var_104m_clk: var_104m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <104000000>;
|
||||
};
|
||||
|
||||
ref_156m_clk: ref_156m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <156000000>;
|
||||
};
|
||||
|
||||
var_156m_clk: var_156m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <156000000>;
|
||||
};
|
||||
|
||||
root_ccu: root_ccu@35001000 {
|
||||
compatible = "brcm,bcm21664-root-ccu";
|
||||
reg = <0x35001000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "frac_1m";
|
||||
};
|
||||
|
||||
aon_ccu: aon_ccu@35002000 {
|
||||
compatible = "brcm,bcm21664-aon-ccu";
|
||||
reg = <0x35002000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "hub_timer";
|
||||
};
|
||||
|
||||
slave_ccu: slave_ccu@3e011000 {
|
||||
compatible = "brcm,bcm21664-slave-ccu";
|
||||
reg = <0x3e011000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "uartb",
|
||||
"uartb2",
|
||||
"uartb3",
|
||||
"bsc1",
|
||||
"bsc2",
|
||||
"bsc3",
|
||||
"bsc4";
|
||||
};
|
||||
|
||||
master_ccu: master_ccu@3f001000 {
|
||||
compatible = "brcm,bcm21664-master-ccu";
|
||||
reg = <0x3f001000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "sdio1",
|
||||
"sdio2",
|
||||
"sdio3",
|
||||
"sdio4",
|
||||
"sdio1_sleep",
|
||||
"sdio2_sleep",
|
||||
"sdio3_sleep",
|
||||
"sdio4_sleep";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,45 +1,13 @@
|
|||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* BSD LICENSE
|
||||
* Device tree for the BCM23550 SoC.
|
||||
*
|
||||
* Copyright(c) 2016 Broadcom. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Broadcom Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* Copyright (C) 2016 Broadcom
|
||||
*/
|
||||
|
||||
/* BCM23550 and BCM21664 have almost identical clocks */
|
||||
#include <dt-bindings/clock/bcm21664.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include "bcm2166x-common.dtsi"
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "BCM23550 SoC";
|
||||
compatible = "brcm,bcm23550";
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
cpus {
|
||||
|
|
@ -80,180 +48,9 @@ cpu3: cpu@3 {
|
|||
clock-frequency = <1000000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Hub bus */
|
||||
hub@34000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0 0x34000000 0x102f83ac>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
smc@4e000 {
|
||||
compatible = "brcm,bcm23550-smc", "brcm,kona-smc";
|
||||
reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
|
||||
};
|
||||
|
||||
resetmgr: reset-controller@1001f00 {
|
||||
compatible = "brcm,bcm21664-resetmgr";
|
||||
reg = <0x01001f00 0x24>;
|
||||
};
|
||||
|
||||
gpio: gpio@1003000 {
|
||||
compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio";
|
||||
reg = <0x01003000 0x524>;
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
timer@1006000 {
|
||||
compatible = "brcm,kona-timer";
|
||||
reg = <0x01006000 0x1c>;
|
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
|
||||
};
|
||||
};
|
||||
|
||||
/* Slaves bus */
|
||||
slaves@3e000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0 0x3e000000 0x0001c070>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uartb: serial@0 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x00000000 0x118>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
|
||||
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uartb2: serial@1000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x00001000 0x118>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
|
||||
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uartb3: serial@2000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x00002000 0x118>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc1: i2c@16000 {
|
||||
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
|
||||
reg = <0x00016000 0x70>;
|
||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc2: i2c@17000 {
|
||||
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
|
||||
reg = <0x00017000 0x70>;
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc3: i2c@18000 {
|
||||
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
|
||||
reg = <0x00018000 0x70>;
|
||||
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bsc4: i2c@1c000 {
|
||||
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
|
||||
reg = <0x0001c000 0x70>;
|
||||
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
/* Apps bus */
|
||||
apps@3e300000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0 0x3e300000 0x01b77000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
usbotg: usb@e20000 {
|
||||
compatible = "snps,dwc2";
|
||||
reg = <0x00e20000 0x10000>;
|
||||
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&usb_otg_ahb_clk>;
|
||||
clock-names = "otg";
|
||||
phys = <&usbphy>;
|
||||
phy-names = "usb2-phy";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy: usb-phy@e30000 {
|
||||
compatible = "brcm,kona-usb2-phy";
|
||||
reg = <0x00e30000 0x28>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio1: mmc@e80000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x00e80000 0x801c>;
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio2: mmc@e90000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x00e90000 0x801c>;
|
||||
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio3: mmc@ea0000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x00ea0000 0x801c>;
|
||||
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio4: mmc@eb0000 {
|
||||
compatible = "brcm,kona-sdhci";
|
||||
reg = <0x00eb0000 0x801c>;
|
||||
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&apps {
|
||||
cdc: cdc@1b0e000 {
|
||||
compatible = "brcm,bcm23550-cdc";
|
||||
reg = <0x01b0e000 0x78>;
|
||||
|
|
@ -267,147 +64,28 @@ gic: interrupt-controller@1b21000 {
|
|||
reg = <0x01b21000 0x1000>,
|
||||
<0x01b22000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
/*
|
||||
* Fixed clocks are defined before CCUs whose
|
||||
* clocks may depend on them.
|
||||
*/
|
||||
|
||||
ref_32k_clk: ref_32k {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
bbl_32k_clk: bbl_32k {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
ref_13m_clk: ref_13m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <13000000>;
|
||||
};
|
||||
|
||||
var_13m_clk: var_13m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <13000000>;
|
||||
};
|
||||
|
||||
dft_19_5m_clk: dft_19_5m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <19500000>;
|
||||
};
|
||||
|
||||
ref_crystal_clk: ref_crystal {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <26000000>;
|
||||
};
|
||||
|
||||
ref_52m_clk: ref_52m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
var_52m_clk: var_52m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
usb_otg_ahb_clk: usb_otg_ahb {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <52000000>;
|
||||
};
|
||||
|
||||
ref_96m_clk: ref_96m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <96000000>;
|
||||
};
|
||||
|
||||
var_96m_clk: var_96m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <96000000>;
|
||||
};
|
||||
|
||||
ref_104m_clk: ref_104m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <104000000>;
|
||||
};
|
||||
|
||||
var_104m_clk: var_104m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <104000000>;
|
||||
};
|
||||
|
||||
ref_156m_clk: ref_156m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <156000000>;
|
||||
};
|
||||
|
||||
var_156m_clk: var_156m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <156000000>;
|
||||
};
|
||||
|
||||
root_ccu: root_ccu@35001000 {
|
||||
compatible = "brcm,bcm21664-root-ccu";
|
||||
reg = <0x35001000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "frac_1m";
|
||||
};
|
||||
|
||||
aon_ccu: aon_ccu@35002000 {
|
||||
compatible = "brcm,bcm21664-aon-ccu";
|
||||
reg = <0x35002000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "hub_timer";
|
||||
};
|
||||
|
||||
slave_ccu: slave_ccu@3e011000 {
|
||||
compatible = "brcm,bcm21664-slave-ccu";
|
||||
reg = <0x3e011000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "uartb",
|
||||
"uartb2",
|
||||
"uartb3",
|
||||
"bsc1",
|
||||
"bsc2",
|
||||
"bsc3",
|
||||
"bsc4";
|
||||
};
|
||||
|
||||
master_ccu: master_ccu@3f001000 {
|
||||
compatible = "brcm,bcm21664-master-ccu";
|
||||
reg = <0x3f001000 0x0f00>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "sdio1",
|
||||
"sdio2",
|
||||
"sdio3",
|
||||
"sdio4",
|
||||
"sdio1_sleep",
|
||||
"sdio2_sleep",
|
||||
"sdio3_sleep",
|
||||
"sdio4_sleep";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&bsc1 {
|
||||
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
|
||||
};
|
||||
|
||||
&bsc2 {
|
||||
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
|
||||
};
|
||||
|
||||
&bsc3 {
|
||||
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
|
||||
};
|
||||
|
||||
&bsc4 {
|
||||
compatible = "brcm,bcm23550-i2c", "brcm,kona-i2c";
|
||||
};
|
||||
|
||||
&gpio {
|
||||
compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio";
|
||||
};
|
||||
|
||||
&smc {
|
||||
compatible = "brcm,bcm23550-smc", "brcm,kona-smc";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -215,11 +215,15 @@ eeprom: eeprom@50 {
|
|||
reg = <0x50>;
|
||||
pagesize = <32>;
|
||||
read-only;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
mac_address: mac-address@66 {
|
||||
reg = <0x66 0x6>;
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
mac_address: mac-address@66 {
|
||||
reg = <0x66 0x6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -55,11 +55,15 @@ eeprom@50 {
|
|||
reg = <0x50>;
|
||||
pagesize = <32>;
|
||||
read-only;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
mac_address: mac-address@66 {
|
||||
reg = <0x66 0x6>;
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
mac_address: mac-address@66 {
|
||||
reg = <0x66 0x6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue