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xhci: Preserve RsvdP bits in ERSTBA register correctly
xhci_add_interrupter() erroneously preserves only the lowest 4 bits when writing the ERSTBA register, not the lowest 6 bits. Fix it. Migrate the ERST_BASE_RSVDP macro to the modern GENMASK_ULL() syntax to avoid a u64 cast. This was previously fixed by commit8c1cbec9db
("xhci: fix event ring segment table related masks and variables in header"), but immediately undone by commitb17a57f89f
("xhci: Refactor interrupter code for initial multi interrupter support."). Fixes:b17a57f89f
("xhci: Refactor interrupter code for initial multi interrupter support.") Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: stable@vger.kernel.org # v6.3+ Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Link: https://lore.kernel.org/r/20230915143108.1532163-5-mathias.nyman@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 3 additions and 3 deletions
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@ -2285,8 +2285,8 @@ xhci_add_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir,
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writel(erst_size, &ir->ir_set->erst_size);
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erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base);
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erst_base &= ERST_PTR_MASK;
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erst_base |= (ir->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
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erst_base &= ERST_BASE_RSVDP;
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erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP;
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xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base);
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/* Set the event ring dequeue address of this interrupter */
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@ -514,7 +514,7 @@ struct xhci_intr_reg {
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#define ERST_SIZE_MASK (0xffff << 16)
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/* erst_base bitmasks */
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#define ERST_BASE_RSVDP (0x3f)
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#define ERST_BASE_RSVDP (GENMASK_ULL(5, 0))
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/* erst_dequeue bitmasks */
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/* Dequeue ERST Segment Index (DESI) - Segment number (or alias)
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