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Code Issues Releases Wiki Activity

staging: sm750fb: remove '#if 1' conditionals

Browse source 
The code enclosed in '#if 1' anyway gets compiled. Removing useless
conditionals.

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mike Rapoport 2015-10-22 09:38:39 +03:00 committed by Greg Kroah-Hartman
parent f741554e25
commit cfac7d6a70
3 changed files with 7 additions and 12 deletions
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13
drivers/staging/sm750fb/ddk750_chip.c
View file

@ -60,11 +60,10 @@ static void setChipClock(unsigned int frequency)
{
pll_value_t pll;
unsigned int ulActualMxClk;
#if 1
/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
if (getChipType() == SM750LE)
return;
#endif
if (frequency) {
/*
@ -88,11 +87,11 @@ static void setChipClock(unsigned int frequency)
static void setMemoryClock(unsigned int frequency)
{
unsigned int ulReg, divisor;
#if 1
/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
if (getChipType() == SM750LE)
return;
#endif
if (frequency) {
/* Set the frequency to the maximum frequency that the DDR Memory can take
which is 336MHz. */
@ -135,11 +134,11 @@ static void setMemoryClock(unsigned int frequency)
static void setMasterClock(unsigned int frequency)
{
unsigned int ulReg, divisor;
#if 1
/* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
if (getChipType() == SM750LE)
return;
#endif
if (frequency) {
/* Set the frequency to the maximum frequency that the SM750 engine can
run, which is about 190 MHz. */
@ -332,13 +331,11 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
unsigned int tmpClock, ret;
pllcalparam *xparm;
#if 1
if (getChipType() == SM750LE) {
/* SM750LE don't have prgrammable PLL and M/N values to work on.
Just return the requested clock. */
return request_orig;
}
#endif
ret = 0;
mini_diff = ~0;

3
drivers/staging/sm750fb/ddk750_mode.c
View file

@ -168,14 +168,13 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
*/
POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
#if 1
while ((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) {
cnt++;
if (cnt > 1000)
break;
POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
}
#endif
} else {
ret = -1;
}

3
drivers/staging/sm750fb/sm750_hw.c
View file

@ -276,7 +276,7 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc,
ret = 0;
par = container_of(crtc, struct lynxfb_par, crtc);
share = par->share;
#if 1
if (!share->accel_off) {
/* set 2d engine pixel format according to mode bpp */
switch (var->bits_per_pixel) {
@ -293,7 +293,6 @@ int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc,
}
hw_set2dformat(&share->accel, fmt);
}
#endif
/* set timing */
modparm.pixel_clock = ps_to_hz(var->pixclock);