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dmaengine: dw-edma: Move eDMA data pointer to debugfs node descriptor
The last thing that stops the debugfs part of the eDMA driver from supporting multi-eDMA platforms is keeping the eDMA private data pointer in the static area of the debugfs module. Since the debugfs node descriptors are now heap-allocated, we can freely move that pointer to being preserved in the descriptors. After the debugfs initialization procedure, that pointer will be used in the debugfs files getter to access the common CSRs space and the context CSRs spinlock. So the main part of this change is connected with the debugfs nodes descriptors initialization macros, which aside with already defined prototypes now require to have the DW eDMA private data pointer passed. [bhelgaas: squash in https://lore.kernel.org/r/20230130185101.2883245-1-arnd@kernel.org] Link: https://lore.kernel.org/r/20230113171409.30470-17-Sergey.Semin@baikalelectronics.ru Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
parent
0049816765
commit
d015216853
1 changed files with 119 additions and 125 deletions
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@ -13,53 +13,55 @@
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#include "dw-edma-v0-regs.h"
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#include "dw-edma-core.h"
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#define REGS_ADDR(name) \
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((void __iomem *)®s->name)
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#define REGS_ADDR(dw, name) \
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({ \
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struct dw_edma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
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\
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(void __iomem *)&__regs->name; \
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})
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#define REGS_CH_ADDR(name, _dir, _ch) \
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#define REGS_CH_ADDR(dw, name, _dir, _ch) \
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({ \
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struct dw_edma_v0_ch_regs __iomem *__ch_regs; \
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\
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if ((dw)->chip->mf == EDMA_MF_EDMA_LEGACY) \
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__ch_regs = ®s->type.legacy.ch; \
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__ch_regs = REGS_ADDR(dw, type.legacy.ch); \
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else if (_dir == EDMA_DIR_READ) \
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__ch_regs = ®s->type.unroll.ch[_ch].rd; \
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__ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].rd); \
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else \
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__ch_regs = ®s->type.unroll.ch[_ch].wr; \
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__ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].wr); \
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\
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(void __iomem *)&__ch_regs->name; \
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})
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#define REGISTER(name) \
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{ #name, REGS_ADDR(name) }
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#define REGISTER(dw, name) \
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{ dw, #name, REGS_ADDR(dw, name) }
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#define CTX_REGISTER(name, dir, ch) \
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{ #name, REGS_CH_ADDR(name, dir, ch), dir, ch }
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#define CTX_REGISTER(dw, name, dir, ch) \
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{ dw, #name, REGS_CH_ADDR(dw, name, dir, ch), dir, ch }
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#define WR_REGISTER(name) \
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{ #name, REGS_ADDR(wr_##name) }
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#define RD_REGISTER(name) \
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{ #name, REGS_ADDR(rd_##name) }
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#define WR_REGISTER(dw, name) \
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{ dw, #name, REGS_ADDR(dw, wr_##name) }
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#define RD_REGISTER(dw, name) \
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{ dw, #name, REGS_ADDR(dw, rd_##name) }
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#define WR_REGISTER_LEGACY(name) \
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{ #name, REGS_ADDR(type.legacy.wr_##name) }
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#define WR_REGISTER_LEGACY(dw, name) \
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{ dw, #name, REGS_ADDR(dw, type.legacy.wr_##name) }
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#define RD_REGISTER_LEGACY(name) \
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{ #name, REGS_ADDR(type.legacy.rd_##name) }
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{ dw, #name, REGS_ADDR(dw, type.legacy.rd_##name) }
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#define WR_REGISTER_UNROLL(name) \
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{ #name, REGS_ADDR(type.unroll.wr_##name) }
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#define RD_REGISTER_UNROLL(name) \
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{ #name, REGS_ADDR(type.unroll.rd_##name) }
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#define WR_REGISTER_UNROLL(dw, name) \
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{ dw, #name, REGS_ADDR(dw, type.unroll.wr_##name) }
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#define RD_REGISTER_UNROLL(dw, name) \
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{ dw, #name, REGS_ADDR(dw, type.unroll.rd_##name) }
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#define WRITE_STR "write"
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#define READ_STR "read"
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#define CHANNEL_STR "channel"
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#define REGISTERS_STR "registers"
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static struct dw_edma *dw;
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static struct dw_edma_v0_regs __iomem *regs;
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struct dw_edma_debugfs_entry {
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struct dw_edma *dw;
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const char *name;
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void __iomem *reg;
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enum dw_edma_dir dir;
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@ -69,10 +71,11 @@ struct dw_edma_debugfs_entry {
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static int dw_edma_debugfs_u32_get(void *data, u64 *val)
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{
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struct dw_edma_debugfs_entry *entry = data;
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struct dw_edma *dw = entry->dw;
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void __iomem *reg = entry->reg;
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if (dw->chip->mf == EDMA_MF_EDMA_LEGACY &&
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reg >= (void __iomem *)®s->type.legacy.ch) {
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reg >= REGS_ADDR(dw, type.legacy.ch)) {
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unsigned long flags;
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u32 viewport_sel;
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@ -81,7 +84,7 @@ static int dw_edma_debugfs_u32_get(void *data, u64 *val)
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raw_spin_lock_irqsave(&dw->lock, flags);
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writel(viewport_sel, ®s->type.legacy.viewport_sel);
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writel(viewport_sel, REGS_ADDR(dw, type.legacy.viewport_sel));
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*val = readl(reg);
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raw_spin_unlock_irqrestore(&dw->lock, flags);
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@ -93,7 +96,8 @@ static int dw_edma_debugfs_u32_get(void *data, u64 *val)
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}
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DEFINE_DEBUGFS_ATTRIBUTE(fops_x32, dw_edma_debugfs_u32_get, NULL, "0x%08llx\n");
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static void dw_edma_debugfs_create_x32(const struct dw_edma_debugfs_entry ini[],
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static void dw_edma_debugfs_create_x32(struct dw_edma *dw,
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const struct dw_edma_debugfs_entry ini[],
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int nr_entries, struct dentry *dent)
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{
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struct dw_edma_debugfs_entry *entries;
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@ -112,62 +116,63 @@ static void dw_edma_debugfs_create_x32(const struct dw_edma_debugfs_entry ini[],
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}
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}
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static void dw_edma_debugfs_regs_ch(enum dw_edma_dir dir, u16 ch,
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struct dentry *dent)
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static void dw_edma_debugfs_regs_ch(struct dw_edma *dw, enum dw_edma_dir dir,
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u16 ch, struct dentry *dent)
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{
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struct dw_edma_debugfs_entry debugfs_regs[] = {
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CTX_REGISTER(ch_control1, dir, ch),
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CTX_REGISTER(ch_control2, dir, ch),
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CTX_REGISTER(transfer_size, dir, ch),
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CTX_REGISTER(sar.lsb, dir, ch),
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CTX_REGISTER(sar.msb, dir, ch),
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CTX_REGISTER(dar.lsb, dir, ch),
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CTX_REGISTER(dar.msb, dir, ch),
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CTX_REGISTER(llp.lsb, dir, ch),
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CTX_REGISTER(llp.msb, dir, ch),
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CTX_REGISTER(dw, ch_control1, dir, ch),
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CTX_REGISTER(dw, ch_control2, dir, ch),
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CTX_REGISTER(dw, transfer_size, dir, ch),
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CTX_REGISTER(dw, sar.lsb, dir, ch),
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CTX_REGISTER(dw, sar.msb, dir, ch),
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CTX_REGISTER(dw, dar.lsb, dir, ch),
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CTX_REGISTER(dw, dar.msb, dir, ch),
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CTX_REGISTER(dw, llp.lsb, dir, ch),
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CTX_REGISTER(dw, llp.msb, dir, ch),
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};
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int nr_entries;
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nr_entries = ARRAY_SIZE(debugfs_regs);
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dw_edma_debugfs_create_x32(debugfs_regs, nr_entries, dent);
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dw_edma_debugfs_create_x32(dw, debugfs_regs, nr_entries, dent);
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}
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static void dw_edma_debugfs_regs_wr(struct dentry *dent)
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static noinline_for_stack void
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dw_edma_debugfs_regs_wr(struct dw_edma *dw, struct dentry *dent)
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{
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const struct dw_edma_debugfs_entry debugfs_regs[] = {
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/* eDMA global registers */
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WR_REGISTER(engine_en),
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WR_REGISTER(doorbell),
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WR_REGISTER(ch_arb_weight.lsb),
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WR_REGISTER(ch_arb_weight.msb),
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WR_REGISTER(dw, engine_en),
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WR_REGISTER(dw, doorbell),
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WR_REGISTER(dw, ch_arb_weight.lsb),
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WR_REGISTER(dw, ch_arb_weight.msb),
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/* eDMA interrupts registers */
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WR_REGISTER(int_status),
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WR_REGISTER(int_mask),
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WR_REGISTER(int_clear),
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WR_REGISTER(err_status),
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WR_REGISTER(done_imwr.lsb),
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WR_REGISTER(done_imwr.msb),
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WR_REGISTER(abort_imwr.lsb),
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WR_REGISTER(abort_imwr.msb),
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WR_REGISTER(ch01_imwr_data),
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WR_REGISTER(ch23_imwr_data),
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WR_REGISTER(ch45_imwr_data),
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WR_REGISTER(ch67_imwr_data),
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WR_REGISTER(linked_list_err_en),
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WR_REGISTER(dw, int_status),
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WR_REGISTER(dw, int_mask),
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WR_REGISTER(dw, int_clear),
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WR_REGISTER(dw, err_status),
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WR_REGISTER(dw, done_imwr.lsb),
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WR_REGISTER(dw, done_imwr.msb),
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WR_REGISTER(dw, abort_imwr.lsb),
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WR_REGISTER(dw, abort_imwr.msb),
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WR_REGISTER(dw, ch01_imwr_data),
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WR_REGISTER(dw, ch23_imwr_data),
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WR_REGISTER(dw, ch45_imwr_data),
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WR_REGISTER(dw, ch67_imwr_data),
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WR_REGISTER(dw, linked_list_err_en),
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};
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const struct dw_edma_debugfs_entry debugfs_unroll_regs[] = {
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/* eDMA channel context grouping */
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WR_REGISTER_UNROLL(engine_chgroup),
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WR_REGISTER_UNROLL(engine_hshake_cnt.lsb),
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WR_REGISTER_UNROLL(engine_hshake_cnt.msb),
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WR_REGISTER_UNROLL(ch0_pwr_en),
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WR_REGISTER_UNROLL(ch1_pwr_en),
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WR_REGISTER_UNROLL(ch2_pwr_en),
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WR_REGISTER_UNROLL(ch3_pwr_en),
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WR_REGISTER_UNROLL(ch4_pwr_en),
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WR_REGISTER_UNROLL(ch5_pwr_en),
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WR_REGISTER_UNROLL(ch6_pwr_en),
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WR_REGISTER_UNROLL(ch7_pwr_en),
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WR_REGISTER_UNROLL(dw, engine_chgroup),
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WR_REGISTER_UNROLL(dw, engine_hshake_cnt.lsb),
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WR_REGISTER_UNROLL(dw, engine_hshake_cnt.msb),
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WR_REGISTER_UNROLL(dw, ch0_pwr_en),
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WR_REGISTER_UNROLL(dw, ch1_pwr_en),
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WR_REGISTER_UNROLL(dw, ch2_pwr_en),
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WR_REGISTER_UNROLL(dw, ch3_pwr_en),
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WR_REGISTER_UNROLL(dw, ch4_pwr_en),
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WR_REGISTER_UNROLL(dw, ch5_pwr_en),
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WR_REGISTER_UNROLL(dw, ch6_pwr_en),
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WR_REGISTER_UNROLL(dw, ch7_pwr_en),
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};
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struct dentry *regs_dent, *ch_dent;
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int nr_entries, i;
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@ -176,11 +181,11 @@ static void dw_edma_debugfs_regs_wr(struct dentry *dent)
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regs_dent = debugfs_create_dir(WRITE_STR, dent);
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nr_entries = ARRAY_SIZE(debugfs_regs);
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dw_edma_debugfs_create_x32(debugfs_regs, nr_entries, regs_dent);
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dw_edma_debugfs_create_x32(dw, debugfs_regs, nr_entries, regs_dent);
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if (dw->chip->mf == EDMA_MF_HDMA_COMPAT) {
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nr_entries = ARRAY_SIZE(debugfs_unroll_regs);
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dw_edma_debugfs_create_x32(debugfs_unroll_regs, nr_entries,
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dw_edma_debugfs_create_x32(dw, debugfs_unroll_regs, nr_entries,
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regs_dent);
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}
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@ -189,47 +194,48 @@ static void dw_edma_debugfs_regs_wr(struct dentry *dent)
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ch_dent = debugfs_create_dir(name, regs_dent);
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dw_edma_debugfs_regs_ch(EDMA_DIR_WRITE, i, ch_dent);
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dw_edma_debugfs_regs_ch(dw, EDMA_DIR_WRITE, i, ch_dent);
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}
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}
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static void dw_edma_debugfs_regs_rd(struct dentry *dent)
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static noinline_for_stack void dw_edma_debugfs_regs_rd(struct dw_edma *dw,
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struct dentry *dent)
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{
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const struct dw_edma_debugfs_entry debugfs_regs[] = {
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/* eDMA global registers */
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RD_REGISTER(engine_en),
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RD_REGISTER(doorbell),
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RD_REGISTER(ch_arb_weight.lsb),
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RD_REGISTER(ch_arb_weight.msb),
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RD_REGISTER(dw, engine_en),
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RD_REGISTER(dw, doorbell),
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RD_REGISTER(dw, ch_arb_weight.lsb),
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RD_REGISTER(dw, ch_arb_weight.msb),
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/* eDMA interrupts registers */
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RD_REGISTER(int_status),
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RD_REGISTER(int_mask),
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RD_REGISTER(int_clear),
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RD_REGISTER(err_status.lsb),
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RD_REGISTER(err_status.msb),
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RD_REGISTER(linked_list_err_en),
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RD_REGISTER(done_imwr.lsb),
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RD_REGISTER(done_imwr.msb),
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RD_REGISTER(abort_imwr.lsb),
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RD_REGISTER(abort_imwr.msb),
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RD_REGISTER(ch01_imwr_data),
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RD_REGISTER(ch23_imwr_data),
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RD_REGISTER(ch45_imwr_data),
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RD_REGISTER(ch67_imwr_data),
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RD_REGISTER(dw, int_status),
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RD_REGISTER(dw, int_mask),
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RD_REGISTER(dw, int_clear),
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RD_REGISTER(dw, err_status.lsb),
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RD_REGISTER(dw, err_status.msb),
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RD_REGISTER(dw, linked_list_err_en),
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RD_REGISTER(dw, done_imwr.lsb),
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RD_REGISTER(dw, done_imwr.msb),
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RD_REGISTER(dw, abort_imwr.lsb),
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RD_REGISTER(dw, abort_imwr.msb),
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RD_REGISTER(dw, ch01_imwr_data),
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RD_REGISTER(dw, ch23_imwr_data),
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RD_REGISTER(dw, ch45_imwr_data),
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RD_REGISTER(dw, ch67_imwr_data),
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};
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const struct dw_edma_debugfs_entry debugfs_unroll_regs[] = {
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/* eDMA channel context grouping */
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RD_REGISTER_UNROLL(engine_chgroup),
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RD_REGISTER_UNROLL(engine_hshake_cnt.lsb),
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RD_REGISTER_UNROLL(engine_hshake_cnt.msb),
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RD_REGISTER_UNROLL(ch0_pwr_en),
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RD_REGISTER_UNROLL(ch1_pwr_en),
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RD_REGISTER_UNROLL(ch2_pwr_en),
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RD_REGISTER_UNROLL(ch3_pwr_en),
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RD_REGISTER_UNROLL(ch4_pwr_en),
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RD_REGISTER_UNROLL(ch5_pwr_en),
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RD_REGISTER_UNROLL(ch6_pwr_en),
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RD_REGISTER_UNROLL(ch7_pwr_en),
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RD_REGISTER_UNROLL(dw, engine_chgroup),
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RD_REGISTER_UNROLL(dw, engine_hshake_cnt.lsb),
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RD_REGISTER_UNROLL(dw, engine_hshake_cnt.msb),
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RD_REGISTER_UNROLL(dw, ch0_pwr_en),
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RD_REGISTER_UNROLL(dw, ch1_pwr_en),
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RD_REGISTER_UNROLL(dw, ch2_pwr_en),
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RD_REGISTER_UNROLL(dw, ch3_pwr_en),
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RD_REGISTER_UNROLL(dw, ch4_pwr_en),
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RD_REGISTER_UNROLL(dw, ch5_pwr_en),
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RD_REGISTER_UNROLL(dw, ch6_pwr_en),
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RD_REGISTER_UNROLL(dw, ch7_pwr_en),
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};
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struct dentry *regs_dent, *ch_dent;
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int nr_entries, i;
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regs_dent = debugfs_create_dir(READ_STR, dent);
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nr_entries = ARRAY_SIZE(debugfs_regs);
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dw_edma_debugfs_create_x32(debugfs_regs, nr_entries, regs_dent);
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dw_edma_debugfs_create_x32(dw, debugfs_regs, nr_entries, regs_dent);
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if (dw->chip->mf == EDMA_MF_HDMA_COMPAT) {
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nr_entries = ARRAY_SIZE(debugfs_unroll_regs);
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dw_edma_debugfs_create_x32(debugfs_unroll_regs, nr_entries,
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dw_edma_debugfs_create_x32(dw, debugfs_unroll_regs, nr_entries,
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regs_dent);
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}
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@ -251,15 +257,15 @@ static void dw_edma_debugfs_regs_rd(struct dentry *dent)
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ch_dent = debugfs_create_dir(name, regs_dent);
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dw_edma_debugfs_regs_ch(EDMA_DIR_READ, i, ch_dent);
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dw_edma_debugfs_regs_ch(dw, EDMA_DIR_READ, i, ch_dent);
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}
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}
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static void dw_edma_debugfs_regs(void)
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static void dw_edma_debugfs_regs(struct dw_edma *dw)
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{
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const struct dw_edma_debugfs_entry debugfs_regs[] = {
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REGISTER(ctrl_data_arb_prior),
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REGISTER(ctrl),
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REGISTER(dw, ctrl_data_arb_prior),
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REGISTER(dw, ctrl),
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};
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struct dentry *regs_dent;
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int nr_entries;
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@ -267,40 +273,28 @@ static void dw_edma_debugfs_regs(void)
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regs_dent = debugfs_create_dir(REGISTERS_STR, dw->debugfs);
|
||||
|
||||
nr_entries = ARRAY_SIZE(debugfs_regs);
|
||||
dw_edma_debugfs_create_x32(debugfs_regs, nr_entries, regs_dent);
|
||||
dw_edma_debugfs_create_x32(dw, debugfs_regs, nr_entries, regs_dent);
|
||||
|
||||
dw_edma_debugfs_regs_wr(regs_dent);
|
||||
dw_edma_debugfs_regs_rd(regs_dent);
|
||||
dw_edma_debugfs_regs_wr(dw, regs_dent);
|
||||
dw_edma_debugfs_regs_rd(dw, regs_dent);
|
||||
}
|
||||
|
||||
void dw_edma_v0_debugfs_on(struct dw_edma *_dw)
|
||||
void dw_edma_v0_debugfs_on(struct dw_edma *dw)
|
||||
{
|
||||
if (!debugfs_initialized())
|
||||
return;
|
||||
|
||||
dw = _dw;
|
||||
if (!dw)
|
||||
return;
|
||||
|
||||
regs = dw->chip->reg_base;
|
||||
if (!regs)
|
||||
return;
|
||||
|
||||
dw->debugfs = debugfs_create_dir(dw->name, NULL);
|
||||
|
||||
debugfs_create_u32("mf", 0444, dw->debugfs, &dw->chip->mf);
|
||||
debugfs_create_u16("wr_ch_cnt", 0444, dw->debugfs, &dw->wr_ch_cnt);
|
||||
debugfs_create_u16("rd_ch_cnt", 0444, dw->debugfs, &dw->rd_ch_cnt);
|
||||
|
||||
dw_edma_debugfs_regs();
|
||||
dw_edma_debugfs_regs(dw);
|
||||
}
|
||||
|
||||
void dw_edma_v0_debugfs_off(struct dw_edma *_dw)
|
||||
void dw_edma_v0_debugfs_off(struct dw_edma *dw)
|
||||
{
|
||||
dw = _dw;
|
||||
if (!dw)
|
||||
return;
|
||||
|
||||
debugfs_remove_recursive(dw->debugfs);
|
||||
dw->debugfs = NULL;
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue