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powerpc/fsl_lbc: Add workaround for ELBC-A001 erratum
Simultaneous FCM and GPCM or UPM operation may erroneously trigger bus monitor timeout. Set the local bus monitor timeout value to the maximum by setting LBCR[BMT] = 0 and LBCR[BMTPS] = 0xF. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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parent
208b3a4c19
commit
d08e44570e
2 changed files with 9 additions and 2 deletions
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@ -157,6 +157,8 @@ struct fsl_lbc_regs {
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#define LBCR_EPAR_SHIFT 16
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#define LBCR_BMT 0x0000FF00
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#define LBCR_BMT_SHIFT 8
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#define LBCR_BMTPS 0x0000000F
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#define LBCR_BMTPS_SHIFT 0
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#define LBCR_INIT 0x00040000
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__be32 lcrr; /**< Clock Ratio Register */
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#define LCRR_DBYP 0x80000000
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@ -184,7 +184,8 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
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}
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EXPORT_SYMBOL(fsl_upm_run_pattern);
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static int __devinit fsl_lbc_ctrl_init(struct fsl_lbc_ctrl *ctrl)
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static int __devinit fsl_lbc_ctrl_init(struct fsl_lbc_ctrl *ctrl,
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struct device_node *node)
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{
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struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
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@ -198,6 +199,10 @@ static int __devinit fsl_lbc_ctrl_init(struct fsl_lbc_ctrl *ctrl)
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/* Enable interrupts for any detected events */
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out_be32(&lbc->lteir, LTEIR_ENABLE);
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/* Set the monitor timeout value to the maximum for erratum A001 */
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if (of_device_is_compatible(node, "fsl,elbc"))
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clrsetbits_be32(&lbc->lbcr, LBCR_BMT, LBCR_BMTPS);
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return 0;
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}
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@ -304,7 +309,7 @@ static int __devinit fsl_lbc_ctrl_probe(struct platform_device *dev)
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fsl_lbc_ctrl_dev->dev = &dev->dev;
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ret = fsl_lbc_ctrl_init(fsl_lbc_ctrl_dev);
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ret = fsl_lbc_ctrl_init(fsl_lbc_ctrl_dev, dev->dev.of_node);
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if (ret < 0)
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goto err;
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