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ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context
With the CMA changes from Joonsoo Kim <iamjoonsoo.kim@lge.com>, it was noticed that n900 stopped booting. After investigating it turned out that n900 save_secure_ram_context does some whacky virtual to physical address translation for the SRAM data address. As we now only have minimal parts of omap3 idle code copied to SRAM, running save_secure_ram_context() in SRAM is not needed. It only gets called on PM init. And it seems there's no need to ever call this from SRAM idle code. So let's just keep save_secure_ram_context() in DDR, and pass it the physical address of the parameters. We can do everything else in omap-secure.c like we already do for other secure code. And since we don't have any documentation, I still have no clue what the values for 0, 1 and 1 for the parameters might be. If somebody has figured it out, please do send a patch to add some comments. Debugged-by: Joonsoo Kim <iamjoonsoo.kim@lge.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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4fbd8d194f
commit
d09220a887
5 changed files with 31 additions and 35 deletions
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@ -73,6 +73,25 @@ phys_addr_t omap_secure_ram_mempool_base(void)
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return omap_secure_memblock_base;
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}
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u32 omap3_save_secure_ram(void __iomem *addr, int size)
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{
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u32 ret;
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u32 param[5];
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if (size != OMAP3_SAVE_SECURE_RAM_SZ)
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return OMAP3_SAVE_SECURE_RAM_SZ;
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param[0] = 4; /* Number of arguments */
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param[1] = __pa(addr); /* Physical address for saving */
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param[2] = 0;
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param[3] = 1;
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param[4] = 1;
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ret = save_secure_ram_context(__pa(param));
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return ret;
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}
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/**
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* rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
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* @idx: The PPA API index
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@ -31,6 +31,8 @@
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/* Maximum Secure memory storage size */
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#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
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#define OMAP3_SAVE_SECURE_RAM_SZ 0x803F
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/* Secure low power HAL API index */
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#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
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#define OMAP4_HAL_SAVEHW_INDEX 0x1b
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@ -65,6 +67,8 @@ extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
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extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
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extern phys_addr_t omap_secure_ram_mempool_base(void);
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extern int omap_secure_ram_reserve_memblock(void);
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extern u32 save_secure_ram_context(u32 args_pa);
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extern u32 omap3_save_secure_ram(void __iomem *save_regs, int size);
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extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
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u32 arg1, u32 arg2, u32 arg3, u32 arg4);
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@ -81,10 +81,6 @@ extern unsigned int omap3_do_wfi_sz;
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/* ... and its pointer from SRAM after copy */
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extern void (*omap3_do_wfi_sram)(void);
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/* save_secure_ram_context function pointer and size, for copy to SRAM */
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extern int save_secure_ram_context(u32 *addr);
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extern unsigned int save_secure_ram_context_sz;
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extern void omap3_save_scratchpad_contents(void);
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#define PM_RTA_ERRATUM_i608 (1 << 0)
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@ -48,6 +48,7 @@
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#include "prm3xxx.h"
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#include "pm.h"
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#include "sdrc.h"
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#include "omap-secure.h"
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#include "sram.h"
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#include "control.h"
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#include "vc.h"
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@ -66,7 +67,6 @@ struct power_state {
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static LIST_HEAD(pwrst_list);
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static int (*_omap_save_secure_sram)(u32 *addr);
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void (*omap3_do_wfi_sram)(void);
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static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
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@ -121,8 +121,8 @@ static void omap3_save_secure_ram_context(void)
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* will hang the system.
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*/
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pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
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ret = _omap_save_secure_sram((u32 *)(unsigned long)
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__pa(omap3_secure_ram_storage));
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ret = omap3_save_secure_ram(omap3_secure_ram_storage,
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OMAP3_SAVE_SECURE_RAM_SZ);
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pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
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/* Following is for error tracking, it should not happen */
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if (ret) {
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@ -434,15 +434,10 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
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*
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* The minimum set of functions is pushed to SRAM for execution:
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* - omap3_do_wfi for erratum i581 WA,
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* - save_secure_ram_context for security extensions.
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*/
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void omap_push_sram_idle(void)
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{
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omap3_do_wfi_sram = omap_sram_push(omap3_do_wfi, omap3_do_wfi_sz);
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if (omap_type() != OMAP2_DEVICE_TYPE_GP)
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_omap_save_secure_sram = omap_sram_push(save_secure_ram_context,
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save_secure_ram_context_sz);
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}
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static void __init pm_errata_configure(void)
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@ -553,7 +548,7 @@ int __init omap3_pm_init(void)
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clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
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if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
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omap3_secure_ram_storage =
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kmalloc(0x803F, GFP_KERNEL);
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kmalloc(OMAP3_SAVE_SECURE_RAM_SZ, GFP_KERNEL);
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if (!omap3_secure_ram_storage)
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pr_err("Memory allocation failed when allocating for secure sram context\n");
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@ -93,20 +93,13 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
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ENDPROC(enable_omap3630_toggle_l2_on_restore)
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/*
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* Function to call rom code to save secure ram context. This gets
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* relocated to SRAM, so it can be all in .data section. Otherwise
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* we need to initialize api_params separately.
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* Function to call rom code to save secure ram context.
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*
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* r0 = physical address of the parameters
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*/
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.data
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.align 3
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ENTRY(save_secure_ram_context)
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stmfd sp!, {r4 - r11, lr} @ save registers on stack
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adr r3, api_params @ r3 points to parameters
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str r0, [r3,#0x4] @ r0 has sdram address
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ldr r12, high_mask
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and r3, r3, r12
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ldr r12, sram_phy_addr_mask
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orr r3, r3, r12
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mov r3, r0 @ physical address of parameters
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mov r0, #25 @ set service ID for PPA
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mov r12, r0 @ copy secure service ID in r12
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mov r1, #0 @ set task id for ROM code in r1
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@ -120,18 +113,7 @@ ENTRY(save_secure_ram_context)
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nop
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nop
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ldmfd sp!, {r4 - r11, pc}
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.align
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sram_phy_addr_mask:
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.word SRAM_BASE_P
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high_mask:
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.word 0xffff
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api_params:
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.word 0x4, 0x0, 0x0, 0x1, 0x1
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ENDPROC(save_secure_ram_context)
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ENTRY(save_secure_ram_context_sz)
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.word . - save_secure_ram_context
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.text
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/*
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* ======================
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