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dmaengine: idxd: Correct IAX operation code names
Some IAX operation code nomenclatures are misleading or don't match with others: 1. Operation code 0x4c is Zero Compress 32. IAX_OPCODE_DECOMP_32 is a misleading name. Change it to IAX_OPCODE_ZERO_COMP_32. 2. Operation code 0x4d is Zero Compress 16. IAX_OPCODE_DECOMP_16 is a misleading name. Change it to IAX_OPCODE_ZERO_COMP_16. 3. IAX_OPCDE_FIND_UNIQUE is corrected to match with other nomenclatures. Co-developed-by: Li Zhang <li4.zhang@intel.com> Signed-off-by: Li Zhang <li4.zhang@intel.com> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20220707002052.1546361-1-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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1 changed files with 3 additions and 3 deletions
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@ -89,14 +89,14 @@ enum iax_opcode {
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IAX_OPCODE_CRC64,
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IAX_OPCODE_ZERO_DECOMP_32 = 0x48,
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IAX_OPCODE_ZERO_DECOMP_16,
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IAX_OPCODE_DECOMP_32 = 0x4c,
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IAX_OPCODE_DECOMP_16,
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IAX_OPCODE_ZERO_COMP_32 = 0x4c,
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IAX_OPCODE_ZERO_COMP_16,
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IAX_OPCODE_SCAN = 0x50,
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IAX_OPCODE_SET_MEMBER,
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IAX_OPCODE_EXTRACT,
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IAX_OPCODE_SELECT,
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IAX_OPCODE_RLE_BURST,
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IAX_OPCDE_FIND_UNIQUE,
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IAX_OPCODE_FIND_UNIQUE,
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IAX_OPCODE_EXPAND,
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};
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