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mmc: sdhci-pci-gli: Reduce the SSC value at 205MHz for GL9750 and GL9755

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The SSC value is 0xFFE7 at 205MHz and may be saturated. Reduce the SSC
value to 0x5A1D at 205MHz to reduce this situation for GL9750 and GL9755.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Link: https://lore.kernel.org/r/20220119075306.36262-1-benchuanggli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Ben Chuang 2022-01-19 15:53:06 +08:00 committed by Ulf Hansson
parent 92e0991047
commit d0ba932a9a
1 changed files with 2 additions and 2 deletions
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4
drivers/mmc/host/sdhci-pci-gli.c
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@ -393,7 +393,7 @@ static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
{
/* set pll to 205MHz and enable ssc */
gl9750_set_ssc(host, 0x1, 0x1F, 0xFFE7);
gl9750_set_ssc(host, 0x1, 0xF, 0x5A1D);
gl9750_set_pll(host, 0x1, 0x246, 0x0);
}
@ -536,7 +536,7 @@ static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
{
/* set pll to 205MHz and enable ssc */
gl9755_set_ssc(pdev, 0x1, 0x1F, 0xFFE7);
gl9755_set_ssc(pdev, 0x1, 0xF, 0x5A1D);
gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
}