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drm: fix trivial typos
s/regsiter/register/ Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4 changed files with 4 additions and 4 deletions
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@ -6784,7 +6784,7 @@ typedef struct _ATOM_MC_INIT_PARAM_TABLE_V2_1
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ULONG ulMCUcodeRomStartAddr;
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ULONG ulMCUcodeRomStartAddr;
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ULONG ulMCUcodeLength;
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ULONG ulMCUcodeLength;
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USHORT usMcRegInitTableOffset; // offset of ATOM_REG_INIT_SETTING array for MC core register settings.
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USHORT usMcRegInitTableOffset; // offset of ATOM_REG_INIT_SETTING array for MC core register settings.
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USHORT usReserved; // offset of ATOM_INIT_REG_BLOCK for MC SEQ/PHY regsiter setting
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USHORT usReserved; // offset of ATOM_INIT_REG_BLOCK for MC SEQ/PHY register setting
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}ATOM_MC_INIT_PARAM_TABLE_V2_1;
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}ATOM_MC_INIT_PARAM_TABLE_V2_1;
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@ -32,7 +32,7 @@
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* evergreen cards need to use the 3D engine to blit data which requires
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* evergreen cards need to use the 3D engine to blit data which requires
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* quite a bit of hw state setup. Rather than pull the whole 3D driver
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* quite a bit of hw state setup. Rather than pull the whole 3D driver
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* (which normally generates the 3D state) into the DRM, we opt to use
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* (which normally generates the 3D state) into the DRM, we opt to use
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* statically generated state tables. The regsiter state and shaders
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* statically generated state tables. The register state and shaders
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* were hand generated to support blitting functionality. See the 3D
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* were hand generated to support blitting functionality. See the 3D
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* driver or documentation for descriptions of the registers and
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* driver or documentation for descriptions of the registers and
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* shader instructions.
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* shader instructions.
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@ -32,7 +32,7 @@
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* evergreen cards need to use the 3D engine to blit data which requires
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* evergreen cards need to use the 3D engine to blit data which requires
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* quite a bit of hw state setup. Rather than pull the whole 3D driver
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* quite a bit of hw state setup. Rather than pull the whole 3D driver
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* (which normally generates the 3D state) into the DRM, we opt to use
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* (which normally generates the 3D state) into the DRM, we opt to use
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* statically generated state tables. The regsiter state and shaders
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* statically generated state tables. The register state and shaders
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* were hand generated to support blitting functionality. See the 3D
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* were hand generated to support blitting functionality. See the 3D
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* driver or documentation for descriptions of the registers and
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* driver or documentation for descriptions of the registers and
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* shader instructions.
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* shader instructions.
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@ -32,7 +32,7 @@
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* R6xx+ cards need to use the 3D engine to blit data which requires
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* R6xx+ cards need to use the 3D engine to blit data which requires
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* quite a bit of hw state setup. Rather than pull the whole 3D driver
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* quite a bit of hw state setup. Rather than pull the whole 3D driver
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* (which normally generates the 3D state) into the DRM, we opt to use
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* (which normally generates the 3D state) into the DRM, we opt to use
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* statically generated state tables. The regsiter state and shaders
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* statically generated state tables. The register state and shaders
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* were hand generated to support blitting functionality. See the 3D
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* were hand generated to support blitting functionality. See the 3D
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* driver or documentation for descriptions of the registers and
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* driver or documentation for descriptions of the registers and
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* shader instructions.
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* shader instructions.
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