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clk: rockchip: setup pll_mux data earlier
In some cases we might need to access the data of the pll mux before the actual mux gets registered - like in the following patch adding an init-callback. Therefore populate pll_mux before registering the core pll-clock. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
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1 changed files with 13 additions and 14 deletions
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@ -349,6 +349,19 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
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pll->flags = clk_pll_flags;
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pll->lock = lock;
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/* create the mux on top of the real pll */
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pll->pll_mux_ops = &clk_mux_ops;
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pll_mux = &pll->pll_mux;
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pll_mux->reg = base + mode_offset;
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pll_mux->shift = mode_shift;
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pll_mux->mask = PLL_MODE_MASK;
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pll_mux->flags = 0;
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pll_mux->lock = lock;
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pll_mux->hw.init = &init;
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if (pll_type == pll_rk3066)
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pll_mux->flags |= CLK_MUX_HIWORD_MASK;
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pll_clk = clk_register(NULL, &pll->hw);
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if (IS_ERR(pll_clk)) {
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pr_err("%s: failed to register pll clock %s : %ld\n",
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@ -357,10 +370,6 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
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goto err_pll;
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}
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/* create the mux on top of the real pll */
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pll->pll_mux_ops = &clk_mux_ops;
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pll_mux = &pll->pll_mux;
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/* the actual muxing is xin24m, pll-output, xin32k */
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pll_parents[0] = parent_names[0];
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pll_parents[1] = pll_name;
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@ -372,16 +381,6 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type,
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init.parent_names = pll_parents;
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init.num_parents = ARRAY_SIZE(pll_parents);
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pll_mux->reg = base + mode_offset;
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pll_mux->shift = mode_shift;
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pll_mux->mask = PLL_MODE_MASK;
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pll_mux->flags = 0;
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pll_mux->lock = lock;
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pll_mux->hw.init = &init;
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if (pll_type == pll_rk3066)
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pll_mux->flags |= CLK_MUX_HIWORD_MASK;
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mux_clk = clk_register(NULL, &pll_mux->hw);
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if (IS_ERR(mux_clk))
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goto err_mux;
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