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ARM: mvebu: Fix AXP-WiFi-AP DT for MBUS DT binding
The ranges property needs to be changed to use the new MBus DT binding. Also, the pcie-controller node needs to be relocated as according the MBus DT binding, it's now a child of the mbus-compatible node. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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1 changed files with 25 additions and 25 deletions
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@ -16,7 +16,7 @@
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*/
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*/
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/dts-v1/;
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/dts-v1/;
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/include/ "armada-xp-mv78230.dtsi"
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#include "armada-xp-mv78230.dtsi"
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/ {
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/ {
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model = "Marvell RD-AXPWiFiAP";
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model = "Marvell RD-AXPWiFiAP";
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@ -32,8 +32,30 @@ memory {
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};
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};
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soc {
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soc {
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ranges = <0 0 0xf1000000 0x100000 /* Internal registers 1MiB */
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ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
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MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
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pcie-controller {
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status = "okay";
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/* First mini-PCIe port */
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/* Second mini-PCIe port */
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pcie@2,0 {
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/* Port 0, Lane 1 */
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status = "okay";
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};
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/* Renesas uPD720202 USB 3.0 controller */
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pcie@3,0 {
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/* Port 0, Lane 3 */
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status = "okay";
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};
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};
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internal-regs {
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internal-regs {
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pinctrl {
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pinctrl {
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@ -123,28 +145,6 @@ spi-flash@0 {
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spi-max-frequency = <108000000>;
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spi-max-frequency = <108000000>;
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};
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};
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};
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};
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pcie-controller {
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status = "okay";
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/* First mini-PCIe port */
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/* Second mini-PCIe port */
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pcie@2,0 {
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/* Port 0, Lane 1 */
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status = "okay";
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};
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/* Renesas uPD720202 USB 3.0 controller */
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pcie@3,0 {
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/* Port 0, Lane 3 */
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status = "okay";
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};
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};
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};
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};
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};
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};
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