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drm/i915/mst: Swap TRANSCONF vs. FECSTALL_DIS_DPTSTREAM_DPTTG disable
The DP modeset sequence asks us to disable TRANSCONF before clearing the FECSTALL_DIS_DPTSTREAM_DPTTG bit, although we are still asked to wait for the transcoder to stop only after both steps have been done. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231018154123.5479-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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1 changed files with 2 additions and 1 deletions
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@ -485,6 +485,8 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
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if (!IS_I830(dev_priv))
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val &= ~TRANSCONF_ENABLE;
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intel_de_write(dev_priv, reg, val);
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if (DISPLAY_VER(dev_priv) >= 14)
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intel_de_rmw(dev_priv, MTL_CHICKEN_TRANS(cpu_transcoder),
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FECSTALL_DIS_DPTSTREAM_DPTTG, 0);
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@ -492,7 +494,6 @@ void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
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intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder),
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FECSTALL_DIS_DPTSTREAM_DPTTG, 0);
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intel_de_write(dev_priv, reg, val);
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if ((val & TRANSCONF_ENABLE) == 0)
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intel_wait_for_pipe_off(old_crtc_state);
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}
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