clk: sunxi-ng: r40: Export video PLLs

Video PLLs need to be referenced in R40 DT as possible HDMI PHY parent.

Export them.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Jernej Skrabec 2018-06-25 14:02:43 +02:00 committed by Maxime Ripard
parent fb4aa0f643
commit d18e85349f
No known key found for this signature in database
GPG key ID: D2B4C094214DAF74
2 changed files with 10 additions and 2 deletions

View file

@ -25,7 +25,9 @@
#define CLK_PLL_AUDIO_2X 4
#define CLK_PLL_AUDIO_4X 5
#define CLK_PLL_AUDIO_8X 6
#define CLK_PLL_VIDEO0 7
/* PLL_VIDEO0 is exported */
#define CLK_PLL_VIDEO0_2X 8
#define CLK_PLL_VE 9
#define CLK_PLL_DDR0 10
@ -34,7 +36,9 @@
#define CLK_PLL_PERIPH0_2X 13
#define CLK_PLL_PERIPH1 14
#define CLK_PLL_PERIPH1_2X 15
#define CLK_PLL_VIDEO1 16
/* PLL_VIDEO1 is exported */
#define CLK_PLL_VIDEO1_2X 17
#define CLK_PLL_SATA 18
#define CLK_PLL_SATA_OUT 19

View file

@ -43,6 +43,10 @@
#ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_
#define _DT_BINDINGS_CLK_SUN8I_R40_H_
#define CLK_PLL_VIDEO0 7
#define CLK_PLL_VIDEO1 16
#define CLK_CPU 24
#define CLK_BUS_MIPI_DSI 29