mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-27 11:19:37 +00:00
Merge master.kernel.org:/home/rmk/linux-2.6-serial
This commit is contained in:
commit
d195ea4b14
14 changed files with 121 additions and 124 deletions
|
@ -50,7 +50,7 @@ void ibmasm_register_uart(struct service_processor *sp)
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memset(&uport, 0, sizeof(struct uart_port));
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memset(&uport, 0, sizeof(struct uart_port));
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uport.irq = sp->irq;
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uport.irq = sp->irq;
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uport.uartclk = 3686400;
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uport.uartclk = 3686400;
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uport.flags = UPF_AUTOPROBE | UPF_SHARE_IRQ;
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uport.flags = UPF_SHARE_IRQ;
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uport.iotype = UPIO_MEM;
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uport.iotype = UPIO_MEM;
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uport.membase = iomem_base;
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uport.membase = iomem_base;
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@ -366,7 +366,7 @@ static struct uart_port serial21285_port = {
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.irq = NO_IRQ,
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.irq = NO_IRQ,
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.fifosize = 16,
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.fifosize = 16,
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.ops = &serial21285_ops,
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.ops = &serial21285_ops,
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.flags = ASYNC_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF,
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};
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};
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static void serial21285_setup_ports(void)
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static void serial21285_setup_ports(void)
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@ -31,7 +31,6 @@
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/sysrq.h>
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#include <linux/mca.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/tty.h>
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@ -2026,12 +2025,6 @@ static void serial8250_config_port(struct uart_port *port, int flags)
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int probeflags = PROBE_ANY;
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int probeflags = PROBE_ANY;
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int ret;
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int ret;
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/*
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* Don't probe for MCA ports on non-MCA machines.
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*/
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if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
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return;
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/*
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/*
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* Find the region that we can probe for. This in turn
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* Find the region that we can probe for. This in turn
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* tells us whether we can probe for the type of port.
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* tells us whether we can probe for the type of port.
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@ -2164,7 +2157,7 @@ serial8250_register_ports(struct uart_driver *drv, struct device *dev)
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/*
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/*
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* Wait for transmitter & holding register to empty
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* Wait for transmitter & holding register to empty
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*/
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*/
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static inline void wait_for_xmitr(struct uart_8250_port *up)
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static inline void wait_for_xmitr(struct uart_8250_port *up, int bits)
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{
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{
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unsigned int status, tmout = 10000;
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unsigned int status, tmout = 10000;
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@ -2178,7 +2171,7 @@ static inline void wait_for_xmitr(struct uart_8250_port *up)
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if (--tmout == 0)
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if (--tmout == 0)
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break;
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break;
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udelay(1);
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udelay(1);
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} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
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} while ((status & bits) != bits);
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/* Wait up to 1s for flow control if necessary */
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/* Wait up to 1s for flow control if necessary */
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if (up->port.flags & UPF_CONS_FLOW) {
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if (up->port.flags & UPF_CONS_FLOW) {
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@ -2218,7 +2211,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
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* Now, do each character
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* Now, do each character
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*/
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*/
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for (i = 0; i < count; i++, s++) {
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for (i = 0; i < count; i++, s++) {
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wait_for_xmitr(up);
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wait_for_xmitr(up, UART_LSR_THRE);
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/*
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/*
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* Send the character out.
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* Send the character out.
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@ -2226,7 +2219,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
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*/
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*/
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serial_out(up, UART_TX, *s);
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serial_out(up, UART_TX, *s);
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if (*s == 10) {
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if (*s == 10) {
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wait_for_xmitr(up);
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wait_for_xmitr(up, UART_LSR_THRE);
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serial_out(up, UART_TX, 13);
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serial_out(up, UART_TX, 13);
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}
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}
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}
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}
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@ -2235,8 +2228,8 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
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* Finally, wait for transmitter to become empty
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* Finally, wait for transmitter to become empty
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* and restore the IER
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* and restore the IER
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*/
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*/
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wait_for_xmitr(up);
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wait_for_xmitr(up, BOTH_EMPTY);
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serial_out(up, UART_IER, ier);
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serial_out(up, UART_IER, ier | UART_IER_THRI);
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}
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}
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static int serial8250_console_setup(struct console *co, char *options)
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static int serial8250_console_setup(struct console *co, char *options)
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|
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@ -23,7 +23,7 @@ config SERIAL_8250
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work.)
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work.)
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To compile this driver as a module, choose M here: the
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To compile this driver as a module, choose M here: the
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module will be called serial.
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module will be called 8250.
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[WARNING: Do not compile this driver as a module if you are using
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[WARNING: Do not compile this driver as a module if you are using
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non-standard serial ports, since the configuration information will
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non-standard serial ports, since the configuration information will
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be lost when the driver is unloaded. This limitation may be lifted
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be lost when the driver is unloaded. This limitation may be lifted
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|
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@ -566,7 +566,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
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.uartclk = 14745600,
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.uartclk = 14745600,
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.fifosize = 16,
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.fifosize = 16,
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.ops = &amba_pl010_pops,
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.ops = &amba_pl010_pops,
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.flags = ASYNC_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF,
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.line = 0,
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.line = 0,
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},
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},
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.dtr_mask = 1 << 5,
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.dtr_mask = 1 << 5,
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@ -581,7 +581,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
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.uartclk = 14745600,
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.uartclk = 14745600,
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.fifosize = 16,
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.fifosize = 16,
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.ops = &amba_pl010_pops,
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.ops = &amba_pl010_pops,
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.flags = ASYNC_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF,
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.line = 1,
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.line = 1,
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},
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},
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.dtr_mask = 1 << 7,
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.dtr_mask = 1 << 7,
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@ -410,7 +410,7 @@ static struct uart_port clps711x_ports[UART_NR] = {
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.fifosize = 16,
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.fifosize = 16,
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.ops = &clps711x_pops,
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.ops = &clps711x_pops,
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.line = 0,
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.line = 0,
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.flags = ASYNC_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF,
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},
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},
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{
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{
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.iobase = SYSCON2,
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.iobase = SYSCON2,
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@ -419,7 +419,7 @@ static struct uart_port clps711x_ports[UART_NR] = {
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.fifosize = 16,
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.fifosize = 16,
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.ops = &clps711x_pops,
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.ops = &clps711x_pops,
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.line = 1,
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.line = 1,
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.flags = ASYNC_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF,
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}
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}
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};
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};
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@ -674,7 +674,7 @@ static struct imx_port imx_ports[] = {
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.irq = UART1_MINT_RX,
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.irq = UART1_MINT_RX,
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.uartclk = 16000000,
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.uartclk = 16000000,
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.fifosize = 8,
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.fifosize = 8,
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.flags = ASYNC_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF,
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.ops = &imx_pops,
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.ops = &imx_pops,
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.line = 0,
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.line = 0,
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},
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},
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@ -690,7 +690,7 @@ static struct imx_port imx_ports[] = {
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.irq = UART2_MINT_RX,
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.irq = UART2_MINT_RX,
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.uartclk = 16000000,
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.uartclk = 16000000,
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.fifosize = 8,
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.fifosize = 8,
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.flags = ASYNC_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF,
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.ops = &imx_pops,
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.ops = &imx_pops,
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.line = 1,
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.line = 1,
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},
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},
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@ -665,21 +665,21 @@ void __init sa1100_register_uart(int idx, int port)
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sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
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sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
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sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
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sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
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sa1100_ports[idx].port.irq = IRQ_Ser1UART;
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sa1100_ports[idx].port.irq = IRQ_Ser1UART;
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sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
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sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
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break;
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break;
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case 2:
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case 2:
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sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
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sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
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sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
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sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
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sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
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sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
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sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
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sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
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break;
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break;
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|
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case 3:
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case 3:
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sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
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sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
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sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
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sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
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sa1100_ports[idx].port.irq = IRQ_Ser3UART;
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sa1100_ports[idx].port.irq = IRQ_Ser3UART;
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sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
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sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
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break;
|
break;
|
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|
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default:
|
default:
|
||||||
|
|
|
@ -332,7 +332,7 @@ uart_get_baud_rate(struct uart_port *port, struct termios *termios,
|
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struct termios *old, unsigned int min, unsigned int max)
|
struct termios *old, unsigned int min, unsigned int max)
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{
|
{
|
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unsigned int try, baud, altbaud = 38400;
|
unsigned int try, baud, altbaud = 38400;
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unsigned int flags = port->flags & UPF_SPD_MASK;
|
upf_t flags = port->flags & UPF_SPD_MASK;
|
||||||
|
|
||||||
if (flags == UPF_SPD_HI)
|
if (flags == UPF_SPD_HI)
|
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altbaud = 57600;
|
altbaud = 57600;
|
||||||
|
@ -615,8 +615,9 @@ static int uart_set_info(struct uart_state *state,
|
||||||
struct serial_struct new_serial;
|
struct serial_struct new_serial;
|
||||||
struct uart_port *port = state->port;
|
struct uart_port *port = state->port;
|
||||||
unsigned long new_port;
|
unsigned long new_port;
|
||||||
unsigned int change_irq, change_port, old_flags, closing_wait;
|
unsigned int change_irq, change_port, closing_wait;
|
||||||
unsigned int old_custom_divisor, close_delay;
|
unsigned int old_custom_divisor, close_delay;
|
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|
upf_t old_flags, new_flags;
|
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int retval = 0;
|
int retval = 0;
|
||||||
|
|
||||||
if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
|
if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
|
||||||
|
@ -655,6 +656,7 @@ static int uart_set_info(struct uart_state *state,
|
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new_serial.type != port->type;
|
new_serial.type != port->type;
|
||||||
|
|
||||||
old_flags = port->flags;
|
old_flags = port->flags;
|
||||||
|
new_flags = new_serial.flags;
|
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old_custom_divisor = port->custom_divisor;
|
old_custom_divisor = port->custom_divisor;
|
||||||
|
|
||||||
if (!capable(CAP_SYS_ADMIN)) {
|
if (!capable(CAP_SYS_ADMIN)) {
|
||||||
|
@ -664,10 +666,10 @@ static int uart_set_info(struct uart_state *state,
|
||||||
(close_delay != state->close_delay) ||
|
(close_delay != state->close_delay) ||
|
||||||
(closing_wait != state->closing_wait) ||
|
(closing_wait != state->closing_wait) ||
|
||||||
(new_serial.xmit_fifo_size != port->fifosize) ||
|
(new_serial.xmit_fifo_size != port->fifosize) ||
|
||||||
(((new_serial.flags ^ old_flags) & ~UPF_USR_MASK) != 0))
|
(((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0))
|
||||||
goto exit;
|
goto exit;
|
||||||
port->flags = ((port->flags & ~UPF_USR_MASK) |
|
port->flags = ((port->flags & ~UPF_USR_MASK) |
|
||||||
(new_serial.flags & UPF_USR_MASK));
|
(new_flags & UPF_USR_MASK));
|
||||||
port->custom_divisor = new_serial.custom_divisor;
|
port->custom_divisor = new_serial.custom_divisor;
|
||||||
goto check_and_exit;
|
goto check_and_exit;
|
||||||
}
|
}
|
||||||
|
@ -764,7 +766,7 @@ static int uart_set_info(struct uart_state *state,
|
||||||
port->irq = new_serial.irq;
|
port->irq = new_serial.irq;
|
||||||
port->uartclk = new_serial.baud_base * 16;
|
port->uartclk = new_serial.baud_base * 16;
|
||||||
port->flags = (port->flags & ~UPF_CHANGE_MASK) |
|
port->flags = (port->flags & ~UPF_CHANGE_MASK) |
|
||||||
(new_serial.flags & UPF_CHANGE_MASK);
|
(new_flags & UPF_CHANGE_MASK);
|
||||||
port->custom_divisor = new_serial.custom_divisor;
|
port->custom_divisor = new_serial.custom_divisor;
|
||||||
state->close_delay = close_delay;
|
state->close_delay = close_delay;
|
||||||
state->closing_wait = closing_wait;
|
state->closing_wait = closing_wait;
|
||||||
|
@ -1870,7 +1872,7 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *port)
|
||||||
mutex_lock(&state->mutex);
|
mutex_lock(&state->mutex);
|
||||||
|
|
||||||
if (state->info && state->info->flags & UIF_INITIALIZED) {
|
if (state->info && state->info->flags & UIF_INITIALIZED) {
|
||||||
struct uart_ops *ops = port->ops;
|
const struct uart_ops *ops = port->ops;
|
||||||
|
|
||||||
spin_lock_irq(&port->lock);
|
spin_lock_irq(&port->lock);
|
||||||
ops->stop_tx(port);
|
ops->stop_tx(port);
|
||||||
|
@ -1932,7 +1934,7 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (state->info && state->info->flags & UIF_INITIALIZED) {
|
if (state->info && state->info->flags & UIF_INITIALIZED) {
|
||||||
struct uart_ops *ops = port->ops;
|
const struct uart_ops *ops = port->ops;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ops->set_mctrl(port, 0);
|
ops->set_mctrl(port, 0);
|
||||||
|
|
|
@ -506,7 +506,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
|
||||||
.uartclk = 14745600/2,
|
.uartclk = 14745600/2,
|
||||||
.fifosize = 16,
|
.fifosize = 16,
|
||||||
.ops = &lh7a40x_uart_ops,
|
.ops = &lh7a40x_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
|
@ -519,7 +519,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
|
||||||
.uartclk = 14745600/2,
|
.uartclk = 14745600/2,
|
||||||
.fifosize = 16,
|
.fifosize = 16,
|
||||||
.ops = &lh7a40x_uart_ops,
|
.ops = &lh7a40x_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 1,
|
.line = 1,
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
|
@ -532,7 +532,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
|
||||||
.uartclk = 14745600/2,
|
.uartclk = 14745600/2,
|
||||||
.fifosize = 16,
|
.fifosize = 16,
|
||||||
.ops = &lh7a40x_uart_ops,
|
.ops = &lh7a40x_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 2,
|
.line = 2,
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
|
|
|
@ -1113,10 +1113,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xfffffe80,
|
.membase = (void *)0xfffffe80,
|
||||||
.mapbase = 0xfffffe80,
|
.mapbase = 0xfffffe80,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 25,
|
.irq = 25,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
@ -1128,10 +1128,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)SCIF0,
|
.membase = (void *)SCIF0,
|
||||||
.mapbase = SCIF0,
|
.mapbase = SCIF0,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 55,
|
.irq = 55,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1142,10 +1142,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)SCIF2,
|
.membase = (void *)SCIF2,
|
||||||
.mapbase = SCIF2,
|
.mapbase = SCIF2,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 59,
|
.irq = 59,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 1,
|
.line = 1,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1157,10 +1157,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xfffffe80,
|
.membase = (void *)0xfffffe80,
|
||||||
.mapbase = 0xfffffe80,
|
.mapbase = 0xfffffe80,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 25,
|
.irq = 25,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
@ -1171,10 +1171,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xa4000150,
|
.membase = (void *)0xa4000150,
|
||||||
.mapbase = 0xa4000150,
|
.mapbase = 0xa4000150,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 59,
|
.irq = 59,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 1,
|
.line = 1,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1185,10 +1185,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xa4000140,
|
.membase = (void *)0xa4000140,
|
||||||
.mapbase = 0xa4000140,
|
.mapbase = 0xa4000140,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 55,
|
.irq = 55,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 2,
|
.line = 2,
|
||||||
},
|
},
|
||||||
.type = PORT_IRDA,
|
.type = PORT_IRDA,
|
||||||
|
@ -1200,10 +1200,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xA4430000,
|
.membase = (void *)0xA4430000,
|
||||||
.mapbase = 0xA4430000,
|
.mapbase = 0xA4430000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 25,
|
.irq = 25,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1215,10 +1215,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xffe00000,
|
.membase = (void *)0xffe00000,
|
||||||
.mapbase = 0xffe00000,
|
.mapbase = 0xffe00000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 25,
|
.irq = 25,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1230,10 +1230,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xffe80000,
|
.membase = (void *)0xffe80000,
|
||||||
.mapbase = 0xffe80000,
|
.mapbase = 0xffe80000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 43,
|
.irq = 43,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1245,10 +1245,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xffe00000,
|
.membase = (void *)0xffe00000,
|
||||||
.mapbase = 0xffe00000,
|
.mapbase = 0xffe00000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 25,
|
.irq = 25,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
@ -1259,10 +1259,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xffe80000,
|
.membase = (void *)0xffe80000,
|
||||||
.mapbase = 0xffe80000,
|
.mapbase = 0xffe80000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 43,
|
.irq = 43,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 1,
|
.line = 1,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1274,10 +1274,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xfe600000,
|
.membase = (void *)0xfe600000,
|
||||||
.mapbase = 0xfe600000,
|
.mapbase = 0xfe600000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 55,
|
.irq = 55,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1288,10 +1288,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xfe610000,
|
.membase = (void *)0xfe610000,
|
||||||
.mapbase = 0xfe610000,
|
.mapbase = 0xfe610000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 75,
|
.irq = 75,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 1,
|
.line = 1,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1302,10 +1302,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xfe620000,
|
.membase = (void *)0xfe620000,
|
||||||
.mapbase = 0xfe620000,
|
.mapbase = 0xfe620000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 79,
|
.irq = 79,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 2,
|
.line = 2,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1317,10 +1317,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xffe80000,
|
.membase = (void *)0xffe80000,
|
||||||
.mapbase = 0xffe80000,
|
.mapbase = 0xffe80000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 43,
|
.irq = 43,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1332,10 +1332,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xffe00000,
|
.membase = (void *)0xffe00000,
|
||||||
.mapbase = 0xffe00000,
|
.mapbase = 0xffe00000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 26,
|
.irq = 26,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1346,10 +1346,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0xffe80000,
|
.membase = (void *)0xffe80000,
|
||||||
.mapbase = 0xffe80000,
|
.mapbase = 0xffe80000,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 43,
|
.irq = 43,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 1,
|
.line = 1,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1359,10 +1359,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
|
#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
|
||||||
{
|
{
|
||||||
.port = {
|
.port = {
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 42,
|
.irq = 42,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCIF,
|
.type = PORT_SCIF,
|
||||||
|
@ -1374,10 +1374,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0x00ffffb0,
|
.membase = (void *)0x00ffffb0,
|
||||||
.mapbase = 0x00ffffb0,
|
.mapbase = 0x00ffffb0,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 54,
|
.irq = 54,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
@ -1388,10 +1388,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0x00ffffb8,
|
.membase = (void *)0x00ffffb8,
|
||||||
.mapbase = 0x00ffffb8,
|
.mapbase = 0x00ffffb8,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 58,
|
.irq = 58,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 1,
|
.line = 1,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
@ -1402,10 +1402,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0x00ffffc0,
|
.membase = (void *)0x00ffffc0,
|
||||||
.mapbase = 0x00ffffc0,
|
.mapbase = 0x00ffffc0,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 62,
|
.irq = 62,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 2,
|
.line = 2,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
@ -1417,10 +1417,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0x00ffff78,
|
.membase = (void *)0x00ffff78,
|
||||||
.mapbase = 0x00ffff78,
|
.mapbase = 0x00ffff78,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 90,
|
.irq = 90,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 0,
|
.line = 0,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
@ -1431,10 +1431,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0x00ffff80,
|
.membase = (void *)0x00ffff80,
|
||||||
.mapbase = 0x00ffff80,
|
.mapbase = 0x00ffff80,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 94,
|
.irq = 94,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 1,
|
.line = 1,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
@ -1445,10 +1445,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
|
||||||
.port = {
|
.port = {
|
||||||
.membase = (void *)0x00ffff88,
|
.membase = (void *)0x00ffff88,
|
||||||
.mapbase = 0x00ffff88,
|
.mapbase = 0x00ffff88,
|
||||||
.iotype = SERIAL_IO_MEM,
|
.iotype = UPIO_MEM,
|
||||||
.irq = 98,
|
.irq = 98,
|
||||||
.ops = &sci_uart_ops,
|
.ops = &sci_uart_ops,
|
||||||
.flags = ASYNC_BOOT_AUTOCONF,
|
.flags = UPF_BOOT_AUTOCONF,
|
||||||
.line = 2,
|
.line = 2,
|
||||||
},
|
},
|
||||||
.type = PORT_SCI,
|
.type = PORT_SCI,
|
||||||
|
|
|
@ -669,7 +669,7 @@ static int sunsu_startup(struct uart_port *port)
|
||||||
* if it is, then bail out, because there's likely no UART
|
* if it is, then bail out, because there's likely no UART
|
||||||
* here.
|
* here.
|
||||||
*/
|
*/
|
||||||
if (!(up->port.flags & ASYNC_BUGGY_UART) &&
|
if (!(up->port.flags & UPF_BUGGY_UART) &&
|
||||||
(serial_inp(up, UART_LSR) == 0xff)) {
|
(serial_inp(up, UART_LSR) == 0xff)) {
|
||||||
printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
|
printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
@ -707,7 +707,7 @@ static int sunsu_startup(struct uart_port *port)
|
||||||
up->ier = UART_IER_RLSI | UART_IER_RDI;
|
up->ier = UART_IER_RLSI | UART_IER_RDI;
|
||||||
serial_outp(up, UART_IER, up->ier);
|
serial_outp(up, UART_IER, up->ier);
|
||||||
|
|
||||||
if (up->port.flags & ASYNC_FOURPORT) {
|
if (up->port.flags & UPF_FOURPORT) {
|
||||||
unsigned int icp;
|
unsigned int icp;
|
||||||
/*
|
/*
|
||||||
* Enable interrupts on the AST Fourport board
|
* Enable interrupts on the AST Fourport board
|
||||||
|
@ -740,7 +740,7 @@ static void sunsu_shutdown(struct uart_port *port)
|
||||||
serial_outp(up, UART_IER, 0);
|
serial_outp(up, UART_IER, 0);
|
||||||
|
|
||||||
spin_lock_irqsave(&up->port.lock, flags);
|
spin_lock_irqsave(&up->port.lock, flags);
|
||||||
if (up->port.flags & ASYNC_FOURPORT) {
|
if (up->port.flags & UPF_FOURPORT) {
|
||||||
/* reset interrupts on the AST Fourport board */
|
/* reset interrupts on the AST Fourport board */
|
||||||
inb((up->port.iobase & 0xfe0) | 0x1f);
|
inb((up->port.iobase & 0xfe0) | 0x1f);
|
||||||
up->port.mctrl |= TIOCM_OUT1;
|
up->port.mctrl |= TIOCM_OUT1;
|
||||||
|
@ -1132,7 +1132,7 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up)
|
||||||
|
|
||||||
spin_lock_irqsave(&up->port.lock, flags);
|
spin_lock_irqsave(&up->port.lock, flags);
|
||||||
|
|
||||||
if (!(up->port.flags & ASYNC_BUGGY_UART)) {
|
if (!(up->port.flags & UPF_BUGGY_UART)) {
|
||||||
/*
|
/*
|
||||||
* Do a simple existence test first; if we fail this, there's
|
* Do a simple existence test first; if we fail this, there's
|
||||||
* no point trying anything else.
|
* no point trying anything else.
|
||||||
|
@ -1170,7 +1170,7 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up)
|
||||||
* manufacturer would be stupid enough to design a board
|
* manufacturer would be stupid enough to design a board
|
||||||
* that conflicts with COM 1-4 --- we hope!
|
* that conflicts with COM 1-4 --- we hope!
|
||||||
*/
|
*/
|
||||||
if (!(up->port.flags & ASYNC_SKIP_TEST)) {
|
if (!(up->port.flags & UPF_SKIP_TEST)) {
|
||||||
serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
|
serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
|
||||||
status1 = serial_inp(up, UART_MSR) & 0xF0;
|
status1 = serial_inp(up, UART_MSR) & 0xF0;
|
||||||
serial_outp(up, UART_MCR, save_mcr);
|
serial_outp(up, UART_MCR, save_mcr);
|
||||||
|
@ -1371,7 +1371,7 @@ static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
|
||||||
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
|
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
|
||||||
|
|
||||||
/* Wait up to 1s for flow control if necessary */
|
/* Wait up to 1s for flow control if necessary */
|
||||||
if (up->port.flags & ASYNC_CONS_FLOW) {
|
if (up->port.flags & UPF_CONS_FLOW) {
|
||||||
tmout = 1000000;
|
tmout = 1000000;
|
||||||
while (--tmout &&
|
while (--tmout &&
|
||||||
((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
|
((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
|
||||||
|
@ -1513,7 +1513,7 @@ static int __init sunsu_serial_init(void)
|
||||||
up->su_type == SU_PORT_KBD)
|
up->su_type == SU_PORT_KBD)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
up->port.flags |= ASYNC_BOOT_AUTOCONF;
|
up->port.flags |= UPF_BOOT_AUTOCONF;
|
||||||
up->port.type = PORT_UNKNOWN;
|
up->port.type = PORT_UNKNOWN;
|
||||||
up->port.uartclk = (SU_BASE_BAUD * 16);
|
up->port.uartclk = (SU_BASE_BAUD * 16);
|
||||||
|
|
||||||
|
|
|
@ -26,7 +26,7 @@ struct plat_serial8250_port {
|
||||||
unsigned char regshift; /* register shift */
|
unsigned char regshift; /* register shift */
|
||||||
unsigned char iotype; /* UPIO_* */
|
unsigned char iotype; /* UPIO_* */
|
||||||
unsigned char hub6;
|
unsigned char hub6;
|
||||||
unsigned int flags; /* UPF_* flags */
|
upf_t flags; /* UPF_* flags */
|
||||||
};
|
};
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -203,6 +203,8 @@ struct uart_icount {
|
||||||
__u32 buf_overrun;
|
__u32 buf_overrun;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
typedef unsigned int __bitwise__ upf_t;
|
||||||
|
|
||||||
struct uart_port {
|
struct uart_port {
|
||||||
spinlock_t lock; /* port lock */
|
spinlock_t lock; /* port lock */
|
||||||
unsigned int iobase; /* in/out[bwl] */
|
unsigned int iobase; /* in/out[bwl] */
|
||||||
|
@ -230,36 +232,34 @@ struct uart_port {
|
||||||
unsigned long sysrq; /* sysrq timeout */
|
unsigned long sysrq; /* sysrq timeout */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
unsigned int flags;
|
upf_t flags;
|
||||||
|
|
||||||
#define UPF_FOURPORT (1 << 1)
|
#define UPF_FOURPORT ((__force upf_t) (1 << 1))
|
||||||
#define UPF_SAK (1 << 2)
|
#define UPF_SAK ((__force upf_t) (1 << 2))
|
||||||
#define UPF_SPD_MASK (0x1030)
|
#define UPF_SPD_MASK ((__force upf_t) (0x1030))
|
||||||
#define UPF_SPD_HI (0x0010)
|
#define UPF_SPD_HI ((__force upf_t) (0x0010))
|
||||||
#define UPF_SPD_VHI (0x0020)
|
#define UPF_SPD_VHI ((__force upf_t) (0x0020))
|
||||||
#define UPF_SPD_CUST (0x0030)
|
#define UPF_SPD_CUST ((__force upf_t) (0x0030))
|
||||||
#define UPF_SPD_SHI (0x1000)
|
#define UPF_SPD_SHI ((__force upf_t) (0x1000))
|
||||||
#define UPF_SPD_WARP (0x1010)
|
#define UPF_SPD_WARP ((__force upf_t) (0x1010))
|
||||||
#define UPF_SKIP_TEST (1 << 6)
|
#define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
|
||||||
#define UPF_AUTO_IRQ (1 << 7)
|
#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
|
||||||
#define UPF_HARDPPS_CD (1 << 11)
|
#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
|
||||||
#define UPF_LOW_LATENCY (1 << 13)
|
#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
|
||||||
#define UPF_BUGGY_UART (1 << 14)
|
#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
|
||||||
#define UPF_AUTOPROBE (1 << 15)
|
#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
|
||||||
#define UPF_MAGIC_MULTIPLIER (1 << 16)
|
#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
|
||||||
#define UPF_BOOT_ONLYMCA (1 << 22)
|
#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
|
||||||
#define UPF_CONS_FLOW (1 << 23)
|
#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
|
||||||
#define UPF_SHARE_IRQ (1 << 24)
|
#define UPF_IOREMAP ((__force upf_t) (1 << 31))
|
||||||
#define UPF_BOOT_AUTOCONF (1 << 28)
|
|
||||||
#define UPF_IOREMAP (1 << 31)
|
|
||||||
|
|
||||||
#define UPF_CHANGE_MASK (0x17fff)
|
#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
|
||||||
#define UPF_USR_MASK (UPF_SPD_MASK|UPF_LOW_LATENCY)
|
#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
|
||||||
|
|
||||||
unsigned int mctrl; /* current modem ctrl settings */
|
unsigned int mctrl; /* current modem ctrl settings */
|
||||||
unsigned int timeout; /* character-based timeout */
|
unsigned int timeout; /* character-based timeout */
|
||||||
unsigned int type; /* port type */
|
unsigned int type; /* port type */
|
||||||
struct uart_ops *ops;
|
const struct uart_ops *ops;
|
||||||
unsigned int custom_divisor;
|
unsigned int custom_divisor;
|
||||||
unsigned int line; /* port index */
|
unsigned int line; /* port index */
|
||||||
unsigned long mapbase; /* for ioremap */
|
unsigned long mapbase; /* for ioremap */
|
||||||
|
@ -289,6 +289,9 @@ struct uart_state {
|
||||||
};
|
};
|
||||||
|
|
||||||
#define UART_XMIT_SIZE PAGE_SIZE
|
#define UART_XMIT_SIZE PAGE_SIZE
|
||||||
|
|
||||||
|
typedef unsigned int __bitwise__ uif_t;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This is the state information which is only valid when the port
|
* This is the state information which is only valid when the port
|
||||||
* is open; it may be freed by the core driver once the device has
|
* is open; it may be freed by the core driver once the device has
|
||||||
|
@ -298,17 +301,16 @@ struct uart_state {
|
||||||
struct uart_info {
|
struct uart_info {
|
||||||
struct tty_struct *tty;
|
struct tty_struct *tty;
|
||||||
struct circ_buf xmit;
|
struct circ_buf xmit;
|
||||||
unsigned int flags;
|
uif_t flags;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* These are the flags that specific to info->flags, and reflect our
|
* Definitions for info->flags. These are _private_ to serial_core, and
|
||||||
* internal state. They can not be accessed via port->flags. Low
|
* are specific to this structure. They may be queried by low level drivers.
|
||||||
* level drivers must not change these, but may query them instead.
|
|
||||||
*/
|
*/
|
||||||
#define UIF_CHECK_CD (1 << 25)
|
#define UIF_CHECK_CD ((__force uif_t) (1 << 25))
|
||||||
#define UIF_CTS_FLOW (1 << 26)
|
#define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
|
||||||
#define UIF_NORMAL_ACTIVE (1 << 29)
|
#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
|
||||||
#define UIF_INITIALIZED (1 << 31)
|
#define UIF_INITIALIZED ((__force uif_t) (1 << 31))
|
||||||
|
|
||||||
int blocked_open;
|
int blocked_open;
|
||||||
|
|
||||||
|
@ -430,7 +432,7 @@ static inline int uart_handle_break(struct uart_port *port)
|
||||||
port->sysrq = 0;
|
port->sysrq = 0;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
if (info->flags & UPF_SAK)
|
if (port->flags & UPF_SAK)
|
||||||
do_SAK(info->tty);
|
do_SAK(info->tty);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue