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ARM SoC cleanups

Browse source 
This contains cleanups as preparation for other branches adding new
 features, we pulled 16 branches for 9 platforms into this one.
 
 Most notable here is the removal of support for ATAGS based OMAP4
 systems. Since all OMAP4 machines are fully functional with DT based
 booting in 3.10, we can remove a lot of code here.
 
 Also noteworthy is Maxime Ripard's cleanup of the machine descriptors,
 which means we need no machine descriptors in a lot more cases and
 can boot additional machines by just having the respective device
 drivers enabled.
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Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Arnd Bergmann:
 "This contains cleanups as preparation for other branches adding new
  features, we pulled 16 branches for 9 platforms into this one.

  Most notable here is the removal of support for ATAGS based OMAP4
  systems.  Since all OMAP4 machines are fully functional with DT based
  booting in 3.10, we can remove a lot of code here.

  Also noteworthy is Maxime Ripard's cleanup of the machine descriptors,
  which means we need no machine descriptors in a lot more cases and can
  boot additional machines by just having the respective device drivers
  enabled."

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
  ARM: picoxcell: remove .nr_irqs reference
  ARM: s5p64x0: avoid build warning for uncompress.h
  ARM: SAMSUNG: Remove unused plat/regs-watchdog.h header
  ARM: SAMSUNG: Remove legacy watchdog reset code
  ARM: SAMSUNG: Let platforms use the new watchdog reset driver
  ARM: SAMSUNG: Add watchdog reset driver
  ARM: SAMSUNG: Use local definitions of watchdog registers
  watchdog: s3c2410_wdt: Use local register definitions
  ARM: S5P64X0: Use common uncompress.h part for plat-samsung
  ARM: SAMSUNG: Consolidate uncompress subroutine
  ARM: at91: drop rm9200dk board support
  ARM: dts: msm: Fix merge resolution
  ARM: OMAP1: Remove dma.h
  ARM: OMAP1: Remove legacy irda.h and irda setup from board files
  ARM: OMAP1: Remove duplicated DMA channel definitions
  ARM: OMAP1: Remove McBSP DMA channel definitions
  ARM: OMAP2+: Remove dma.h
  ARM: OMAP2+: hwmod: Remove remaining DMA channel definitions
  ARM: OMAP2+: Remove duplicated DMA channel definitions
  ARM: OMAP2+: Remove AES crypto device DMA channel definitions
  ...
This commit is contained in:
Linus Torvalds 2013-07-02 13:25:35 -07:00
commit d2033f2c1d
175 changed files with 2304 additions and 9076 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

21
Documentation/arm/sunxi/README
View file

@ -3,17 +3,22 @@ ARM Allwinner SoCs
This document lists all the ARM Allwinner SoCs that are currently
supported in mainline by the Linux kernel. This document will also
provide links to documentation and or datasheet for these SoCs.
provide links to documentation and/or datasheet for these SoCs.
SunXi family
------------
Linux kernel mach directory: arch/arm/mach-sunxi
Flavors:
Allwinner A10 (sun4i)
Datasheet : http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf
* ARM Cortex-A8 based SoCs
- Allwinner A10 (sun4i)
+ Datasheet
http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf
+ User Manual
http://dl.linux-sunxi.org/A10/A10%20User%20Manual%20-%20v1.20%20%282012-04-09%2c%20DECRYPTED%29.pdf
Allwinner A13 (sun5i)
Datasheet : http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
Core: Cortex A8
Linux kernel mach directory: arch/arm/mach-sunxi
- Allwinner A13 (sun5i)
+ Datasheet
http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
+ User Manual
http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-08-08%29.pdf

26
Documentation/devicetree/bindings/gpio/gpio-msm.txt Normal file
View file

@ -0,0 +1,26 @@
MSM GPIO controller bindings
Required properties:
- compatible:
- "qcom,msm-gpio" for MSM controllers
- #gpio-cells : Should be two.
- first cell is the pin number
- second cell is used to specify optional parameters (unused)
- gpio-controller : Marks the device node as a GPIO controller.
- #interrupt-cells : Should be 2.
- interrupt-controller: Mark the device node as an interrupt controller
- interrupts : Specify the TLMM summary interrupt number
- ngpio : Specify the number of MSM GPIOs
Example:
msmgpio: gpio@fd510000 {
compatible = "qcom,msm-gpio";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
interrupts = <0 208 0>;
ngpio = <150>;
};

87
Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
View file

@ -8,91 +8,8 @@ Required properties:
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt source. The value shall be 1.
The interrupt sources are as follows:
0: ENMI
1: UART0
2: UART1
3: UART2
4: UART3
5: IR0
6: IR1
7: I2C0
8: I2C1
9: I2C2
10: SPI0
11: SPI1
12: SPI2
13: SPDIF
14: AC97
15: TS
16: I2S
17: UART4
18: UART5
19: UART6
20: UART7
21: KEYPAD
22: TIMER0
23: TIMER1
24: TIMER2
25: TIMER3
26: CAN
27: DMA
28: PIO
29: TOUCH_PANEL
30: AUDIO_CODEC
31: LRADC
32: SDMC0
33: SDMC1
34: SDMC2
35: SDMC3
36: MEMSTICK
37: NAND
38: USB0
39: USB1
40: USB2
41: SCR
42: CSI0
43: CSI1
44: LCDCTRL0
45: LCDCTRL1
46: MP
47: DEFEBE0
48: DEFEBE1
49: PMU
50: SPI3
51: TZASC
52: PATA
53: VE
54: SS
55: EMAC
56: SATA
57: GPS
58: HDMI
59: TVE
60: ACE
61: TVD
62: PS2_0
63: PS2_1
64: USB3
65: USB4
66: PLE_PFM
67: TIMER4
68: TIMER5
69: GPU_GP
70: GPU_GPMMU
71: GPU_PP0
72: GPU_PPMMU0
73: GPU_PMU
74: GPU_RSV0
75: GPU_RSV1
76: GPU_RSV2
77: GPU_RSV3
78: GPU_RSV4
79: GPU_RSV5
80: GPU_RSV6
82: SYNC_TIMER0
83: SYNC_TIMER1
For the valid interrupt sources for your SoC, see the documentation in
sunxi/<soc>.txt
Example:

89
Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt Normal file
View file

@ -0,0 +1,89 @@
Allwinner A10 (sun4i) interrupt sources
---------------------------------------
The interrupt sources available for the Allwinner A10 SoC are the
following one:
0: ENMI
1: UART0
2: UART1
3: UART2
4: UART3
5: IR0
6: IR1
7: I2C0
8: I2C1
9: I2C2
10: SPI0
11: SPI1
12: SPI2
13: SPDIF
14: AC97
15: TS
16: I2S
17: UART4
18: UART5
19: UART6
20: UART7
21: KEYPAD
22: TIMER0
23: TIMER1
24: TIMER2
25: TIMER3
26: CAN
27: DMA
28: PIO
29: TOUCH_PANEL
30: AUDIO_CODEC
31: LRADC
32: MMC0
33: MMC1
34: MMC2
35: MMC3
36: MEMSTICK
37: NAND
38: USB0
39: USB1
40: USB2
41: SCR
42: CSI0
43: CSI1
44: LCDCTRL0
45: LCDCTRL1
46: MP
47: DEFEBE0
48: DEFEBE1
49: PMU
50: SPI3
51: TZASC
52: PATA
53: VE
54: SS
55: EMAC
56: SATA
57: GPS
58: HDMI
59: TVE
60: ACE
61: TVD
62: PS2_0
63: PS2_1
64: USB3
65: USB4
66: PLE_PFM
67: TIMER4
68: TIMER5
69: GPU_GP
70: GPU_GPMMU
71: GPU_PP0
72: GPU_PPMMU0
73: GPU_PMU
74: GPU_RSV0
75: GPU_RSV1
76: GPU_RSV2
77: GPU_RSV3
78: GPU_RSV4
79: GPU_RSV5
80: GPU_RSV6
82: SYNC_TIMER0
83: SYNC_TIMER1

55
Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt Normal file
View file

@ -0,0 +1,55 @@
Allwinner A13 (sun5i) interrupt sources
---------------------------------------
The interrupt sources available for the Allwinner A13 SoC are the
following one:
0: ENMI
2: UART1
4: UART3
5: IR
7: I2C0
8: I2C1
9: I2C2
10: SPI0
11: SPI1
12: SPI2
22: TIMER0
23: TIMER1
24: TIMER2
25: TIMER3
27: DMA
28: PIO
29: TOUCH_PANEL
30: AUDIO_CODEC
31: LRADC
32: MMC0
33: MMC1
34: MMC2
37: NAND
38: USB OTG
39: USB EHCI
40: USB OHCI
42: CSI
44: LCDCTRL
47: DEFEBE
49: PMU
53: VE
54: SS
66: PLE_PFM
67: TIMER4
68: TIMER5
69: GPU_GP
70: GPU_GPMMU
71: GPU_PP0
72: GPU_PPMMU0
73: GPU_PMU
74: GPU_RSV0
75: GPU_RSV1
76: GPU_RSV2
77: GPU_RSV3
78: GPU_RSV4
79: GPU_RSV5
80: GPU_RSV6
82: SYNC_TIMER0
83: SYNC_TIMER1

3
arch/arm/Kconfig
View file

@ -729,6 +729,7 @@ config ARCH_S3C64XX
select SAMSUNG_CLKSRC
select SAMSUNG_GPIOLIB_4BIT
select SAMSUNG_IRQ_VIC_TIMER
select SAMSUNG_WDT_RESET
select USB_ARCH_HAS_OHCI
help
Samsung S3C64XX series based systems
@ -744,6 +745,7 @@ config ARCH_S5P64X0
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
select SAMSUNG_WDT_RESET
help
Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
SMDK6450.
@ -760,6 +762,7 @@ config ARCH_S5PC100
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
select SAMSUNG_WDT_RESET
help
Samsung S5PC100 series based systems

12
arch/arm/boot/dts/aks-cdu.dts
View file

@ -9,7 +9,7 @@
/dts-v1/;
/include/ "ge863-pro3.dtsi"
#include "ge863-pro3.dtsi"
/ {
chosen {
@ -46,7 +46,7 @@ macb0: ethernet@fffc4000 {
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 15 0>;
atmel,vbus-gpio = <&pioC 15 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@ -90,23 +90,23 @@ leds {
compatible = "gpio-leds";
red {
gpios = <&pioC 10 0>;
gpios = <&pioC 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
};
green {
gpios = <&pioA 5 1>;
gpios = <&pioA 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
default-state = "on";
};
yellow {
gpios = <&pioB 20 1>;
gpios = <&pioB 20 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
blue {
gpios = <&pioB 21 1>;
gpios = <&pioB 21 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
};

1
arch/arm/boot/dts/am33xx.dtsi
View file

@ -394,7 +394,6 @@ ocmcram: ocmcram@40300000 {
compatible = "ti,am3352-ocmcram";
reg = <0x40300000 0x10000>;
ti,hwmods = "ocmcram";
ti,no_idle_on_suspend;
};
wkup_m3: wkup_m3@44d00000 {

18
arch/arm/boot/dts/animeo_ip.dts
View file

@ -7,7 +7,7 @@
*/
/dts-v1/;
/include/ "at91sam9260.dtsi"
#include "at91sam9260.dtsi"
/ {
model = "Somfy Animeo IP";
@ -123,7 +123,7 @@ root@2b0000 {
usb0: ohci@00500000 {
num-ports = <2>;
atmel,vbus-gpio = <&pioB 15 1>;
atmel,vbus-gpio = <&pioB 15 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
@ -133,23 +133,23 @@ leds {
power_green {
label = "power_green";
gpios = <&pioC 17 0>;
gpios = <&pioC 17 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
power_red {
label = "power_red";
gpios = <&pioA 2 0>;
gpios = <&pioA 2 GPIO_ACTIVE_HIGH>;
};
tx_green {
label = "tx_green";
gpios = <&pioC 19 0>;
gpios = <&pioC 19 GPIO_ACTIVE_HIGH>;
};
tx_red {
label = "tx_red";
gpios = <&pioC 18 0>;
gpios = <&pioC 18 GPIO_ACTIVE_HIGH>;
};
};
@ -160,21 +160,21 @@ gpio_keys {
keyswitch_in {
label = "keyswitch_in";
gpios = <&pioB 1 0>;
gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
linux,code = <28>;
gpio-key,wakeup;
};
error_in {
label = "error_in";
gpios = <&pioB 2 0>;
gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
linux,code = <29>;
gpio-key,wakeup;
};
btn {
label = "btn";
gpios = <&pioC 23 0>;
gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
linux,code = <31>;
gpio-key,wakeup;
};

6
arch/arm/boot/dts/at91-ariag25.dts
View file

@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9g25.dtsi"
#include "at91sam9g25.dtsi"
/ {
model = "Acme Systems Aria G25";
@ -156,7 +156,7 @@ leds {
/* little green LED in middle of Aria G25 module */
aria_led {
label = "aria_led";
gpios = <&pioB 8 0>; /* PB8 */
gpios = <&pioB 8 GPIO_ACTIVE_HIGH>; /* PB8 */
linux,default-trigger = "heartbeat";
};
@ -164,7 +164,7 @@ aria_led {
onewire@0 {
compatible = "w1-gpio";
gpios = <&pioA 21 1>;
gpios = <&pioA 21 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_w1_0>;
};

207
arch/arm/boot/dts/at91rm9200.dtsi
View file

@ -10,7 +10,10 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91RM9200 family SoC";
@ -77,25 +80,29 @@ pmc: pmc@fffffc00 {
st: timer@fffffd00 {
compatible = "atmel,at91rm9200-st";
reg = <0xfffffd00 0x100>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
interrupts = <17 4 0 18 4 0 19 4 0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@fffa4000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa4000 0x100>;
interrupts = <20 4 0 21 4 0 22 4 0>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
21 IRQ_TYPE_LEVEL_HIGH 0
22 IRQ_TYPE_LEVEL_HIGH 0>;
};
i2c0: i2c@fffb8000 {
compatible = "atmel,at91rm9200-i2c";
reg = <0xfffb8000 0x4000>;
interrupts = <12 4 6>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_twi>;
#address-cells = <1>;
@ -106,7 +113,7 @@ i2c0: i2c@fffb8000 {
mmc0: mmc@fffb4000 {
compatible = "atmel,hsmci";
reg = <0xfffb4000 0x4000>;
interrupts = <10 4 0>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -115,7 +122,7 @@ mmc0: mmc@fffb4000 {
ssc0: ssc@fffd0000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffd0000 0x4000>;
interrupts = <14 4 5>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disable";
@ -124,7 +131,7 @@ ssc0: ssc@fffd0000 {
ssc1: ssc@fffd4000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffd4000 0x4000>;
interrupts = <15 4 5>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
status = "disable";
@ -133,7 +140,7 @@ ssc1: ssc@fffd4000 {
ssc2: ssc@fffd8000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffd8000 0x4000>;
interrupts = <16 4 5>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
status = "disable";
@ -142,7 +149,7 @@ ssc2: ssc@fffd8000 {
macb0: ethernet@fffbc000 {
compatible = "cdns,at91rm9200-emac", "cdns,emac";
reg = <0xfffbc000 0x4000>;
interrupts = <24 4 3>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
@ -167,234 +174,234 @@ pinctrl@fffff400 {
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<0 30 0x1 0x0 /* PA30 periph A */
0 31 0x1 0x1>; /* PA31 periph with pullup */
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
<0 17 0x1 0x0 /* PA17 periph A */
0 18 0x1 0x0>; /* PA18 periph A */
<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
};
pinctrl_uart0_rts: uart0_rts-0 {
atmel,pins =
<0 20 0x1 0x0>; /* PA20 periph A */
<AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
};
pinctrl_uart0_cts: uart0_cts-0 {
atmel,pins =
<0 21 0x1 0x0>; /* PA21 periph A */
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
<1 20 0x1 0x1 /* PB20 periph A with pullup */
1 21 0x1 0x0>; /* PB21 periph A */
<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
};
pinctrl_uart1_rts: uart1_rts-0 {
atmel,pins =
<1 24 0x1 0x0>; /* PB24 periph A */
<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
};
pinctrl_uart1_cts: uart1_cts-0 {
atmel,pins =
<1 26 0x1 0x0>; /* PB26 periph A */
<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
};
pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
atmel,pins =
<1 19 0x1 0x0 /* PB19 periph A */
1 25 0x1 0x0>; /* PB25 periph A */
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
};
pinctrl_uart1_dcd: uart1_dcd-0 {
atmel,pins =
<1 23 0x1 0x0>; /* PB23 periph A */
<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
};
pinctrl_uart1_ri: uart1_ri-0 {
atmel,pins =
<1 18 0x1 0x0>; /* PB18 periph A */
<AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
};
};
uart2 {
pinctrl_uart2: uart2-0 {
atmel,pins =
<0 22 0x1 0x0 /* PA22 periph A */
0 23 0x1 0x1>; /* PA23 periph A with pullup */
<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
};
pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins =
<0 30 0x2 0x0>; /* PA30 periph B */
<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
};
pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins =
<0 31 0x2 0x0>; /* PA31 periph B */
<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
};
};
uart3 {
pinctrl_uart3: uart3-0 {
atmel,pins =
<0 5 0x2 0x1 /* PA5 periph B with pullup */
0 6 0x2 0x0>; /* PA6 periph B */
<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
};
pinctrl_uart3_rts: uart3_rts-0 {
atmel,pins =
<1 0 0x2 0x0>; /* PB0 periph B */
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
};
pinctrl_uart3_cts: uart3_cts-0 {
atmel,pins =
<1 1 0x2 0x0>; /* PB1 periph B */
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
<AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
};
};
macb {
pinctrl_macb_rmii: macb_rmii-0 {
atmel,pins =
<0 7 0x1 0x0 /* PA7 periph A */
0 8 0x1 0x0 /* PA8 periph A */
0 9 0x1 0x0 /* PA9 periph A */
0 10 0x1 0x0 /* PA10 periph A */
0 11 0x1 0x0 /* PA11 periph A */
0 12 0x1 0x0 /* PA12 periph A */
0 13 0x1 0x0 /* PA13 periph A */
0 14 0x1 0x0 /* PA14 periph A */
0 15 0x1 0x0 /* PA15 periph A */
0 16 0x1 0x0>; /* PA16 periph A */
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
};
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
atmel,pins =
<1 12 0x2 0x0 /* PB12 periph B */
1 13 0x2 0x0 /* PB13 periph B */
1 14 0x2 0x0 /* PB14 periph B */
1 15 0x2 0x0 /* PB15 periph B */
1 16 0x2 0x0 /* PB16 periph B */
1 17 0x2 0x0 /* PB17 periph B */
1 18 0x2 0x0 /* PB18 periph B */
1 19 0x2 0x0>; /* PB19 periph B */
<AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
};
};
mmc0 {
pinctrl_mmc0_clk: mmc0_clk-0 {
atmel,pins =
<0 27 0x1 0x0>; /* PA27 periph A */
<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
};
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
atmel,pins =
<0 28 0x1 0x1 /* PA28 periph A with pullup */
0 29 0x1 0x1>; /* PA29 periph A with pullup */
<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
<1 3 0x2 0x1 /* PB3 periph B with pullup */
1 4 0x2 0x1 /* PB4 periph B with pullup */
1 5 0x2 0x1>; /* PB5 periph B with pullup */
<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
};
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
atmel,pins =
<0 8 0x2 0x1 /* PA8 periph B with pullup */
0 9 0x2 0x1>; /* PA9 periph B with pullup */
<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
};
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
atmel,pins =
<0 10 0x2 0x1 /* PA10 periph B with pullup */
0 11 0x2 0x1 /* PA11 periph B with pullup */
0 12 0x2 0x1>; /* PA12 periph B with pullup */
<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
<1 0 0x1 0x0 /* PB0 periph A */
1 1 0x1 0x0 /* PB1 periph A */
1 2 0x1 0x0>; /* PB2 periph A */
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
<1 3 0x1 0x0 /* PB3 periph A */
1 4 0x1 0x0 /* PB4 periph A */
1 5 0x1 0x0>; /* PB5 periph A */
<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx-0 {
atmel,pins =
<1 6 0x1 0x0 /* PB6 periph A */
1 7 0x1 0x0 /* PB7 periph A */
1 8 0x1 0x0>; /* PB8 periph A */
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
};
pinctrl_ssc1_rx: ssc1_rx-0 {
atmel,pins =
<1 9 0x1 0x0 /* PB9 periph A */
1 10 0x1 0x0 /* PB10 periph A */
1 11 0x1 0x0>; /* PB11 periph A */
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
};
};
ssc2 {
pinctrl_ssc2_tx: ssc2_tx-0 {
atmel,pins =
<1 12 0x1 0x0 /* PB12 periph A */
1 13 0x1 0x0 /* PB13 periph A */
1 14 0x1 0x0>; /* PB14 periph A */
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
};
pinctrl_ssc2_rx: ssc2_rx-0 {
atmel,pins =
<1 15 0x1 0x0 /* PB15 periph A */
1 16 0x1 0x0 /* PB16 periph A */
1 17 0x1 0x0>; /* PB17 periph A */
<AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
};
};
twi {
pinctrl_twi: twi-0 {
atmel,pins =
<0 25 0x1 0x2 /* PA25 periph A with multi drive */
0 26 0x1 0x2>; /* PA26 periph A with multi drive */
<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
};
pinctrl_twi_gpio: twi_gpio-0 {
atmel,pins =
<0 25 0x0 0x2 /* PA25 GPIO with multi drive */
0 26 0x0 0x2>; /* PA26 GPIO with multi drive */
<AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <2 4 1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -404,7 +411,7 @@ pioA: gpio@fffff400 {
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <3 4 1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -414,7 +421,7 @@ pioB: gpio@fffff600 {
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 4 1>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -424,7 +431,7 @@ pioC: gpio@fffff800 {
pioD: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <5 4 1>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -435,7 +442,7 @@ pioD: gpio@fffffa00 {
dbgu: serial@fffff200 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@ -444,7 +451,7 @@ dbgu: serial@fffff200 {
usart0: serial@fffc0000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc0000 0x200>;
interrupts = <6 4 5>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -455,7 +462,7 @@ usart0: serial@fffc0000 {
usart1: serial@fffc4000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc4000 0x200>;
interrupts = <7 4 5>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -466,7 +473,7 @@ usart1: serial@fffc4000 {
usart2: serial@fffc8000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc8000 0x200>;
interrupts = <8 4 5>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -477,7 +484,7 @@ usart2: serial@fffc8000 {
usart3: serial@fffcc000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffcc000 0x200>;
interrupts = <23 4 5>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -488,7 +495,7 @@ usart3: serial@fffcc000 {
usb1: gadget@fffb0000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfffb0000 0x4000>;
interrupts = <11 4 2>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
@ -503,9 +510,9 @@ nand0: nand@40000000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
nand-ecc-mode = "soft";
gpios = <&pioC 2 0
gpios = <&pioC 2 GPIO_ACTIVE_HIGH
0
&pioB 1 0
&pioB 1 GPIO_ACTIVE_HIGH
>;
status = "disabled";
};
@ -513,15 +520,15 @@ &pioB 1 0
usb0: ohci@00300000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00300000 0x100000>;
interrupts = <23 4 2>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 25 0 /* sda */
&pioA 26 0 /* scl */
gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
&pioA 26 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;

10
arch/arm/boot/dts/at91rm9200ek.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
/include/ "at91rm9200.dtsi"
#include "at91rm9200.dtsi"
/ {
model = "Atmel AT91RM9200 evaluation kit";
@ -50,7 +50,7 @@ macb0: ethernet@fffbc000 {
};
usb1: gadget@fffb0000 {
atmel,vbus-gpio = <&pioD 4 0>;
atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@ -66,19 +66,19 @@ leds {
ds2 {
label = "green";
gpios = <&pioB 0 0x1>;
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
};
ds4 {
label = "yellow";
gpios = <&pioB 1 0x1>;
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
ds6 {
label = "red";
gpios = <&pioB 2 0x1>;
gpios = <&pioB 2 GPIO_ACTIVE_LOW>;
};
};
};

215
arch/arm/boot/dts/at91sam9260.dtsi
View file

@ -8,7 +8,10 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9260 family SoC";
@ -84,19 +87,23 @@ shdwc@fffffd10 {
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
interrupts = <17 4 0 18 4 0 19 4 0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0
19 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@fffdc000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffdc000 0x100>;
interrupts = <26 4 0 27 4 0 28 4 0>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
27 IRQ_TYPE_LEVEL_HIGH 0
28 IRQ_TYPE_LEVEL_HIGH 0>;
};
pinctrl@fffff400 {
@ -116,234 +123,234 @@ pinctrl@fffff400 {
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<1 14 0x1 0x0 /* PB14 periph A */
1 15 0x1 0x1>; /* PB15 periph with pullup */
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<1 4 0x1 0x0 /* PB4 periph A */
1 5 0x1 0x0>; /* PB5 periph A */
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<1 26 0x1 0x0>; /* PB26 periph A */
<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<1 27 0x1 0x0>; /* PB27 periph A */
<AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
};
pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
atmel,pins =
<1 24 0x1 0x0 /* PB24 periph A */
1 22 0x1 0x0>; /* PB22 periph A */
<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
};
pinctrl_usart0_dcd: usart0_dcd-0 {
atmel,pins =
<1 23 0x1 0x0>; /* PB23 periph A */
<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
};
pinctrl_usart0_ri: usart0_ri-0 {
atmel,pins =
<1 25 0x1 0x0>; /* PB25 periph A */
<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<1 6 0x1 0x1 /* PB6 periph A with pullup */
1 7 0x1 0x0>; /* PB7 periph A */
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<1 28 0x1 0x0>; /* PB28 periph A */
<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<1 29 0x1 0x0>; /* PB29 periph A */
<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
<1 8 0x1 0x1 /* PB8 periph A with pullup */
1 9 0x1 0x0>; /* PB9 periph A */
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<0 4 0x1 0x0>; /* PA4 periph A */
<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<0 5 0x1 0x0>; /* PA5 periph A */
<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
<1 10 0x1 0x1 /* PB10 periph A with pullup */
1 11 0x1 0x0>; /* PB11 periph A */
<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<2 8 0x2 0x0>; /* PC8 periph B */
<AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<2 10 0x2 0x0>; /* PC10 periph B */
<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
<0 31 0x2 0x1 /* PA31 periph B with pullup */
0 30 0x2 0x0>; /* PA30 periph B */
<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
<1 12 0x1 0x1 /* PB12 periph A with pullup */
1 13 0x1 0x0>; /* PB13 periph A */
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
<AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
};
};
macb {
pinctrl_macb_rmii: macb_rmii-0 {
atmel,pins =
<0 12 0x1 0x0 /* PA12 periph A */
0 13 0x1 0x0 /* PA13 periph A */
0 14 0x1 0x0 /* PA14 periph A */
0 15 0x1 0x0 /* PA15 periph A */
0 16 0x1 0x0 /* PA16 periph A */
0 17 0x1 0x0 /* PA17 periph A */
0 18 0x1 0x0 /* PA18 periph A */
0 19 0x1 0x0 /* PA19 periph A */
0 20 0x1 0x0 /* PA20 periph A */
0 21 0x1 0x0>; /* PA21 periph A */
<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
};
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
atmel,pins =
<0 22 0x2 0x0 /* PA22 periph B */
0 23 0x2 0x0 /* PA23 periph B */
0 24 0x2 0x0 /* PA24 periph B */
0 25 0x2 0x0 /* PA25 periph B */
0 26 0x2 0x0 /* PA26 periph B */
0 27 0x2 0x0 /* PA27 periph B */
0 28 0x2 0x0 /* PA28 periph B */
0 29 0x2 0x0>; /* PA29 periph B */
<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
};
pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
atmel,pins =
<0 10 0x2 0x0 /* PA10 periph B */
0 11 0x2 0x0 /* PA11 periph B */
0 22 0x2 0x0 /* PA22 periph B */
0 25 0x2 0x0 /* PA25 periph B */
0 26 0x2 0x0 /* PA26 periph B */
0 27 0x2 0x0 /* PA27 periph B */
0 28 0x2 0x0 /* PA28 periph B */
0 29 0x2 0x0>; /* PA29 periph B */
<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
};
};
mmc0 {
pinctrl_mmc0_clk: mmc0_clk-0 {
atmel,pins =
<0 8 0x1 0x0>; /* PA8 periph A */
<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
};
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
atmel,pins =
<0 7 0x1 0x1 /* PA7 periph A with pullup */
0 6 0x1 0x1>; /* PA6 periph A with pullup */
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
<0 9 0x1 0x1 /* PA9 periph A with pullup */
0 10 0x1 0x1 /* PA10 periph A with pullup */
0 11 0x1 0x1>; /* PA11 periph A with pullup */
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
};
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
atmel,pins =
<0 1 0x2 0x1 /* PA1 periph B with pullup */
0 0 0x2 0x1>; /* PA0 periph B with pullup */
<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
};
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
atmel,pins =
<0 5 0x2 0x1 /* PA5 periph B with pullup */
0 4 0x2 0x1 /* PA4 periph B with pullup */
0 3 0x2 0x1>; /* PA3 periph B with pullup */
<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
<1 16 0x1 0x0 /* PB16 periph A */
1 17 0x1 0x0 /* PB17 periph A */
1 18 0x1 0x0>; /* PB18 periph A */
<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
<1 19 0x1 0x0 /* PB19 periph A */
1 20 0x1 0x0 /* PB20 periph A */
1 21 0x1 0x0>; /* PB21 periph A */
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <2 4 1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -353,7 +360,7 @@ pioA: gpio@fffff400 {
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <3 4 1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -363,7 +370,7 @@ pioB: gpio@fffff600 {
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 4 1>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -374,7 +381,7 @@ pioC: gpio@fffff800 {
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@ -383,7 +390,7 @@ dbgu: serial@fffff200 {
usart0: serial@fffb0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb0000 0x200>;
interrupts = <6 4 5>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -394,7 +401,7 @@ usart0: serial@fffb0000 {
usart1: serial@fffb4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb4000 0x200>;
interrupts = <7 4 5>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -405,7 +412,7 @@ usart1: serial@fffb4000 {
usart2: serial@fffb8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb8000 0x200>;
interrupts = <8 4 5>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -416,7 +423,7 @@ usart2: serial@fffb8000 {
usart3: serial@fffd0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd0000 0x200>;
interrupts = <23 4 5>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -427,7 +434,7 @@ usart3: serial@fffd0000 {
uart0: serial@fffd4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd4000 0x200>;
interrupts = <24 4 5>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -438,7 +445,7 @@ uart0: serial@fffd4000 {
uart1: serial@fffd8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd8000 0x200>;
interrupts = <25 4 5>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -449,7 +456,7 @@ uart1: serial@fffd8000 {
macb0: ethernet@fffc4000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffc4000 0x100>;
interrupts = <21 4 3>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
@ -458,14 +465,14 @@ macb0: ethernet@fffc4000 {
usb1: gadget@fffa4000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfffa4000 0x4000>;
interrupts = <10 4 2>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
i2c0: i2c@fffac000 {
compatible = "atmel,at91sam9260-i2c";
reg = <0xfffac000 0x100>;
interrupts = <11 4 6>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -474,7 +481,7 @@ i2c0: i2c@fffac000 {
mmc0: mmc@fffa8000 {
compatible = "atmel,hsmci";
reg = <0xfffa8000 0x600>;
interrupts = <9 4 0>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -483,7 +490,7 @@ mmc0: mmc@fffa8000 {
ssc0: ssc@fffbc000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffbc000 0x4000>;
interrupts = <14 4 5>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@ -494,7 +501,7 @@ spi0: spi@fffc8000 {
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffc8000 0x200>;
interrupts = <12 4 3>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@ -505,7 +512,7 @@ spi1: spi@fffcc000 {
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffcc000 0x200>;
interrupts = <13 4 3>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@ -514,7 +521,7 @@ spi1: spi@fffcc000 {
adc0: adc@fffe0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
interrupts = <5 4 0>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0xf>;
atmel,adc-vref = <3300>;
@ -567,8 +574,8 @@ nand0: nand@40000000 {
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
gpios = <&pioC 13 0
&pioC 14 0
gpios = <&pioC 13 GPIO_ACTIVE_HIGH
&pioC 14 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@ -577,15 +584,15 @@ &pioC 14 0
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 4 2>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 23 0 /* sda */
&pioA 24 0 /* scl */
gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
&pioA 24 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;

203
arch/arm/boot/dts/at91sam9263.dtsi
View file

@ -6,7 +6,10 @@
* Licensed under GPLv2 only.
*/
/include/ "skeleton.dtsi"
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9263 family SoC";
@ -72,13 +75,13 @@ ramc: ramc@ffffe200 {
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
interrupts = <19 4 0>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
};
rstc@fffffd00 {
@ -110,221 +113,221 @@ pinctrl@fffff200 {
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<2 30 0x1 0x0 /* PC30 periph A */
2 31 0x1 0x1>; /* PC31 periph with pullup */
<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<0 26 0x1 0x1 /* PA26 periph A with pullup */
0 27 0x1 0x0>; /* PA27 periph A */
<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<0 28 0x1 0x0>; /* PA28 periph A */
<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<0 29 0x1 0x0>; /* PA29 periph A */
<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<3 0 0x1 0x1 /* PD0 periph A with pullup */
3 1 0x1 0x0>; /* PD1 periph A */
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<3 7 0x2 0x0>; /* PD7 periph B */
<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<3 8 0x2 0x0>; /* PD8 periph B */
<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
<3 2 0x1 0x1 /* PD2 periph A with pullup */
3 3 0x1 0x0>; /* PD3 periph A */
<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<3 5 0x2 0x0>; /* PD5 periph B */
<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<4 6 0x2 0x0>; /* PD6 periph B */
<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
};
};
macb {
pinctrl_macb_rmii: macb_rmii-0 {
atmel,pins =
<2 25 0x2 0x0 /* PC25 periph B */
4 21 0x1 0x0 /* PE21 periph A */
4 23 0x1 0x0 /* PE23 periph A */
4 24 0x1 0x0 /* PE24 periph A */
4 25 0x1 0x0 /* PE25 periph A */
4 26 0x1 0x0 /* PE26 periph A */
4 27 0x1 0x0 /* PE27 periph A */
4 28 0x1 0x0 /* PE28 periph A */
4 29 0x1 0x0 /* PE29 periph A */
4 30 0x1 0x0>; /* PE30 periph A */
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
};
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
atmel,pins =
<2 20 0x2 0x0 /* PC20 periph B */
2 21 0x2 0x0 /* PC21 periph B */
2 22 0x2 0x0 /* PC22 periph B */
2 23 0x2 0x0 /* PC23 periph B */
2 24 0x2 0x0 /* PC24 periph B */
2 25 0x2 0x0 /* PC25 periph B */
2 27 0x2 0x0 /* PC27 periph B */
4 22 0x2 0x0>; /* PE22 periph B */
<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
};
};
mmc0 {
pinctrl_mmc0_clk: mmc0_clk-0 {
atmel,pins =
<0 12 0x1 0x0>; /* PA12 periph A */
<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
};
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
atmel,pins =
<0 1 0x1 0x1 /* PA1 periph A with pullup */
0 0 0x1 0x1>; /* PA0 periph A with pullup */
<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
<0 3 0x1 0x1 /* PA3 periph A with pullup */
0 4 0x1 0x1 /* PA4 periph A with pullup */
0 5 0x1 0x1>; /* PA5 periph A with pullup */
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
};
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
atmel,pins =
<0 16 0x1 0x1 /* PA16 periph A with pullup */
0 17 0x1 0x1>; /* PA17 periph A with pullup */
<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
};
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
atmel,pins =
<0 18 0x1 0x1 /* PA18 periph A with pullup */
0 19 0x1 0x1 /* PA19 periph A with pullup */
0 20 0x1 0x1>; /* PA20 periph A with pullup */
<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
};
};
mmc1 {
pinctrl_mmc1_clk: mmc1_clk-0 {
atmel,pins =
<0 6 0x1 0x0>; /* PA6 periph A */
<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
};
pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
atmel,pins =
<0 7 0x1 0x1 /* PA7 periph A with pullup */
0 8 0x1 0x1>; /* PA8 periph A with pullup */
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
};
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
atmel,pins =
<0 9 0x1 0x1 /* PA9 periph A with pullup */
0 10 0x1 0x1 /* PA10 periph A with pullup */
0 11 0x1 0x1>; /* PA11 periph A with pullup */
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
};
pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
atmel,pins =
<0 21 0x1 0x1 /* PA21 periph A with pullup */
0 22 0x1 0x1>; /* PA22 periph A with pullup */
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
};
pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
atmel,pins =
<0 23 0x1 0x1 /* PA23 periph A with pullup */
0 24 0x1 0x1 /* PA24 periph A with pullup */
0 25 0x1 0x1>; /* PA25 periph A with pullup */
<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
<1 0 0x2 0x0 /* PB0 periph B */
1 1 0x2 0x0 /* PB1 periph B */
1 2 0x2 0x0>; /* PB2 periph B */
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
<1 3 0x2 0x0 /* PB3 periph B */
1 4 0x2 0x0 /* PB4 periph B */
1 5 0x2 0x0>; /* PB5 periph B */
<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx-0 {
atmel,pins =
<1 6 0x1 0x0 /* PB6 periph A */
1 7 0x1 0x0 /* PB7 periph A */
1 8 0x1 0x0>; /* PB8 periph A */
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
};
pinctrl_ssc1_rx: ssc1_rx-0 {
atmel,pins =
<1 9 0x1 0x0 /* PB9 periph A */
1 10 0x1 0x0 /* PB10 periph A */
1 11 0x1 0x0>; /* PB11 periph A */
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */
0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */
0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */
<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */
1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */
1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
};
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
interrupts = <2 4 1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -334,7 +337,7 @@ pioA: gpio@fffff200 {
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <3 4 1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -344,7 +347,7 @@ pioB: gpio@fffff400 {
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <4 4 1>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -354,7 +357,7 @@ pioC: gpio@fffff600 {
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <4 4 1>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -364,7 +367,7 @@ pioD: gpio@fffff800 {
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <4 4 1>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -375,7 +378,7 @@ pioE: gpio@fffffa00 {
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@ -384,7 +387,7 @@ dbgu: serial@ffffee00 {
usart0: serial@fff8c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff8c000 0x200>;
interrupts = <7 4 5>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -395,7 +398,7 @@ usart0: serial@fff8c000 {
usart1: serial@fff90000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff90000 0x200>;
interrupts = <8 4 5>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -406,7 +409,7 @@ usart1: serial@fff90000 {
usart2: serial@fff94000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff94000 0x200>;
interrupts = <9 4 5>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -417,7 +420,7 @@ usart2: serial@fff94000 {
ssc0: ssc@fff98000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfff98000 0x4000>;
interrupts = <16 4 5>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@ -426,7 +429,7 @@ ssc0: ssc@fff98000 {
ssc1: ssc@fff9c000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfff9c000 0x4000>;
interrupts = <17 4 5>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
status = "disabled";
@ -435,7 +438,7 @@ ssc1: ssc@fff9c000 {
macb0: ethernet@fffbc000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffbc000 0x100>;
interrupts = <21 4 3>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
@ -444,14 +447,14 @@ macb0: ethernet@fffbc000 {
usb1: gadget@fff78000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfff78000 0x4000>;
interrupts = <24 4 2>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
i2c0: i2c@fff88000 {
compatible = "atmel,at91sam9263-i2c";
reg = <0xfff88000 0x100>;
interrupts = <13 4 6>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -460,7 +463,7 @@ i2c0: i2c@fff88000 {
mmc0: mmc@fff80000 {
compatible = "atmel,hsmci";
reg = <0xfff80000 0x600>;
interrupts = <10 4 0>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -469,7 +472,7 @@ mmc0: mmc@fff80000 {
mmc1: mmc@fff84000 {
compatible = "atmel,hsmci";
reg = <0xfff84000 0x600>;
interrupts = <11 4 0>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -486,7 +489,7 @@ spi0: spi@fffa4000 {
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffa4000 0x200>;
interrupts = <14 4 3>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@ -497,7 +500,7 @@ spi1: spi@fffa8000 {
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffa8000 0x200>;
interrupts = <15 4 3>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@ -515,8 +518,8 @@ nand0: nand@40000000 {
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
gpios = <&pioA 22 0
&pioD 15 0
gpios = <&pioA 22 GPIO_ACTIVE_HIGH
&pioD 15 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@ -525,15 +528,15 @@ &pioD 15 0
usb0: ohci@00a00000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00a00000 0x100000>;
interrupts = <29 4 2>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioB 4 0 /* sda */
&pioB 5 0 /* scl */
gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
&pioB 5 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;

24
arch/arm/boot/dts/at91sam9263ek.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
/include/ "at91sam9263.dtsi"
#include "at91sam9263.dtsi"
/ {
model = "Atmel at91sam9263ek";
@ -51,7 +51,7 @@ macb0: ethernet@fffbc000 {
};
usb1: gadget@fff78000 {
atmel,vbus-gpio = <&pioA 25 0>;
atmel,vbus-gpio = <&pioA 25 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@ -65,8 +65,8 @@ &pinctrl_mmc0_slot0_cmd_dat0
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioE 18 0>;
wp-gpios = <&pioE 19 0>;
cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>;
wp-gpios = <&pioE 19 GPIO_ACTIVE_HIGH>;
};
};
@ -74,8 +74,8 @@ pinctrl@fffff200 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<5 18 0x0 0x5 /* PE18 gpio CD pin pull up and deglitch */
5 19 0x0 0x1>; /* PE19 gpio WP pin pull up */
<AT91_PIOE 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PE18 gpio CD pin pull up and deglitch */
AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */
};
};
};
@ -141,8 +141,8 @@ data@7ca0000 {
usb0: ohci@00a00000 {
num-ports = <2>;
status = "okay";
atmel,vbus-gpio = <&pioA 24 0
&pioA 21 0
atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH
&pioA 21 GPIO_ACTIVE_HIGH
>;
};
};
@ -152,13 +152,13 @@ leds {
d3 {
label = "d3";
gpios = <&pioB 7 0>;
gpios = <&pioB 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
d2 {
label = "d2";
gpios = <&pioC 29 1>;
gpios = <&pioC 29 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
};
@ -168,14 +168,14 @@ gpio_keys {
left_click {
label = "left_click";
gpios = <&pioC 5 1>;
gpios = <&pioC 5 GPIO_ACTIVE_LOW>;
linux,code = <272>;
gpio-key,wakeup;
};
right_click {
label = "right_click";
gpios = <&pioC 4 1>;
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
linux,code = <273>;
gpio-key,wakeup;
};

2
arch/arm/boot/dts/at91sam9g15.dtsi
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/include/ "at91sam9x5.dtsi"
#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9G15 SoC";

4
arch/arm/boot/dts/at91sam9g15ek.dts
View file

@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9g15.dtsi"
/include/ "at91sam9x5ek.dtsi"
#include "at91sam9g15.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G15-EK";

2
arch/arm/boot/dts/at91sam9g20.dtsi
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/include/ "at91sam9260.dtsi"
#include "at91sam9260.dtsi"
/ {
model = "Atmel AT91SAM9G20 family SoC";

6
arch/arm/boot/dts/at91sam9g20ek.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g20ek_common.dtsi"
#include "at91sam9g20ek_common.dtsi"
/ {
model = "Atmel at91sam9g20ek";
@ -17,13 +17,13 @@ leds {
ds1 {
label = "ds1";
gpios = <&pioA 9 0>;
gpios = <&pioA 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
gpios = <&pioA 6 1>;
gpios = <&pioA 6 GPIO_ACTIVE_LOW>;
};
};
};

10
arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g20ek_common.dtsi"
#include "at91sam9g20ek_common.dtsi"
/ {
model = "Atmel at91sam9g20ek 2 mmc";
@ -23,7 +23,7 @@ &pinctrl_mmc0_slot0_cmd_dat0
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioC 2 0>;
cd-gpios = <&pioC 2 GPIO_ACTIVE_HIGH>;
};
};
@ -31,7 +31,7 @@ pinctrl@fffff400 {
mmc0_slot0 {
pinctrl_board_mmc0_slot0: mmc0_slot0-board {
atmel,pins =
<2 2 0x0 0x5>; /* PC2 gpio CD pin pull up and deglitch */
<AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC2 gpio CD pin pull up and deglitch */
};
};
};
@ -43,13 +43,13 @@ leds {
ds1 {
label = "ds1";
gpios = <&pioB 9 0>;
gpios = <&pioB 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
gpios = <&pioB 8 1>;
gpios = <&pioB 8 GPIO_ACTIVE_LOW>;
};
};
};

28
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
View file

@ -5,7 +5,7 @@
*
* Licensed under GPLv2.
*/
/include/ "at91sam9g20.dtsi"
#include "at91sam9g20.dtsi"
/ {
@ -34,10 +34,17 @@ pinctrl@fffff400 {
board {
pinctrl_pck0_as_mck: pck0_as_mck {
atmel,pins =
<2 1 0x2 0x0>; /* PC1 periph B */
<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */
};
};
mmc0_slot1 {
pinctrl_board_mmc0_slot1: mmc0_slot1-board {
atmel,pins =
<AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC9 gpio CD pin pull up and deglitch */
};
};
};
dbgu: serial@fffff200 {
@ -65,7 +72,7 @@ macb0: ethernet@fffc4000 {
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@ -79,16 +86,7 @@ &pinctrl_mmc0_slot1_cmd_dat0
slot@1 {
reg = <1>;
bus-width = <4>;
cd-gpios = <&pioC 9 0>;
};
};
pinctrl@fffff400 {
mmc0_slot1 {
pinctrl_board_mmc0_slot1: mmc0_slot1-board {
atmel,pins =
<2 9 0x0 0x5>; /* PC9 gpio CD pin pull up and deglitch */
};
cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>;
};
};
@ -180,14 +178,14 @@ gpio_keys {
btn3 {
label = "Button 3";
gpios = <&pioA 30 1>;
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
gpio-key,wakeup;
};
btn4 {
label = "Button 4";
gpios = <&pioA 31 1>;
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
gpio-key,wakeup;
};

2
arch/arm/boot/dts/at91sam9g25.dtsi
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/include/ "at91sam9x5.dtsi"
#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9G25 SoC";

4
arch/arm/boot/dts/at91sam9g25ek.dts
View file

@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9g25.dtsi"
/include/ "at91sam9x5ek.dtsi"
#include "at91sam9g25.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G25-EK";

2
arch/arm/boot/dts/at91sam9g35.dtsi
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/include/ "at91sam9x5.dtsi"
#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9G35 SoC";

4
arch/arm/boot/dts/at91sam9g35ek.dts
View file

@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9g35.dtsi"
/include/ "at91sam9x5ek.dtsi"
#include "at91sam9g35.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G35-EK";

213
arch/arm/boot/dts/at91sam9g45.dtsi
View file

@ -9,7 +9,10 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9G45 family SoC";
@ -83,7 +86,7 @@ rstc@fffffd00 {
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
@ -95,19 +98,19 @@ shdwc@fffffd10 {
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
interrupts = <18 4 0>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@fffd4000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffd4000 0x100>;
interrupts = <18 4 0>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
};
dma: dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
interrupts = <21 4 0>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
@ -130,221 +133,221 @@ pinctrl@fffff200 {
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<1 12 0x1 0x0 /* PB12 periph A */
1 13 0x1 0x0>; /* PB13 periph A */
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<1 19 0x1 0x1 /* PB19 periph A with pullup */
1 18 0x1 0x0>; /* PB18 periph A */
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<1 17 0x2 0x0>; /* PB17 periph B */
<AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<1 15 0x2 0x0>; /* PB15 periph B */
<AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
};
};
uart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<1 4 0x1 0x1 /* PB4 periph A with pullup */
1 5 0x1 0x0>; /* PB5 periph A */
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<3 16 0x1 0x0>; /* PD16 periph A */
<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<3 17 0x1 0x0>; /* PD17 periph A */
<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
<1 6 0x1 0x1 /* PB6 periph A with pullup */
1 7 0x1 0x0>; /* PB7 periph A */
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<2 9 0x2 0x0>; /* PC9 periph B */
<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<2 11 0x2 0x0>; /* PC11 periph B */
<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
<1 8 0x1 0x1 /* PB9 periph A with pullup */
1 9 0x1 0x0>; /* PB8 periph A */
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<0 23 0x2 0x0>; /* PA23 periph B */
<AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<0 24 0x2 0x0>; /* PA24 periph B */
<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
<AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
};
};
macb {
pinctrl_macb_rmii: macb_rmii-0 {
atmel,pins =
<0 10 0x1 0x0 /* PA10 periph A */
0 11 0x1 0x0 /* PA11 periph A */
0 12 0x1 0x0 /* PA12 periph A */
0 13 0x1 0x0 /* PA13 periph A */
0 14 0x1 0x0 /* PA14 periph A */
0 15 0x1 0x0 /* PA15 periph A */
0 16 0x1 0x0 /* PA16 periph A */
0 17 0x1 0x0 /* PA17 periph A */
0 18 0x1 0x0 /* PA18 periph A */
0 19 0x1 0x0>; /* PA19 periph A */
<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
};
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
atmel,pins =
<0 6 0x2 0x0 /* PA6 periph B */
0 7 0x2 0x0 /* PA7 periph B */
0 8 0x2 0x0 /* PA8 periph B */
0 9 0x2 0x0 /* PA9 periph B */
0 27 0x2 0x0 /* PA27 periph B */
0 28 0x2 0x0 /* PA28 periph B */
0 29 0x2 0x0 /* PA29 periph B */
0 30 0x2 0x0>; /* PA30 periph B */
<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
};
};
mmc0 {
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
atmel,pins =
<0 0 0x1 0x0 /* PA0 periph A */
0 1 0x1 0x1 /* PA1 periph A with pullup */
0 2 0x1 0x1>; /* PA2 periph A with pullup */
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
<0 3 0x1 0x1 /* PA3 periph A with pullup */
0 4 0x1 0x1 /* PA4 periph A with pullup */
0 5 0x1 0x1>; /* PA5 periph A with pullup */
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
};
pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
atmel,pins =
<0 6 0x1 0x1 /* PA6 periph A with pullup */
0 7 0x1 0x1 /* PA7 periph A with pullup */
0 8 0x1 0x1 /* PA8 periph A with pullup */
0 9 0x1 0x1>; /* PA9 periph A with pullup */
<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
};
};
mmc1 {
pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
atmel,pins =
<0 31 0x1 0x0 /* PA31 periph A */
0 22 0x1 0x1 /* PA22 periph A with pullup */
0 23 0x1 0x1>; /* PA23 periph A with pullup */
<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
};
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
atmel,pins =
<0 24 0x1 0x1 /* PA24 periph A with pullup */
0 25 0x1 0x1 /* PA25 periph A with pullup */
0 26 0x1 0x1>; /* PA26 periph A with pullup */
<AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
};
pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
atmel,pins =
<0 27 0x1 0x1 /* PA27 periph A with pullup */
0 28 0x1 0x1 /* PA28 periph A with pullup */
0 29 0x1 0x1 /* PA29 periph A with pullup */
0 20 0x1 0x1>; /* PA30 periph A with pullup */
<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
<3 0 0x1 0x0 /* PD0 periph A */
3 1 0x1 0x0 /* PD1 periph A */
3 2 0x1 0x0>; /* PD2 periph A */
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
<3 3 0x1 0x0 /* PD3 periph A */
3 4 0x1 0x0 /* PD4 periph A */
3 5 0x1 0x0>; /* PD5 periph A */
<AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx-0 {
atmel,pins =
<3 10 0x1 0x0 /* PD10 periph A */
3 11 0x1 0x0 /* PD11 periph A */
3 12 0x1 0x0>; /* PD12 periph A */
<AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
};
pinctrl_ssc1_rx: ssc1_rx-0 {
atmel,pins =
<3 13 0x1 0x0 /* PD13 periph A */
3 14 0x1 0x0 /* PD14 periph A */
3 15 0x1 0x0>; /* PD15 periph A */
<AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */
1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */
1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */
1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */
1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
};
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
interrupts = <2 4 1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -354,7 +357,7 @@ pioA: gpio@fffff200 {
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <3 4 1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -364,7 +367,7 @@ pioB: gpio@fffff400 {
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <4 4 1>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -374,7 +377,7 @@ pioC: gpio@fffff600 {
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <5 4 1>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -384,7 +387,7 @@ pioD: gpio@fffff800 {
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <5 4 1>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -395,7 +398,7 @@ pioE: gpio@fffffa00 {
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@ -404,7 +407,7 @@ dbgu: serial@ffffee00 {
usart0: serial@fff8c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff8c000 0x200>;
interrupts = <7 4 5>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -415,7 +418,7 @@ usart0: serial@fff8c000 {
usart1: serial@fff90000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff90000 0x200>;
interrupts = <8 4 5>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -426,7 +429,7 @@ usart1: serial@fff90000 {
usart2: serial@fff94000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff94000 0x200>;
interrupts = <9 4 5>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -437,7 +440,7 @@ usart2: serial@fff94000 {
usart3: serial@fff98000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff98000 0x200>;
interrupts = <10 4 5>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@ -448,7 +451,7 @@ usart3: serial@fff98000 {
macb0: ethernet@fffbc000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffbc000 0x100>;
interrupts = <25 4 3>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
@ -457,7 +460,7 @@ macb0: ethernet@fffbc000 {
i2c0: i2c@fff84000 {
compatible = "atmel,at91sam9g10-i2c";
reg = <0xfff84000 0x100>;
interrupts = <12 4 6>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -466,7 +469,7 @@ i2c0: i2c@fff84000 {
i2c1: i2c@fff88000 {
compatible = "atmel,at91sam9g10-i2c";
reg = <0xfff88000 0x100>;
interrupts = <13 4 6>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@ -475,7 +478,7 @@ i2c1: i2c@fff88000 {
ssc0: ssc@fff9c000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xfff9c000 0x4000>;
interrupts = <16 4 5>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@ -484,7 +487,7 @@ ssc0: ssc@fff9c000 {
ssc1: ssc@fffa0000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xfffa0000 0x4000>;
interrupts = <17 4 5>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
status = "disabled";
@ -493,7 +496,7 @@ ssc1: ssc@fffa0000 {
adc0: adc@fffb0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffb0000 0x100>;
interrupts = <20 4 0>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0xff>;
atmel,adc-vref = <3300>;
@ -533,7 +536,7 @@ trigger@3 {
mmc0: mmc@fff80000 {
compatible = "atmel,hsmci";
reg = <0xfff80000 0x600>;
interrupts = <11 4 0>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 0>;
dma-names = "rxtx";
#address-cells = <1>;
@ -544,7 +547,7 @@ mmc0: mmc@fff80000 {
mmc1: mmc@fffd0000 {
compatible = "atmel,hsmci";
reg = <0xfffd0000 0x600>;
interrupts = <29 4 0>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 13>;
dma-names = "rxtx";
#address-cells = <1>;
@ -592,8 +595,8 @@ nand0: nand@40000000 {
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
gpios = <&pioC 8 0
&pioC 14 0
gpios = <&pioC 8 GPIO_ACTIVE_HIGH
&pioC 14 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@ -602,22 +605,22 @@ &pioC 14 0
usb0: ohci@00700000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00700000 0x100000>;
interrupts = <22 4 2>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
usb1: ehci@00800000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00800000 0x100000>;
interrupts = <22 4 2>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 20 0 /* sda */
&pioA 21 0 /* scl */
gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
&pioA 21 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;

38
arch/arm/boot/dts/at91sam9m10g45ek.dts
View file

@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9g45.dtsi"
#include "at91sam9g45.dtsi"
/ {
model = "Atmel AT91SAM9M10G45-EK";
@ -68,7 +68,7 @@ &pinctrl_mmc0_slot0_clk_cmd_dat0
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 10 0>;
cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>;
};
};
@ -81,8 +81,8 @@ &pinctrl_mmc1_slot0_clk_cmd_dat0
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 11 0>;
wp-gpios = <&pioD 29 0>;
cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>;
wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
};
};
@ -90,15 +90,15 @@ pinctrl@fffff200 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */
<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deglitch */
};
};
mmc1 {
pinctrl_board_mmc1: mmc1-board {
atmel,pins =
<3 11 0x0 0x5 /* PD11 gpio CD pin pull up and deglitch */
3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */
<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and deglitch */
AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */
};
};
};
@ -139,8 +139,8 @@ data@4000000 {
usb0: ohci@00700000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 1 1
&pioD 3 1>;
atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
&pioD 3 GPIO_ACTIVE_LOW>;
};
usb1: ehci@00800000 {
@ -153,19 +153,19 @@ leds {
d8 {
label = "d8";
gpios = <&pioD 30 0>;
gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
d6 {
label = "d6";
gpios = <&pioD 0 1>;
gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
d7 {
label = "d7";
gpios = <&pioD 31 1>;
gpios = <&pioD 31 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
};
};
@ -175,45 +175,45 @@ gpio_keys {
left_click {
label = "left_click";
gpios = <&pioB 6 1>;
gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
linux,code = <272>;
gpio-key,wakeup;
};
right_click {
label = "right_click";
gpios = <&pioB 7 1>;
gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
linux,code = <273>;
gpio-key,wakeup;
};
left {
label = "Joystick Left";
gpios = <&pioB 14 1>;
gpios = <&pioB 14 GPIO_ACTIVE_LOW>;
linux,code = <105>;
};
right {
label = "Joystick Right";
gpios = <&pioB 15 1>;
gpios = <&pioB 15 GPIO_ACTIVE_LOW>;
linux,code = <106>;
};
up {
label = "Joystick Up";
gpios = <&pioB 16 1>;
gpios = <&pioB 16 GPIO_ACTIVE_LOW>;
linux,code = <103>;
};
down {
label = "Joystick Down";
gpios = <&pioB 17 1>;
gpios = <&pioB 17 GPIO_ACTIVE_LOW>;
linux,code = <108>;
};
enter {
label = "Joystick Press";
gpios = <&pioB 18 1>;
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
linux,code = <28>;
};
};

141
arch/arm/boot/dts/at91sam9n12.dtsi
View file

@ -7,7 +7,10 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9N12 SoC";
@ -78,7 +81,7 @@ rstc@fffffe00 {
pit: timer@fffffe30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
shdwc@fffffe10 {
@ -89,7 +92,7 @@ shdwc@fffffe10 {
mmc0: mmc@f0008000 {
compatible = "atmel,hsmci";
reg = <0xf0008000 0x600>;
interrupts = <12 4 0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 0>;
dma-names = "rxtx";
#address-cells = <1>;
@ -100,19 +103,19 @@ mmc0: mmc@f0008000 {
tcb0: timer@f8008000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf8008000 0x100>;
interrupts = <17 4 0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@f800c000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf800c000 0x100>;
interrupts = <17 4 0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
};
dma: dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
interrupts = <20 4 0>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
@ -134,159 +137,159 @@ pinctrl@fffff400 {
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<0 9 0x1 0x0 /* PA9 periph A */
0 10 0x1 0x1>; /* PA10 periph with pullup */
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<0 1 0x1 0x1 /* PA1 periph A with pullup */
0 0 0x1 0x0>; /* PA0 periph A */
<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<0 2 0x1 0x0>; /* PA2 periph A */
<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<0 3 0x1 0x0>; /* PA3 periph A */
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<0 6 0x1 0x1 /* PA6 periph A with pullup */
0 5 0x1 0x0>; /* PA5 periph A */
<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
<0 8 0x1 0x1 /* PA8 periph A with pullup */
0 7 0x1 0x0>; /* PA7 periph A */
<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<1 0 0x2 0x0>; /* PB0 periph B */
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<1 1 0x2 0x0>; /* PB1 periph B */
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
<2 23 0x2 0x1 /* PC23 periph B with pullup */
2 22 0x2 0x0>; /* PC22 periph B */
<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<2 24 0x2 0x0>; /* PC24 periph B */
<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<2 25 0x2 0x0>; /* PC25 periph B */
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
<2 9 0x3 0x1 /* PC9 periph C with pullup */
2 8 0x3 0x0>; /* PC8 periph C */
<AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
<2 16 0x3 0x1 /* PC17 periph C with pullup */
2 17 0x3 0x0>; /* PC16 periph C */
<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/
3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */
<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
};
};
mmc0 {
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
atmel,pins =
<0 17 0x1 0x0 /* PA17 periph A */
0 16 0x1 0x1 /* PA16 periph A with pullup */
0 15 0x1 0x1>; /* PA15 periph A with pullup */
<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
<0 18 0x1 0x1 /* PA18 periph A with pullup */
0 19 0x1 0x1 /* PA19 periph A with pullup */
0 20 0x1 0x1>; /* PA20 periph A with pullup */
<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
};
pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
atmel,pins =
<0 11 0x2 0x1 /* PA11 periph B with pullup */
0 12 0x2 0x1 /* PA12 periph B with pullup */
0 13 0x2 0x1 /* PA13 periph B with pullup */
0 14 0x2 0x1>; /* PA14 periph B with pullup */
<AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
<0 24 0x2 0x0 /* PA24 periph B */
0 25 0x2 0x0 /* PA25 periph B */
0 26 0x2 0x0>; /* PA26 periph B */
<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
<0 27 0x2 0x0 /* PA27 periph B */
0 28 0x2 0x0 /* PA28 periph B */
0 29 0x2 0x0>; /* PA29 periph B */
<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */
0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */
0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */
0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */
0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <2 4 1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -296,7 +299,7 @@ pioA: gpio@fffff400 {
pioB: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <2 4 1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -306,7 +309,7 @@ pioB: gpio@fffff600 {
pioC: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <3 4 1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -316,7 +319,7 @@ pioC: gpio@fffff800 {
pioD: gpio@fffffa00 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <3 4 1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -327,7 +330,7 @@ pioD: gpio@fffffa00 {
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@ -336,7 +339,7 @@ dbgu: serial@fffff200 {
ssc0: ssc@f0010000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0010000 0x4000>;
interrupts = <28 4 5>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@ -345,7 +348,7 @@ ssc0: ssc@f0010000 {
usart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x4000>;
interrupts = <5 4 5>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
@ -354,7 +357,7 @@ usart0: serial@f801c000 {
usart1: serial@f8020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x4000>;
interrupts = <6 4 5>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
@ -363,7 +366,7 @@ usart1: serial@f8020000 {
usart2: serial@f8024000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8024000 0x4000>;
interrupts = <7 4 5>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
@ -372,7 +375,7 @@ usart2: serial@f8024000 {
usart3: serial@f8028000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8028000 0x4000>;
interrupts = <8 4 5>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
status = "disabled";
@ -381,7 +384,7 @@ usart3: serial@f8028000 {
i2c0: i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>;
interrupts = <9 4 6>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma 1 13>,
<&dma 1 14>;
dma-names = "tx", "rx";
@ -393,7 +396,7 @@ i2c0: i2c@f8010000 {
i2c1: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x100>;
interrupts = <10 4 6>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma 1 15>,
<&dma 1 16>;
dma-names = "tx", "rx";
@ -407,7 +410,7 @@ spi0: spi@f0000000 {
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xf0000000 0x100>;
interrupts = <13 4 3>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@ -418,7 +421,7 @@ spi1: spi@f0004000 {
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xf0004000 0x100>;
interrupts = <14 4 3>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@ -439,8 +442,8 @@ nand0: nand@40000000 {
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
gpios = <&pioD 5 0
&pioD 4 0
gpios = <&pioD 5 GPIO_ACTIVE_HIGH
&pioD 4 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@ -449,15 +452,15 @@ &pioD 4 0
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x00100000>;
interrupts = <22 4 2>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 30 0 /* sda */
&pioA 31 0 /* scl */
gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
&pioA 31 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;

14
arch/arm/boot/dts/at91sam9n12ek.dts
View file

@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9n12.dtsi"
#include "at91sam9n12.dtsi"
/ {
model = "Atmel AT91SAM9N12-EK";
@ -55,7 +55,7 @@ &pinctrl_mmc0_slot0_clk_cmd_dat0
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioA 7 0>;
cd-gpios = <&pioA 7 GPIO_ACTIVE_HIGH>;
};
};
@ -63,7 +63,7 @@ pinctrl@fffff400 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<0 7 0x0 0x5>; /* PA7 gpio CD pin pull up and deglitch */
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA7 gpio CD pin pull up and deglitch */
};
};
};
@ -95,19 +95,19 @@ leds {
d8 {
label = "d8";
gpios = <&pioB 4 1>;
gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
};
d9 {
label = "d6";
gpios = <&pioB 5 1>;
gpios = <&pioB 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
d10 {
label = "d7";
gpios = <&pioB 6 0>;
gpios = <&pioB 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
@ -117,7 +117,7 @@ gpio_keys {
enter {
label = "Enter";
gpios = <&pioB 4 1>;
gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
};

22
arch/arm/boot/dts/at91sam9x25.dtsi
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/include/ "at91sam9x5.dtsi"
#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9X25 SoC";
@ -26,16 +26,16 @@ pinctrl@fffff400 {
macb1 {
pinctrl_macb1_rmii: macb1_rmii-0 {
atmel,pins =
<2 16 0x2 0x0 /* PC16 periph B */
2 18 0x2 0x0 /* PC18 periph B */
2 19 0x2 0x0 /* PC19 periph B */
2 20 0x2 0x0 /* PC20 periph B */
2 21 0x2 0x0 /* PC21 periph B */
2 27 0x2 0x0 /* PC27 periph B */
2 28 0x2 0x0 /* PC28 periph B */
2 29 0x2 0x0 /* PC29 periph B */
2 30 0x2 0x0 /* PC30 periph B */
2 31 0x2 0x0>; /* PC31 periph B */
<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
};
};
};

4
arch/arm/boot/dts/at91sam9x25ek.dts
View file

@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9x25.dtsi"
/include/ "at91sam9x5ek.dtsi"
#include "at91sam9x25.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9X25-EK";

2
arch/arm/boot/dts/at91sam9x35.dtsi
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/include/ "at91sam9x5.dtsi"
#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9X35 SoC";

4
arch/arm/boot/dts/at91sam9x35ek.dts
View file

@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9x35.dtsi"
/include/ "at91sam9x5ek.dtsi"
#include "at91sam9x35.dtsi"
#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9X35-EK";

279
arch/arm/boot/dts/at91sam9x5.dtsi
View file

@ -9,7 +9,10 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9x5 family SoC";
@ -85,32 +88,32 @@ shdwc@fffffe10 {
pit: timer@fffffe30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
tcb0: timer@f8008000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf8008000 0x100>;
interrupts = <17 4 0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@f800c000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf800c000 0x100>;
interrupts = <17 4 0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
};
dma0: dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
interrupts = <20 4 0>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
dma1: dma-controller@ffffee00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffee00 0x200>;
interrupts = <21 4 0>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
@ -124,297 +127,297 @@ pinctrl@fffff400 {
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<0 9 0x1 0x0 /* PA9 periph A */
0 10 0x1 0x1>; /* PA10 periph A with pullup */
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<0 0 0x1 0x1 /* PA0 periph A with pullup */
0 1 0x1 0x0>; /* PA1 periph A */
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
<0 2 0x1 0x0>; /* PA2 periph A */
<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
<0 3 0x1 0x0>; /* PA3 periph A */
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
};
pinctrl_usart0_sck: usart0_sck-0 {
atmel,pins =
<0 4 0x1 0x0>; /* PA4 periph A */
<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<0 5 0x1 0x1 /* PA5 periph A with pullup */
0 6 0x1 0x0>; /* PA6 periph A */
<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<2 27 0x3 0x0>; /* PC27 periph C */
<AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<2 28 0x3 0x0>; /* PC28 periph C */
<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
};
pinctrl_usart1_sck: usart1_sck-0 {
atmel,pins =
<2 28 0x3 0x0>; /* PC29 periph C */
<AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
<0 7 0x1 0x1 /* PA7 periph A with pullup */
0 8 0x1 0x0>; /* PA8 periph A */
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
};
pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins =
<1 0 0x2 0x0>; /* PB0 periph B */
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
};
pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins =
<1 1 0x2 0x0>; /* PB1 periph B */
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
};
pinctrl_usart2_sck: usart2_sck-0 {
atmel,pins =
<1 2 0x2 0x0>; /* PB2 periph B */
<AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
<2 22 0x2 0x1 /* PC22 periph B with pullup */
2 23 0x2 0x0>; /* PC23 periph B */
<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<2 24 0x2 0x0>; /* PC24 periph B */
<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<2 25 0x2 0x0>; /* PC25 periph B */
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
};
pinctrl_usart3_sck: usart3_sck-0 {
atmel,pins =
<2 26 0x2 0x0>; /* PC26 periph B */
<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
<2 8 0x3 0x0 /* PC8 periph C */
2 9 0x3 0x1>; /* PC9 periph C with pullup */
<AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
<2 16 0x3 0x0 /* PC16 periph C */
2 17 0x3 0x1>; /* PC17 periph C with pullup */
<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<3 0 0x1 0x0 /* PD0 periph A Read Enable */
3 1 0x1 0x0 /* PD1 periph A Write Enable */
3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */
3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */
3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */
3 6 0x1 0x0 /* PD6 periph A Data bit 0 */
3 7 0x1 0x0 /* PD7 periph A Data bit 1 */
3 8 0x1 0x0 /* PD8 periph A Data bit 2 */
3 9 0x1 0x0 /* PD9 periph A Data bit 3 */
3 10 0x1 0x0 /* PD10 periph A Data bit 4 */
3 11 0x1 0x0 /* PD11 periph A Data bit 5 */
3 12 0x1 0x0 /* PD12 periph A Data bit 6 */
3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
};
pinctrl_nand_16bits: nand_16bits-0 {
atmel,pins =
<3 14 0x1 0x0 /* PD14 periph A Data bit 8 */
3 15 0x1 0x0 /* PD15 periph A Data bit 9 */
3 16 0x1 0x0 /* PD16 periph A Data bit 10 */
3 17 0x1 0x0 /* PD17 periph A Data bit 11 */
3 18 0x1 0x0 /* PD18 periph A Data bit 12 */
3 19 0x1 0x0 /* PD19 periph A Data bit 13 */
3 20 0x1 0x0 /* PD20 periph A Data bit 14 */
3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
};
};
macb0 {
pinctrl_macb0_rmii: macb0_rmii-0 {
atmel,pins =
<1 0 0x1 0x0 /* PB0 periph A */
1 1 0x1 0x0 /* PB1 periph A */
1 2 0x1 0x0 /* PB2 periph A */
1 3 0x1 0x0 /* PB3 periph A */
1 4 0x1 0x0 /* PB4 periph A */
1 5 0x1 0x0 /* PB5 periph A */
1 6 0x1 0x0 /* PB6 periph A */
1 7 0x1 0x0 /* PB7 periph A */
1 9 0x1 0x0 /* PB9 periph A */
1 10 0x1 0x0>; /* PB10 periph A */
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
};
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
atmel,pins =
<1 8 0x1 0x0 /* PB8 periph A */
1 11 0x1 0x0 /* PB11 periph A */
1 12 0x1 0x0 /* PB12 periph A */
1 13 0x1 0x0 /* PB13 periph A */
1 14 0x1 0x0 /* PB14 periph A */
1 15 0x1 0x0 /* PB15 periph A */
1 16 0x1 0x0 /* PB16 periph A */
1 17 0x1 0x0>; /* PB17 periph A */
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
};
};
mmc0 {
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
atmel,pins =
<0 17 0x1 0x0 /* PA17 periph A */
0 16 0x1 0x1 /* PA16 periph A with pullup */
0 15 0x1 0x1>; /* PA15 periph A with pullup */
<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
<0 18 0x1 0x1 /* PA18 periph A with pullup */
0 19 0x1 0x1 /* PA19 periph A with pullup */
0 20 0x1 0x1>; /* PA20 periph A with pullup */
<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
};
};
mmc1 {
pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
atmel,pins =
<0 13 0x2 0x0 /* PA13 periph B */
0 12 0x2 0x1 /* PA12 periph B with pullup */
0 11 0x2 0x1>; /* PA11 periph B with pullup */
<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
};
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
atmel,pins =
<0 2 0x2 0x1 /* PA2 periph B with pullup */
0 3 0x2 0x1 /* PA3 periph B with pullup */
0 4 0x2 0x1>; /* PA4 periph B with pullup */
<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
<0 24 0x2 0x0 /* PA24 periph B */
0 25 0x2 0x0 /* PA25 periph B */
0 26 0x2 0x0>; /* PA26 periph B */
<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
<0 27 0x2 0x0 /* PA27 periph B */
0 28 0x2 0x0 /* PA28 periph B */
0 29 0x2 0x0>; /* PA29 periph B */
<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */
0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */
0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */
0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */
0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
};
};
i2c0 {
pinctrl_i2c0: i2c0-0 {
atmel,pins =
<0 30 0x1 0x0 /* PA30 periph A I2C0 data */
0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
};
};
i2c1 {
pinctrl_i2c1: i2c1-0 {
atmel,pins =
<2 0 0x3 0x0 /* PC0 periph C I2C1 data */
2 1 0x3 0x0>; /* PC1 periph C I2C1 clock */
<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
};
};
i2c2 {
pinctrl_i2c2: i2c2-0 {
atmel,pins =
<1 4 0x2 0x0 /* PB4 periph B I2C2 data */
1 5 0x2 0x0>; /* PB5 periph B I2C2 clock */
<AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
};
};
i2c_gpio0 {
pinctrl_i2c_gpio0: i2c_gpio0-0 {
atmel,pins =
<0 30 0x0 0x2 /* PA30 gpio multidrive I2C0 data */
0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */
<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
};
};
i2c_gpio1 {
pinctrl_i2c_gpio1: i2c_gpio1-0 {
atmel,pins =
<2 0 0x0 0x2 /* PC0 gpio multidrive I2C1 data */
2 1 0x0 0x2>; /* PC1 gpio multidrive I2C1 clock */
<AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
};
};
i2c_gpio2 {
pinctrl_i2c_gpio2: i2c_gpio2-0 {
atmel,pins =
<1 4 0x0 0x2 /* PB4 gpio multidrive I2C2 data */
1 5 0x0 0x2>; /* PB5 gpio multidrive I2C2 clock */
<AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
interrupts = <2 4 1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -424,7 +427,7 @@ pioA: gpio@fffff400 {
pioB: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
interrupts = <2 4 1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
#gpio-lines = <19>;
@ -435,7 +438,7 @@ pioB: gpio@fffff600 {
pioC: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
interrupts = <3 4 1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -445,7 +448,7 @@ pioC: gpio@fffff800 {
pioD: gpio@fffffa00 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
interrupts = <3 4 1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
#gpio-lines = <22>;
@ -457,7 +460,7 @@ pioD: gpio@fffffa00 {
ssc0: ssc@f0010000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0010000 0x4000>;
interrupts = <28 4 5>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@ -466,7 +469,7 @@ ssc0: ssc@f0010000 {
mmc0: mmc@f0008000 {
compatible = "atmel,hsmci";
reg = <0xf0008000 0x600>;
interrupts = <12 4 0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma0 1 0>;
dma-names = "rxtx";
#address-cells = <1>;
@ -477,7 +480,7 @@ mmc0: mmc@f0008000 {
mmc1: mmc@f000c000 {
compatible = "atmel,hsmci";
reg = <0xf000c000 0x600>;
interrupts = <26 4 0>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 1 0>;
dma-names = "rxtx";
#address-cells = <1>;
@ -488,7 +491,7 @@ mmc1: mmc@f000c000 {
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@ -497,7 +500,7 @@ dbgu: serial@fffff200 {
usart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x200>;
interrupts = <5 4 5>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
@ -506,7 +509,7 @@ usart0: serial@f801c000 {
usart1: serial@f8020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x200>;
interrupts = <6 4 5>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
@ -515,7 +518,7 @@ usart1: serial@f8020000 {
usart2: serial@f8024000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8024000 0x200>;
interrupts = <7 4 5>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
@ -524,7 +527,7 @@ usart2: serial@f8024000 {
macb0: ethernet@f802c000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
interrupts = <24 4 3>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_rmii>;
status = "disabled";
@ -533,14 +536,14 @@ macb0: ethernet@f802c000 {
macb1: ethernet@f8030000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf8030000 0x100>;
interrupts = <27 4 3>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
status = "disabled";
};
i2c0: i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>;
interrupts = <9 4 6>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 1 7>,
<&dma0 1 8>;
dma-names = "tx", "rx";
@ -554,7 +557,7 @@ i2c0: i2c@f8010000 {
i2c1: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x100>;
interrupts = <10 4 6>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma1 1 5>,
<&dma1 1 6>;
dma-names = "tx", "rx";
@ -568,7 +571,7 @@ i2c1: i2c@f8014000 {
i2c2: i2c@f8018000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8018000 0x100>;
interrupts = <11 4 6>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 1 9>,
<&dma0 1 10>;
dma-names = "tx", "rx";
@ -582,7 +585,7 @@ i2c2: i2c@f8018000 {
adc0: adc@f804c000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xf804c000 0x100>;
interrupts = <19 4 0>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
atmel,adc-use-external;
atmel,adc-channels-used = <0xffff>;
atmel,adc-vref = <3300>;
@ -625,7 +628,7 @@ spi0: spi@f0000000 {
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xf0000000 0x100>;
interrupts = <13 4 3>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@ -636,7 +639,7 @@ spi1: spi@f0004000 {
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xf0004000 0x100>;
interrupts = <14 4 3>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@ -645,7 +648,7 @@ spi1: spi@f0004000 {
rtc@fffffeb0 {
compatible = "atmel,at91rm9200-rtc";
reg = <0xfffffeb0 0x40>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
status = "disabled";
};
};
@ -664,8 +667,8 @@ nand0: nand@40000000 {
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
gpios = <&pioD 5 0
&pioD 4 0
gpios = <&pioD 5 GPIO_ACTIVE_HIGH
&pioD 4 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@ -674,22 +677,22 @@ &pioD 4 0
usb0: ohci@00600000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00600000 0x100000>;
interrupts = <22 4 2>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
usb1: ehci@00700000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
interrupts = <22 4 2>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 30 0 /* sda */
&pioA 31 0 /* scl */
gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
&pioA 31 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
@ -703,8 +706,8 @@ &pioA 31 0 /* scl */
i2c@1 {
compatible = "i2c-gpio";
gpios = <&pioC 0 0 /* sda */
&pioC 1 0 /* scl */
gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
&pioC 1 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
@ -718,8 +721,8 @@ &pioC 1 0 /* scl */
i2c@2 {
compatible = "i2c-gpio";
gpios = <&pioB 4 0 /* sda */
&pioB 5 0 /* scl */
gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
&pioB 5 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;

8
arch/arm/boot/dts/at91sam9x5cm.dtsi
View file

@ -28,7 +28,7 @@ apb {
pinctrl@fffff400 {
1wire_cm {
pinctrl_1wire_cm: 1wire_cm-0 {
atmel,pins = <1 18 0x0 0x2>; /* PB18 multidrive, conflicts with led */
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
};
};
};
@ -75,19 +75,19 @@ leds {
pb18 {
label = "pb18";
gpios = <&pioB 18 1>;
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
pd21 {
label = "pd21";
gpios = <&pioD 21 0>;
gpios = <&pioD 21 GPIO_ACTIVE_HIGH>;
};
};
1wire_cm {
compatible = "w1-gpio";
gpios = <&pioB 18 0>;
gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
linux,open-drain;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_1wire_cm>;

14
arch/arm/boot/dts/at91sam9x5ek.dtsi
View file

@ -6,7 +6,7 @@
*
* Licensed under GPLv2 or later.
*/
/include/ "at91sam9x5cm.dtsi"
#include "at91sam9x5cm.dtsi"
/ {
model = "Atmel AT91SAM9X5-EK";
@ -27,7 +27,7 @@ &pinctrl_mmc0_slot0_clk_cmd_dat0
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 15 0>;
cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
};
};
@ -40,7 +40,7 @@ &pinctrl_mmc1_slot0_clk_cmd_dat0
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 14 0>;
cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
};
};
@ -60,14 +60,14 @@ pinctrl@fffff400 {
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
<3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */
<AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
};
};
mmc1 {
pinctrl_board_mmc1: mmc1-board {
atmel,pins =
<3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */
<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deglitch */
};
};
};
@ -86,8 +86,8 @@ m25p80@0 {
usb0: ohci@00600000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 19 1
&pioD 20 1
atmel,vbus-gpio = <&pioD 19 GPIO_ACTIVE_LOW
&pioD 20 GPIO_ACTIVE_LOW
>;
};

6
arch/arm/boot/dts/ethernut5.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9260.dtsi"
#include "at91sam9260.dtsi"
/ {
model = "Ethernut 5";
@ -40,7 +40,7 @@ macb0: ethernet@fffc4000 {
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@ -52,7 +52,7 @@ nand0: nand@40000000 {
status = "okay";
gpios = <0
&pioC 14 0
&pioC 14 GPIO_ACTIVE_HIGH
0
>;

6
arch/arm/boot/dts/evk-pro3.dts
View file

@ -9,7 +9,7 @@
/dts-v1/;
/include/ "ge863-pro3.dtsi"
#include "ge863-pro3.dtsi"
/ {
model = "Telit EVK-PRO3 for Telit GE863-PRO3";
@ -31,7 +31,7 @@ usart2: serial@fffb8000 {
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@ -50,4 +50,4 @@ i2c@0 {
status = "okay";
};
};
};

2
arch/arm/boot/dts/ge863-pro3.dtsi
View file

@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/include/ "at91sam9260.dtsi"
#include "at91sam9260.dtsi"
/ {
clocks {

16
arch/arm/boot/dts/kizbox.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g20.dtsi"
#include "at91sam9g20.dtsi"
/ {
@ -94,26 +94,26 @@ leds {
led1g {
label = "led1:green";
gpios = <&pioB 0 1>;
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
led1r {
label = "led1:red";
gpios = <&pioB 1 1>;
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
led2g {
label = "led2:green";
gpios = <&pioB 2 1>;
gpios = <&pioB 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
default-state = "on";
};
led2r {
label = "led2:red";
gpios = <&pioB 3 1>;
gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
};
@ -125,16 +125,16 @@ gpio_keys {
reset {
label = "reset";
gpios = <&pioB 30 1>;
gpios = <&pioB 30 GPIO_ACTIVE_LOW>;
linux,code = <0x100>;
gpio-key,wakeup;
};
mode {
label = "mode";
gpios = <&pioB 31 1>;
gpios = <&pioB 31 GPIO_ACTIVE_LOW>;
linux,code = <0x101>;
gpio-key,wakeup;
};
};
};
};

4
arch/arm/boot/dts/mpa1600.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
/include/ "at91rm9200.dtsi"
#include "at91rm9200.dtsi"
/ {
model = "Phontech MPA 1600";
@ -62,7 +62,7 @@ gpio_keys {
monitor_mute {
label = "Monitor mute";
gpios = <&pioC 1 1>;
gpios = <&pioC 1 GPIO_ACTIVE_LOW>;
linux,code = <113>;
};
};

11
arch/arm/boot/dts/msm8660-surf.dts
View file

@ -26,6 +26,17 @@ timer@2000000 {
cpu-offset = <0x40000>;
};
msmgpio: gpio@800000 {
compatible = "qcom,msm-gpio";
reg = <0x00800000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
ngpio = <173>;
interrupts = <0 32 0x4>;
interrupt-controller;
#interrupt-cells = <2>;
};
serial@19c40000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x19c40000 0x1000>,

11
arch/arm/boot/dts/msm8960-cdp.dts
View file

@ -26,6 +26,17 @@ timer@200a000 {
cpu-offset = <0x80000>;
};
msmgpio: gpio@fd510000 {
compatible = "qcom,msm-gpio";
gpio-controller;
#gpio-cells = <2>;
ngpio = <150>;
interrupts = <0 32 0x4>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xfd510000 0x4000>;
};
serial@16440000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x16440000 0x1000>,

22
arch/arm/boot/dts/pm9g45.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g45.dtsi"
#include "at91sam9g45.dtsi"
/ {
model = "Ronetix pm9g45";
@ -42,15 +42,15 @@ pinctrl@fffff200 {
board {
pinctrl_board_nand: nand0-board {
atmel,pins =
<3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/
2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
<AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/
AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
};
};
mmc {
pinctrl_board_mmc: mmc0-board {
atmel,pins =
<3 6 0x0 0x5>; /* PD6 gpio CD pin pull_up and deglitch */
<AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
};
};
};
@ -64,7 +64,7 @@ &pinctrl_mmc0_slot0_clk_cmd_dat0
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 6 0>;
cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
};
};
@ -81,8 +81,8 @@ nand0: nand@40000000 {
nand-on-flash-bbt;
pinctrl-0 = <&pinctrl_board_nand>;
gpios = <&pioD 3 0
&pioC 14 0
gpios = <&pioD 3 GPIO_ACTIVE_HIGH
&pioC 14 GPIO_ACTIVE_HIGH
0
>;
@ -134,13 +134,13 @@ leds {
led0 {
label = "led0";
gpios = <&pioD 0 1>;
gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
led1 {
label = "led1";
gpios = <&pioD 31 0>;
gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
@ -152,13 +152,13 @@ gpio_keys {
right {
label = "SW4";
gpios = <&pioE 7 1>;
gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
linux,code = <106>;
};
up {
label = "SW3";
gpios = <&pioE 8 1>;
gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
linux,code = <103>;
};
};

598
arch/arm/boot/dts/sama5d3.dtsi
View file

@ -8,7 +8,10 @@
* Licensed under GPLv2 or later.
*/
/include/ "skeleton.dtsi"
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel SAMA5D3 family SoC";
@ -59,7 +62,7 @@ apb {
mmc0: mmc@f0000000 {
compatible = "atmel,hsmci";
reg = <0xf0000000 0x600>;
interrupts = <21 4 0>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma0 2 0>;
dma-names = "rxtx";
pinctrl-names = "default";
@ -74,7 +77,7 @@ spi0: spi@f0004000 {
#size-cells = <0>;
compatible = "atmel,at91sam9x5-spi";
reg = <0xf0004000 0x100>;
interrupts = <24 4 3>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@ -83,7 +86,7 @@ spi0: spi@f0004000 {
ssc0: ssc@f0008000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0008000 0x4000>;
interrupts = <38 4 4>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@ -92,7 +95,7 @@ ssc0: ssc@f0008000 {
can0: can@f000c000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf000c000 0x300>;
interrupts = <40 4 3>;
interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_rx_tx>;
status = "disabled";
@ -101,13 +104,13 @@ can0: can@f000c000 {
tcb0: timer@f0010000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf0010000 0x100>;
interrupts = <26 4 0>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
};
i2c0: i2c@f0014000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf0014000 0x4000>;
interrupts = <18 4 6>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 2 7>,
<&dma0 2 8>;
dma-names = "tx", "rx";
@ -121,7 +124,7 @@ i2c0: i2c@f0014000 {
i2c1: i2c@f0018000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf0018000 0x4000>;
interrupts = <19 4 6>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 2 9>,
<&dma0 2 10>;
dma-names = "tx", "rx";
@ -135,7 +138,7 @@ i2c1: i2c@f0018000 {
usart0: serial@f001c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf001c000 0x100>;
interrupts = <12 4 5>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
@ -144,7 +147,7 @@ usart0: serial@f001c000 {
usart1: serial@f0020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf0020000 0x100>;
interrupts = <13 4 5>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
@ -153,7 +156,7 @@ usart1: serial@f0020000 {
macb0: ethernet@f0028000 {
compatible = "cdns,pc302-gem", "cdns,gem";
reg = <0xf0028000 0x100>;
interrupts = <34 4 3>;
interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
status = "disabled";
@ -162,14 +165,14 @@ macb0: ethernet@f0028000 {
isi: isi@f0034000 {
compatible = "atmel,at91sam9g45-isi";
reg = <0xf0034000 0x4000>;
interrupts = <37 4 5>;
interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
status = "disabled";
};
mmc1: mmc@f8000000 {
compatible = "atmel,hsmci";
reg = <0xf8000000 0x600>;
interrupts = <22 4 0>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 2 0>;
dma-names = "rxtx";
pinctrl-names = "default";
@ -182,7 +185,7 @@ mmc1: mmc@f8000000 {
mmc2: mmc@f8004000 {
compatible = "atmel,hsmci";
reg = <0xf8004000 0x600>;
interrupts = <23 4 0>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 2 1>;
dma-names = "rxtx";
pinctrl-names = "default";
@ -197,7 +200,7 @@ spi1: spi@f8008000 {
#size-cells = <0>;
compatible = "atmel,at91sam9x5-spi";
reg = <0xf8008000 0x100>;
interrupts = <25 4 3>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@ -206,7 +209,7 @@ spi1: spi@f8008000 {
ssc1: ssc@f800c000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf800c000 0x4000>;
interrupts = <39 4 4>;
interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
status = "disabled";
@ -215,7 +218,7 @@ ssc1: ssc@f800c000 {
can1: can@f8010000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf8010000 0x300>;
interrupts = <41 4 3>;
interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_rx_tx>;
};
@ -223,13 +226,13 @@ can1: can@f8010000 {
tcb1: timer@f8014000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf8014000 0x100>;
interrupts = <27 4 0>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
};
adc0: adc@f8018000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xf8018000 0x100>;
interrupts = <29 4 5>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_adc0_adtrg
@ -283,7 +286,7 @@ trigger@3 {
tsadcc: tsadcc@f8018000 {
compatible = "atmel,at91sam9x5-tsadcc";
reg = <0xf8018000 0x4000>;
interrupts = <29 4 5>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,tsadcc_clock = <300000>;
atmel,filtering_average = <0x03>;
atmel,pendet_debounce = <0x08>;
@ -295,7 +298,7 @@ tsadcc: tsadcc@f8018000 {
i2c2: i2c@f801c000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf801c000 0x4000>;
interrupts = <20 4 6>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma1 2 11>,
<&dma1 2 12>;
dma-names = "tx", "rx";
@ -307,7 +310,7 @@ i2c2: i2c@f801c000 {
usart2: serial@f8020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x100>;
interrupts = <14 4 5>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
@ -316,7 +319,7 @@ usart2: serial@f8020000 {
usart3: serial@f8024000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8024000 0x100>;
interrupts = <15 4 5>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
status = "disabled";
@ -325,7 +328,7 @@ usart3: serial@f8024000 {
macb1: ethernet@f802c000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
interrupts = <35 4 3>;
interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb1_rmii>;
status = "disabled";
@ -334,7 +337,7 @@ macb1: ethernet@f802c000 {
sha@f8034000 {
compatible = "atmel,sam9g46-sha";
reg = <0xf8034000 0x100>;
interrupts = <42 4 0>;
interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
};
aes@f8038000 {
@ -346,20 +349,20 @@ aes@f8038000 {
tdes@f803c000 {
compatible = "atmel,sam9g46-tdes";
reg = <0xf803c000 0x100>;
interrupts = <44 4 0>;
interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
};
dma0: dma-controller@ffffe600 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffe600 0x200>;
interrupts = <30 4 0>;
interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
dma1: dma-controller@ffffe800 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffe800 0x200>;
interrupts = <31 4 0>;
interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
@ -371,7 +374,7 @@ ramc0: ramc@ffffea00 {
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <2 4 7>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@ -403,202 +406,202 @@ pinctrl@fffff200 {
adc0 {
pinctrl_adc0_adtrg: adc0_adtrg {
atmel,pins =
<3 19 0x1 0x0>; /* PD19 periph A ADTRG */
<AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
};
pinctrl_adc0_ad0: adc0_ad0 {
atmel,pins =
<3 20 0x1 0x0>; /* PD20 periph A AD0 */
<AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
};
pinctrl_adc0_ad1: adc0_ad1 {
atmel,pins =
<3 21 0x1 0x0>; /* PD21 periph A AD1 */
<AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
};
pinctrl_adc0_ad2: adc0_ad2 {
atmel,pins =
<3 22 0x1 0x0>; /* PD22 periph A AD2 */
<AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
};
pinctrl_adc0_ad3: adc0_ad3 {
atmel,pins =
<3 23 0x1 0x0>; /* PD23 periph A AD3 */
<AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
};
pinctrl_adc0_ad4: adc0_ad4 {
atmel,pins =
<3 24 0x1 0x0>; /* PD24 periph A AD4 */
<AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
};
pinctrl_adc0_ad5: adc0_ad5 {
atmel,pins =
<3 25 0x1 0x0>; /* PD25 periph A AD5 */
<AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
};
pinctrl_adc0_ad6: adc0_ad6 {
atmel,pins =
<3 26 0x1 0x0>; /* PD26 periph A AD6 */
<AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
};
pinctrl_adc0_ad7: adc0_ad7 {
atmel,pins =
<3 27 0x1 0x0>; /* PD27 periph A AD7 */
<AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
};
pinctrl_adc0_ad8: adc0_ad8 {
atmel,pins =
<3 28 0x1 0x0>; /* PD28 periph A AD8 */
<AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
};
pinctrl_adc0_ad9: adc0_ad9 {
atmel,pins =
<3 29 0x1 0x0>; /* PD29 periph A AD9 */
<AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
};
pinctrl_adc0_ad10: adc0_ad10 {
atmel,pins =
<3 30 0x1 0x0>; /* PD30 periph A AD10, conflicts with PCK0 */
<AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
};
pinctrl_adc0_ad11: adc0_ad11 {
atmel,pins =
<3 31 0x1 0x0>; /* PD31 periph A AD11, conflicts with PCK1 */
<AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
};
};
can0 {
pinctrl_can0_rx_tx: can0_rx_tx {
atmel,pins =
<3 14 0x3 0x0 /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
3 15 0x3 0x0>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
<AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
};
};
can1 {
pinctrl_can1_rx_tx: can1_rx_tx {
atmel,pins =
<1 14 0x2 0x0 /* PB14 periph B RX, conflicts with GCRS */
1 15 0x2 0x0>; /* PB15 periph B TX, conflicts with GCOL */
<AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
};
};
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<1 30 0x1 0x0 /* PB30 periph A */
1 31 0x1 0x1>; /* PB31 periph A with pullup */
<AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
};
};
i2c0 {
pinctrl_i2c0: i2c0-0 {
atmel,pins =
<0 30 0x1 0x0 /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
0 31 0x1 0x0>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
};
};
i2c1 {
pinctrl_i2c1: i2c1-0 {
atmel,pins =
<2 26 0x2 0x0 /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
2 27 0x2 0x0>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
};
};
isi {
pinctrl_isi: isi-0 {
atmel,pins =
<0 16 0x3 0x0 /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
0 17 0x3 0x0 /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
0 18 0x3 0x0 /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
0 19 0x3 0x0 /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
0 20 0x3 0x0 /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
0 21 0x3 0x0 /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
0 22 0x3 0x0 /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
0 23 0x3 0x0 /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
2 30 0x3 0x0 /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
0 31 0x3 0x0 /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
0 30 0x3 0x0 /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
2 29 0x3 0x0 /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
2 28 0x3 0x0>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
<AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
};
pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
atmel,pins =
<3 31 0x2 0x0>; /* PD31 periph B ISI_MCK */
<AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
};
};
lcd {
pinctrl_lcd: lcd-0 {
atmel,pins =
<0 24 0x1 0x0 /* PA24 periph A LCDPWM */
0 26 0x1 0x0 /* PA26 periph A LCDVSYNC */
0 27 0x1 0x0 /* PA27 periph A LCDHSYNC */
0 25 0x1 0x0 /* PA25 periph A LCDDISP */
0 29 0x1 0x0 /* PA29 periph A LCDDEN */
0 28 0x1 0x0 /* PA28 periph A LCDPCK */
0 0 0x1 0x0 /* PA0 periph A LCDD0 pin */
0 1 0x1 0x0 /* PA1 periph A LCDD1 pin */
0 2 0x1 0x0 /* PA2 periph A LCDD2 pin */
0 3 0x1 0x0 /* PA3 periph A LCDD3 pin */
0 4 0x1 0x0 /* PA4 periph A LCDD4 pin */
0 5 0x1 0x0 /* PA5 periph A LCDD5 pin */
0 6 0x1 0x0 /* PA6 periph A LCDD6 pin */
0 7 0x1 0x0 /* PA7 periph A LCDD7 pin */
0 8 0x1 0x0 /* PA8 periph A LCDD8 pin */
0 9 0x1 0x0 /* PA9 periph A LCDD9 pin */
0 10 0x1 0x0 /* PA10 periph A LCDD10 pin */
0 11 0x1 0x0 /* PA11 periph A LCDD11 pin */
0 12 0x1 0x0 /* PA12 periph A LCDD12 pin */
0 13 0x1 0x0 /* PA13 periph A LCDD13 pin */
0 14 0x1 0x0 /* PA14 periph A LCDD14 pin */
0 15 0x1 0x0 /* PA15 periph A LCDD15 pin */
2 14 0x3 0x0 /* PC14 periph C LCDD16 pin */
2 13 0x3 0x0 /* PC13 periph C LCDD17 pin */
2 12 0x3 0x0 /* PC12 periph C LCDD18 pin */
2 11 0x3 0x0 /* PC11 periph C LCDD19 pin */
2 10 0x3 0x0 /* PC10 periph C LCDD20 pin */
2 15 0x3 0x0 /* PC15 periph C LCDD21 pin */
4 27 0x3 0x0 /* PE27 periph C LCDD22 pin */
4 28 0x3 0x0>; /* PE28 periph C LCDD23 pin */
<AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
};
};
macb0 {
pinctrl_macb0_data_rgmii: macb0_data_rgmii {
atmel,pins =
<1 0 0x1 0x0 /* PB0 periph A GTX0, conflicts with PWMH0 */
1 1 0x1 0x0 /* PB1 periph A GTX1, conflicts with PWML0 */
1 2 0x1 0x0 /* PB2 periph A GTX2, conflicts with TK1 */
1 3 0x1 0x0 /* PB3 periph A GTX3, conflicts with TF1 */
1 4 0x1 0x0 /* PB4 periph A GRX0, conflicts with PWMH1 */
1 5 0x1 0x0 /* PB5 periph A GRX1, conflicts with PWML1 */
1 6 0x1 0x0 /* PB6 periph A GRX2, conflicts with TD1 */
1 7 0x1 0x0>; /* PB7 periph A GRX3, conflicts with RK1 */
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
};
pinctrl_macb0_data_gmii: macb0_data_gmii {
atmel,pins =
<1 19 0x2 0x0 /* PB19 periph B GTX4, conflicts with MCI1_CDA */
1 20 0x2 0x0 /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
1 21 0x2 0x0 /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
1 22 0x2 0x0 /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
1 23 0x2 0x0 /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
1 24 0x2 0x0 /* PB24 periph B GRX5, conflicts with MCI1_CK */
1 25 0x2 0x0 /* PB25 periph B GRX6, conflicts with SCK1 */
1 26 0x2 0x0>; /* PB26 periph B GRX7, conflicts with CTS1 */
<AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
};
pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
atmel,pins =
<1 8 0x1 0x0 /* PB8 periph A GTXCK, conflicts with PWMH2 */
1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */
1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */
1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */
1 16 0x1 0x0 /* PB16 periph A GMDC */
1 17 0x1 0x0 /* PB17 periph A GMDIO */
1 18 0x1 0x0>; /* PB18 periph A G125CK */
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
};
pinctrl_macb0_signal_gmii: macb0_signal_gmii {
atmel,pins =
<1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */
1 10 0x1 0x0 /* PB10 periph A GTXER, conflicts with RF1 */
1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */
1 12 0x1 0x0 /* PB12 periph A GRXDV, conflicts with PWMH3 */
1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */
1 14 0x1 0x0 /* PB14 periph A GCRS, conflicts with CANRX1 */
1 15 0x1 0x0 /* PB15 periph A GCOL, conflicts with CANTX1 */
1 16 0x1 0x0 /* PB16 periph A GMDC */
1 17 0x1 0x0 /* PB17 periph A GMDIO */
1 27 0x2 0x0>; /* PB27 periph B G125CKO */
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
};
};
@ -606,83 +609,206 @@ pinctrl_macb0_signal_gmii: macb0_signal_gmii {
macb1 {
pinctrl_macb1_rmii: macb1_rmii-0 {
atmel,pins =
<2 0 0x1 0x0 /* PC0 periph A ETX0, conflicts with TIOA3 */
2 1 0x1 0x0 /* PC1 periph A ETX1, conflicts with TIOB3 */
2 2 0x1 0x0 /* PC2 periph A ERX0, conflicts with TCLK3 */
2 3 0x1 0x0 /* PC3 periph A ERX1, conflicts with TIOA4 */
2 4 0x1 0x0 /* PC4 periph A ETXEN, conflicts with TIOB4 */
2 5 0x1 0x0 /* PC5 periph A ECRSDV,conflicts with TCLK4 */
2 6 0x1 0x0 /* PC6 periph A ERXER, conflicts with TIOA5 */
2 7 0x1 0x0 /* PC7 periph A EREFCK, conflicts with TIOB5 */
2 8 0x1 0x0 /* PC8 periph A EMDC, conflicts with TCLK5 */
2 9 0x1 0x0>; /* PC9 periph A EMDIO */
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
};
};
mmc0 {
pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
atmel,pins =
<3 9 0x1 0x0 /* PD9 periph A MCI0_CK */
3 0 0x1 0x1 /* PD0 periph A MCI0_CDA with pullup */
3 1 0x1 0x1>; /* PD1 periph A MCI0_DA0 with pullup */
<AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
};
pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
atmel,pins =
<3 2 0x1 0x1 /* PD2 periph A MCI0_DA1 with pullup */
3 3 0x1 0x1 /* PD3 periph A MCI0_DA2 with pullup */
3 4 0x1 0x1>; /* PD4 periph A MCI0_DA3 with pullup */
<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
};
pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
atmel,pins =
<3 5 0x1 0x1 /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
3 6 0x1 0x1 /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
3 7 0x1 0x1 /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
3 8 0x1 0x1>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
<AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
};
};
mmc1 {
pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
atmel,pins =
<1 24 0x1 0x0 /* PB24 periph A MCI1_CK, conflicts with GRX5 */
1 19 0x1 0x1 /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
1 20 0x1 0x1>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
};
pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
atmel,pins =
<1 21 0x1 0x1 /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
1 22 0x1 0x1 /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
1 23 0x1 0x1>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
<AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
};
};
mmc2 {
pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
atmel,pins =
<2 15 0x1 0x0 /* PC15 periph A MCI2_CK, conflicts with PCK2 */
2 10 0x1 0x1 /* PC10 periph A MCI2_CDA with pullup */
2 11 0x1 0x1>; /* PC11 periph A MCI2_DA0 with pullup */
<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
};
pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
atmel,pins =
<2 12 0x1 0x0 /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
2 13 0x1 0x0 /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
2 14 0x1 0x0>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
};
};
nand0 {
pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
atmel,pins =
<4 21 0x1 0x1 /* PE21 periph A with pullup */
4 22 0x1 0x1>; /* PE22 periph A with pullup */
<AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx {
atmel,pins =
<AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
};
pinctrl_ssc0_rx: ssc0_rx {
atmel,pins =
<AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx {
atmel,pins =
<AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
};
pinctrl_ssc1_rx: ssc1_rx {
atmel,pins =
<AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
<AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
<AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
};
pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
atmel,pins =
<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
<AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
};
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
atmel,pins =
<AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
<AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
};
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
atmel,pins =
<AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
};
};
pioA: gpio@fffff200 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x100>;
interrupts = <6 4 1>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -692,7 +818,7 @@ pioA: gpio@fffff200 {
pioB: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x100>;
interrupts = <7 4 1>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -702,7 +828,7 @@ pioB: gpio@fffff400 {
pioC: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x100>;
interrupts = <8 4 1>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -712,7 +838,7 @@ pioC: gpio@fffff600 {
pioD: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x100>;
interrupts = <9 4 1>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@ -722,136 +848,12 @@ pioD: gpio@fffff800 {
pioE: gpio@fffffa00 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x100>;
interrupts = <10 4 1>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<3 10 0x1 0x0 /* PD10 periph A SPI0_MISO pin */
3 11 0x1 0x0 /* PD11 periph A SPI0_MOSI pin */
3 12 0x1 0x0 /* PD12 periph A SPI0_SPCK pin */
3 13 0x0 0x0>; /* PD13 GPIO SPI0_NPCS0 pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<2 22 0x1 0x0 /* PC22 periph A SPI1_MISO pin */
2 23 0x1 0x0 /* PC23 periph A SPI1_MOSI pin */
2 24 0x1 0x0 /* PC24 periph A SPI1_SPCK pin */
2 25 0x0 0x0>; /* PC25 GPIO SPI1_NPCS0 pin */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx {
atmel,pins =
<2 16 0x1 0x0 /* PC16 periph A TK0 */
2 17 0x1 0x0 /* PC17 periph A TF0 */
2 18 0x1 0x0>; /* PC18 periph A TD0 */
};
pinctrl_ssc0_rx: ssc0_rx {
atmel,pins =
<2 19 0x1 0x0 /* PC19 periph A RK0 */
2 20 0x1 0x0 /* PC20 periph A RF0 */
2 21 0x1 0x0>; /* PC21 periph A RD0 */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx {
atmel,pins =
<1 2 0x2 0x0 /* PB2 periph B TK1, conflicts with GTX2 */
1 3 0x2 0x0 /* PB3 periph B TF1, conflicts with GTX3 */
1 6 0x2 0x0>; /* PB6 periph B TD1, conflicts with TD1 */
};
pinctrl_ssc1_rx: ssc1_rx {
atmel,pins =
<1 7 0x2 0x0 /* PB7 periph B RK1, conflicts with EREFCK */
1 10 0x2 0x0 /* PB10 periph B RF1, conflicts with GTXER */
1 11 0x2 0x0>; /* PB11 periph B RD1, conflicts with GRXCK */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
<2 29 0x1 0x0 /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
2 30 0x1 0x1>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
<0 30 0x2 0x0 /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
0 31 0x2 0x1>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
<3 17 0x1 0x0 /* PD17 periph A */
3 18 0x1 0x1>; /* PD18 periph A with pullup */
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
<3 15 0x1 0x0 /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
3 16 0x1 0x0>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
<1 28 0x1 0x0 /* PB28 periph A */
1 29 0x1 0x1>; /* PB29 periph A with pullup */
};
pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
atmel,pins =
<1 26 0x1 0x0 /* PB26 periph A, conflicts with GRX7 */
1 27 0x1 0x0>; /* PB27 periph A, conflicts with G125CKO */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
<4 25 0x2 0x0 /* PE25 periph B, conflicts with A25 */
4 26 0x2 0x1>; /* PE26 periph B with pullup, conflicts NCS0 */
};
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
atmel,pins =
<4 23 0x2 0x0 /* PE23 periph B, conflicts with A23 */
4 24 0x2 0x0>; /* PE24 periph B, conflicts with A24 */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
<4 18 0x2 0x0 /* PE18 periph B, conflicts with A18 */
4 19 0x2 0x1>; /* PE19 periph B with pullup, conflicts with A19 */
};
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
atmel,pins =
<4 16 0x2 0x0 /* PE16 periph B, conflicts with A16 */
4 17 0x2 0x0>; /* PE17 periph B, conflicts with A17 */
};
};
};
pmc: pmc@fffffc00 {
@ -867,7 +869,7 @@ rstc@fffffe00 {
pit: timer@fffffe30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;
interrupts = <3 4 5>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
};
watchdog@fffffe40 {
@ -879,7 +881,7 @@ watchdog@fffffe40 {
rtc@fffffeb0 {
compatible = "atmel,at91rm9200-rtc";
reg = <0xfffffeb0 0x30>;
interrupts = <1 4 7>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
};
@ -889,7 +891,7 @@ usb0: gadget@00500000 {
compatible = "atmel,at91sam9rl-udc";
reg = <0x00500000 0x100000
0xf8030000 0x4000>;
interrupts = <33 4 2>;
interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
ep0 {
@ -1001,14 +1003,14 @@ ep15 {
usb1: ohci@00600000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00600000 0x100000>;
interrupts = <32 4 2>;
interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
usb2: ehci@00700000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
interrupts = <32 4 2>;
interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
@ -1024,7 +1026,7 @@ nand0: nand@60000000 {
0xffffc000 0x00000070 /* NFC HSMC regs */
0x00200000 0x00100000 /* NFC SRAM banks */
>;
interrupts = <5 4 6>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";

6
arch/arm/boot/dts/sama5d31ek.dts
View file

@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "sama5d3xmb.dtsi"
/include/ "sama5d3xdm.dtsi"
#include "sama5d3xmb.dtsi"
#include "sama5d3xdm.dtsi"
/ {
model = "Atmel SAMA5D31-EK";
@ -41,7 +41,7 @@ macb1: ethernet@f802c000 {
leds {
d3 {
label = "d3";
gpios = <&pioE 24 0>;
gpios = <&pioE 24 GPIO_ACTIVE_HIGH>;
};
};

4
arch/arm/boot/dts/sama5d33ek.dts
View file

@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "sama5d3xmb.dtsi"
/include/ "sama5d3xdm.dtsi"
#include "sama5d3xmb.dtsi"
#include "sama5d3xdm.dtsi"
/ {
model = "Atmel SAMA5D33-EK";

6
arch/arm/boot/dts/sama5d34ek.dts
View file

@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "sama5d3xmb.dtsi"
/include/ "sama5d3xdm.dtsi"
#include "sama5d3xmb.dtsi"
#include "sama5d3xdm.dtsi"
/ {
model = "Atmel SAMA5D34-EK";
@ -51,7 +51,7 @@ macb0: ethernet@f0028000 {
leds {
d3 {
label = "d3";
gpios = <&pioE 24 0>;
gpios = <&pioE 24 GPIO_ACTIVE_HIGH>;
};
};

4
arch/arm/boot/dts/sama5d35ek.dts
View file

@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "sama5d3xmb.dtsi"
#include "sama5d3xmb.dtsi"
/ {
model = "Atmel SAMA5D35-EK";
@ -48,7 +48,7 @@ gpio_keys {
pb_user1 {
label = "pb_user1";
gpios = <&pioE 27 0>;
gpios = <&pioE 27 GPIO_ACTIVE_HIGH>;
linux,code = <0x100>;
gpio-key,wakeup;
};

4
arch/arm/boot/dts/sama5d3xcm.dtsi
View file

@ -6,7 +6,7 @@
*
* Licensed under GPLv2 or later.
*/
/include/ "sama5d3.dtsi"
#include "sama5d3.dtsi"
/ {
compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5";
@ -89,7 +89,7 @@ leds {
d2 {
label = "d2";
gpios = <&pioE 25 1>; /* PE25, conflicts with A25, RXD2 */
gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */
};
};
};

2
arch/arm/boot/dts/sama5d3xdm.dtsi
View file

@ -33,7 +33,7 @@ pinctrl@fffff200 {
board {
pinctrl_qt1070_irq: qt1070_irq {
atmel,pins =
<4 31 0x0 0x5>; /* PE31 GPIO with pull up deglith */
<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE31 GPIO with pull up deglith */
};
};
};

26
arch/arm/boot/dts/sama5d3xmb.dtsi
View file

@ -6,7 +6,7 @@
*
* Licensed under GPLv2 or later.
*/
/include/ "sama5d3xcm.dtsi"
#include "sama5d3xcm.dtsi"
/ {
compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
@ -20,7 +20,7 @@ mmc0: mmc@f0000000 {
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 17 0>;
cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
};
};
@ -62,7 +62,7 @@ mmc1: mmc@f8000000 {
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 18 0>;
cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>;
};
};
@ -87,32 +87,32 @@ pinctrl@fffff200 {
board {
pinctrl_mmc0_cd: mmc0_cd {
atmel,pins =
<3 17 0x0 0x5>; /* PD17 GPIO with pullup deglitch */
<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */
};
pinctrl_mmc1_cd: mmc1_cd {
atmel,pins =
<3 18 0x0 0x5>; /* PD18 GPIO with pullup deglitch */
<AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */
};
pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
atmel,pins =
<3 30 0x2 0x0>; /* PD30 periph B */
<AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */
};
pinctrl_isi_reset: isi_reset-0 {
atmel,pins =
<4 24 0x0 0x0>; /* PE24 gpio */
<AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */
};
pinctrl_isi_power: isi_power-0 {
atmel,pins =
<4 29 0x0 0x0>; /* PE29 gpio */
<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */
};
pinctrl_usba_vbus: usba_vbus {
atmel,pins =
<3 29 0x0 0x4>; /* PD29 GPIO with deglitch */
<AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */
};
};
};
@ -127,7 +127,7 @@ watchdog@fffffe40 {
};
usb0: gadget@00500000 {
atmel,vbus-gpio = <&pioD 29 0>;
atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
@ -135,9 +135,9 @@ usb0: gadget@00500000 {
usb1: ohci@00600000 {
num-ports = <3>;
atmel,vbus-gpio = <&pioD 25 0
&pioD 26 1
&pioD 27 1
atmel,vbus-gpio = <&pioD 25 GPIO_ACTIVE_HIGH
&pioD 26 GPIO_ACTIVE_LOW
&pioD 27 GPIO_ACTIVE_LOW
>;
status = "okay";
};

4
arch/arm/boot/dts/tny_a9260.dts
View file

@ -6,8 +6,8 @@
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9260.dtsi"
/include/ "tny_a9260_common.dtsi"
#include "at91sam9260.dtsi"
#include "tny_a9260_common.dtsi"
/ {
model = "Calao TNY A9260";

4
arch/arm/boot/dts/tny_a9263.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
/include/ "at91sam9263.dtsi"
#include "at91sam9263.dtsi"
/ {
model = "Calao TNY A9263";
@ -38,7 +38,7 @@ dbgu: serial@ffffee00 {
};
usb1: gadget@fff78000 {
atmel,vbus-gpio = <&pioB 11 0>;
atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};

4
arch/arm/boot/dts/tny_a9g20.dts
View file

@ -6,8 +6,8 @@
* Licensed under GPLv2.
*/
/dts-v1/;
/include/ "at91sam9g20.dtsi"
/include/ "tny_a9260_common.dtsi"
#include "at91sam9g20.dtsi"
#include "tny_a9260_common.dtsi"
/ {
model = "Calao TNY A9G20";

4
arch/arm/boot/dts/usb_a9260.dts
View file

@ -6,8 +6,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9260.dtsi"
/include/ "usb_a9260_common.dtsi"
#include "at91sam9260.dtsi"
#include "usb_a9260_common.dtsi"
/ {
model = "Calao USB A9260";

6
arch/arm/boot/dts/usb_a9260_common.dtsi
View file

@ -30,7 +30,7 @@ macb0: ethernet@fffc4000 {
};
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@ -93,7 +93,7 @@ leds {
user_led {
label = "user_led";
gpios = <&pioB 21 1>;
gpios = <&pioB 21 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
};
@ -105,7 +105,7 @@ gpio_keys {
user_pb {
label = "user_pb";
gpios = <&pioB 10 1>;
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
};

8
arch/arm/boot/dts/usb_a9263.dts
View file

@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
/include/ "at91sam9263.dtsi"
#include "at91sam9263.dtsi"
/ {
model = "Calao USB A9263";
@ -43,7 +43,7 @@ macb0: ethernet@fffbc000 {
};
usb1: gadget@fff78000 {
atmel,vbus-gpio = <&pioB 11 0>;
atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@ -107,7 +107,7 @@ leds {
user_led {
label = "user_led";
gpios = <&pioB 21 0>;
gpios = <&pioB 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
@ -119,7 +119,7 @@ gpio_keys {
user_pb {
label = "user_pb";
gpios = <&pioB 10 1>;
gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
};

22
arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi
View file

@ -28,39 +28,39 @@ leds {
user_led1 {
label = "user_led1";
gpios = <&pioB 20 1>;
gpios = <&pioB 20 GPIO_ACTIVE_LOW>;
};
/*
* led already used by mother board but active as high
* user_led2 {
* label = "user_led2";
* gpios = <&pioB 21 1>;
* gpios = <&pioB 21 GPIO_ACTIVE_LOW>;
* };
*/
user_led3 {
label = "user_led3";
gpios = <&pioB 22 1>;
gpios = <&pioB 22 GPIO_ACTIVE_LOW>;
};
user_led4 {
label = "user_led4";
gpios = <&pioB 23 1>;
gpios = <&pioB 23 GPIO_ACTIVE_LOW>;
};
red {
label = "red";
gpios = <&pioB 24 1>;
gpios = <&pioB 24 GPIO_ACTIVE_LOW>;
};
orange {
label = "orange";
gpios = <&pioB 30 1>;
gpios = <&pioB 30 GPIO_ACTIVE_LOW>;
};
green {
label = "green";
gpios = <&pioB 31 1>;
gpios = <&pioB 31 GPIO_ACTIVE_LOW>;
};
};
@ -71,25 +71,25 @@ gpio_keys {
user_pb1 {
label = "user_pb1";
gpios = <&pioB 25 1>;
gpios = <&pioB 25 GPIO_ACTIVE_LOW>;
linux,code = <0x100>;
};
user_pb2 {
label = "user_pb2";
gpios = <&pioB 13 1>;
gpios = <&pioB 13 GPIO_ACTIVE_LOW>;
linux,code = <0x101>;
};
user_pb3 {
label = "user_pb3";
gpios = <&pioA 26 1>;
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
linux,code = <0x102>;
};
user_pb4 {
label = "user_pb4";
gpios = <&pioC 9 1>;
gpios = <&pioC 9 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
};
};

4
arch/arm/boot/dts/usb_a9g20.dts
View file

@ -6,8 +6,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "at91sam9g20.dtsi"
/include/ "usb_a9260_common.dtsi"
#include "at91sam9g20.dtsi"
#include "usb_a9260_common.dtsi"
/ {
model = "Calao USB A9G20";

55
arch/arm/configs/at91_dt_defconfig
View file

@ -1,4 +1,3 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
@ -25,8 +24,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_TIMER_HZ=128
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_LEDS=y
CONFIG_LEDS_CPU=y
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
@ -42,6 +39,9 @@ CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
@ -51,7 +51,8 @@ CONFIG_IPV6=y
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
# CONFIG_WIRELESS is not set
CONFIG_CFG80211=y
CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
@ -72,7 +73,6 @@ CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
CONFIG_EEPROM_93CX6=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
@ -81,7 +81,6 @@ CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
@ -92,7 +91,23 @@ CONFIG_MACB=y
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_DAVICOM_PHY=y
CONFIG_MICREL_PHY=y
# CONFIG_WLAN is not set
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_LIBERTAS_SPI=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_RT55XX=y
CONFIG_RT2800USB_UNKNOWN=y
CONFIG_RTLWIFI=m
# CONFIG_RTLWIFI_DEBUG is not set
CONFIG_RTL8192CU=m
CONFIG_MWIFIEX=m
CONFIG_MWIFIEX_SDIO=m
CONFIG_MWIFIEX_USB=m
CONFIG_INPUT_POLLDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
@ -112,13 +127,11 @@ CONFIG_I2C=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
CONFIG_PINCTRL_AT91=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_SSB=m
CONFIG_FB=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_ATMEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
@ -132,11 +145,8 @@ CONFIG_FONT_8x8=y
CONFIG_FONT_ACORN_8x8=y
CONFIG_FONT_MINI_4x6=y
CONFIG_LOGO=y
# CONFIG_HID_SUPPORT is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
@ -146,14 +156,9 @@ CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
CONFIG_USB_AT91=m
CONFIG_USB_ATMEL_USBA=m
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_ACM_MS=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_USB_AT91=y
CONFIG_USB_ATMEL_USBA=y
CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=y
CONFIG_NEW_LEDS=y
@ -168,16 +173,18 @@ CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_DMADEVICES=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_EXT4_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
@ -192,7 +199,7 @@ CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=m
CONFIG_CRC_ITU_T=m
CONFIG_CRC_CCITT=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC7=m
CONFIG_AVERAGE=y

219
arch/arm/configs/at91rm9200_defconfig
View file

@ -1,10 +1,12 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_USER_NS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
@ -16,7 +18,6 @@ CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y
CONFIG_MACH_ONEARM=y
CONFIG_ARCH_AT91RM9200DK=y
CONFIG_MACH_AT91RM9200EK=y
CONFIG_MACH_CSB337=y
CONFIG_MACH_CSB637=y
@ -35,49 +36,37 @@ CONFIG_AT91_TIMER_HZ=100
# CONFIG_ARM_THUMB is not set
CONFIG_PCCARD=y
CONFIG_AT91_CF=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_LEDS=y
CONFIG_LEDS_CPU=y
# CONFIG_COMPACTION is not set
CONFIG_ZBOOT_ROM_TEXT=0x10000000
CONFIG_ZBOOT_ROM_BSS=0x20040000
CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_FPE_NWFPE=y
CONFIG_BINFMT_MISC=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=m
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_NET_IPIP=m
CONFIG_INET_AH=m
CONFIG_INET_ESP=m
CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m
CONFIG_INET_XFRM_MODE_BEET=m
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_MIP6=m
CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
CONFIG_IPV6_TUNNEL=m
CONFIG_BRIDGE=m
CONFIG_VLAN_8021Q=m
CONFIG_BT=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_AFS_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
@ -94,55 +83,21 @@ CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=m
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_CHR_DEV_SG=m
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
CONFIG_TUN=m
CONFIG_MII=y
CONFIG_ARM_AT91_ETHER=y
CONFIG_PHYLIB=y
CONFIG_DAVICOM_PHY=y
CONFIG_SMSC_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPPOE=m
CONFIG_PPP_ASYNC=y
CONFIG_SLIP=m
CONFIG_SLIP_COMPRESSED=y
CONFIG_SLIP_SMART=y
CONFIG_SLIP_MODE_SLIP6=y
CONFIG_USB_CATC=m
CONFIG_USB_KAWETH=m
CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m
CONFIG_USB_USBNET=m
CONFIG_USB_NET_DM9601=m
CONFIG_USB_NET_GL620A=m
CONFIG_USB_NET_PLUSB=m
CONFIG_USB_NET_RNDIS_HOST=m
CONFIG_USB_ALI_M5632=y
CONFIG_USB_AN2720=y
CONFIG_USB_EPSON2888=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_LEGACY_PTY_COUNT=32
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
@ -151,38 +106,8 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
CONFIG_SPI_BITBANG=y
CONFIG_GPIO_SYSFS=y
CONFIG_HWMON=m
CONFIG_SENSORS_ADM1021=m
CONFIG_SENSORS_ADM1025=m
CONFIG_SENSORS_ADM1026=m
CONFIG_SENSORS_ADM1029=m
CONFIG_SENSORS_ADM1031=m
CONFIG_SENSORS_ADM9240=m
CONFIG_SENSORS_DS1621=m
CONFIG_SENSORS_GL518SM=m
CONFIG_SENSORS_GL520SM=m
CONFIG_SENSORS_IT87=m
CONFIG_SENSORS_LM63=m
CONFIG_SENSORS_LM73=m
CONFIG_SENSORS_LM75=m
CONFIG_SENSORS_LM77=m
CONFIG_SENSORS_LM78=m
CONFIG_SENSORS_LM80=m
CONFIG_SENSORS_LM83=m
CONFIG_SENSORS_LM85=m
CONFIG_SENSORS_LM87=m
CONFIG_SENSORS_LM90=m
CONFIG_SENSORS_LM92=m
CONFIG_SENSORS_MAX1619=m
CONFIG_SENSORS_PCF8591=m
CONFIG_SENSORS_SMSC47B397=m
CONFIG_SENSORS_W83781D=m
CONFIG_SENSORS_W83791D=m
CONFIG_SENSORS_W83792D=m
CONFIG_SENSORS_W83793=m
CONFIG_SENSORS_W83L785TS=m
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_AT91RM9200_WATCHDOG=y
@ -194,43 +119,14 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_DISPLAY_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_MINI_4x6=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m
CONFIG_USB_STORAGE=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_CONSOLE=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_KEYSPAN=y
CONFIG_USB_SERIAL_KEYSPAN_MPR=y
CONFIG_USB_SERIAL_KEYSPAN_USA28=y
CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
CONFIG_USB_SERIAL_KEYSPAN_USA19=y
CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
CONFIG_USB_SERIAL_MCT_U232=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_AT91=y
CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=y
CONFIG_NEW_LEDS=y
@ -240,84 +136,27 @@ CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_HCTOSYS is not set
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_PCF8563=y
CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_REISERFS_FS=y
CONFIG_EXT4_FS=y
CONFIG_AUTOFS4_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=m
CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_SUMMARY=y
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
CONFIG_JFFS2_LZO=y
CONFIG_JFFS2_RUBIN=y
CONFIG_CRAMFS=y
CONFIG_MINIX_FS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_CIFS=m
CONFIG_PARTITION_ADVANCED=y
CONFIG_MAC_PARTITION=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_737=m
CONFIG_NLS_CODEPAGE_775=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_CODEPAGE_852=m
CONFIG_NLS_CODEPAGE_855=m
CONFIG_NLS_CODEPAGE_857=m
CONFIG_NLS_CODEPAGE_860=m
CONFIG_NLS_CODEPAGE_861=m
CONFIG_NLS_CODEPAGE_862=m
CONFIG_NLS_CODEPAGE_863=m
CONFIG_NLS_CODEPAGE_864=m
CONFIG_NLS_CODEPAGE_865=m
CONFIG_NLS_CODEPAGE_866=m
CONFIG_NLS_CODEPAGE_869=m
CONFIG_NLS_CODEPAGE_936=m
CONFIG_NLS_CODEPAGE_950=m
CONFIG_NLS_CODEPAGE_932=m
CONFIG_NLS_CODEPAGE_949=m
CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ASCII=m
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
CONFIG_NLS_ISO8859_4=m
CONFIG_NLS_ISO8859_5=m
CONFIG_NLS_ISO8859_6=m
CONFIG_NLS_ISO8859_7=m
CONFIG_NLS_ISO8859_9=m
CONFIG_NLS_ISO8859_13=m
CONFIG_NLS_ISO8859_14=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_SHA1=y
CONFIG_XZ_DEC_ARMTHUMB=y

67
arch/arm/configs/at91sam9g20_defconfig → arch/arm/configs/at91sam9260_9g20_defconfig
View file

@ -1,4 +1,3 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
@ -11,7 +10,15 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9G20=y
CONFIG_ARCH_AT91SAM9260=y
CONFIG_MACH_AT91SAM9260EK=y
CONFIG_MACH_CAM60=y
CONFIG_MACH_SAM9_L9260=y
CONFIG_MACH_AFEB9260=y
CONFIG_MACH_USB_A9260=y
CONFIG_MACH_QIL_A9260=y
CONFIG_MACH_CPU9260=y
CONFIG_MACH_FLEXIBITY=y
CONFIG_MACH_AT91SAM9G20EK=y
CONFIG_MACH_AT91SAM9G20EK_2MMC=y
CONFIG_MACH_CPU9G20=y
@ -20,10 +27,10 @@ CONFIG_MACH_PORTUXG20=y
CONFIG_MACH_STAMP9G20=y
CONFIG_MACH_PCONTROL_G20=y
CONFIG_MACH_GSIA18S=y
CONFIG_MACH_USB_A9G20=y
CONFIG_MACH_SNAPPER_9260=y
CONFIG_MACH_AT91SAM9_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_SLOW_CLOCK=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
CONFIG_LEDS=y
@ -33,12 +40,14 @@ CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
CONFIG_AUTO_ZRELADDR=y
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
@ -46,8 +55,11 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_OF_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
@ -56,6 +68,8 @@ CONFIG_MTD_NAND_ATMEL=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_MISC_DEVICES=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
@ -63,23 +77,36 @@ CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_SMSC_PHY=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_LEGACY_PTY_COUNT=16
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
CONFIG_SPI_SPIDEV=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SEQUENCER=y
@ -94,12 +121,11 @@ CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ZERO=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_AT91=y
CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=m
CONFIG_MMC_ATMELMCI=y
CONFIG_MMC_SPI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
@ -109,15 +135,12 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RV3029C2=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_EXT2_FS=y
CONFIG_MSDOS_FS=y
CONFIG_EXT4_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_SUMMARY=y
CONFIG_CRAMFS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
@ -125,3 +148,9 @@ CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=y
CONFIG_NLS_UTF8=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_LL=y
CONFIG_AT91_DEBUG_LL_DBGU0=y
CONFIG_EARLY_PRINTK=y

91
arch/arm/configs/at91sam9260_defconfig
View file

@ -1,91 +0,0 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9260=y
CONFIG_ARCH_AT91SAM9260_SAM9XE=y
CONFIG_MACH_AT91SAM9260EK=y
CONFIG_MACH_CAM60=y
CONFIG_MACH_SAM9_L9260=y
CONFIG_MACH_AFEB9260=y
CONFIG_MACH_USB_A9260=y
CONFIG_MACH_QIL_A9260=y
CONFIG_MACH_CPU9260=y
CONFIG_MACH_FLEXIBITY=y
CONFIG_MACH_SNAPPER_9260=y
CONFIG_MACH_AT91SAM9_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
# CONFIG_ARM_THUMB is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_AT91SAM9X_WATCHDOG=y
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DEBUG=y
CONFIG_USB_GADGET=y
CONFIG_USB_ZERO=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_EXT2_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_CRAMFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y

19
arch/arm/configs/at91sam9261_defconfig → arch/arm/configs/at91sam9261_9g10_defconfig
View file

@ -17,6 +17,7 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9261=y
CONFIG_MACH_AT91SAM9261EK=y
CONFIG_MACH_AT91SAM9G10EK=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
@ -38,11 +39,11 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_CFG80211=y
CONFIG_LIB80211=y
CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
@ -51,17 +52,13 @@ CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_MISC_DEVICES=y
CONFIG_ATMEL_TCLIB=y
CONFIG_ATMEL_SSC=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_DM9000=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_USB_ZD1201=m
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
@ -118,15 +115,11 @@ CONFIG_SND_AT73C213=y
CONFIG_SND_USB_AUDIO=m
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ZERO=m
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_AT91=y
CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=m
CONFIG_NEW_LEDS=y
@ -147,12 +140,10 @@ CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_XZ=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=y
CONFIG_NLS_UTF8=y
CONFIG_FTRACE=y
CONFIG_CRC_CCITT=m

39
arch/arm/configs/at91sam9263_defconfig
View file

@ -1,6 +1,4 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_KERNEL_LZMA=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
@ -48,9 +46,11 @@ CONFIG_IP_PIMSM_V2=y
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
@ -65,7 +65,6 @@ CONFIG_MTD_UBI_GLUEBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_MISC_DEVICES=y
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
CONFIG_SCSI=y
@ -73,23 +72,18 @@ CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_SMSC_PHY=y
CONFIG_NET_ETHERNET=y
CONFIG_MACB=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_USB_ZD1201=m
CONFIG_SMSC_PHY=y
# CONFIG_WLAN is not set
CONFIG_INPUT_POLLDEV=m
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=y
CONFIG_LEGACY_PTY_COUNT=4
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
@ -98,6 +92,7 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
@ -107,9 +102,9 @@ CONFIG_FB_ATMEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_ATMEL_LCDC=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FONTS=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
@ -124,16 +119,12 @@ CONFIG_SND_ATMEL_AC97C=y
# CONFIG_SND_SPI is not set
CONFIG_SND_USB_AUDIO=m
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ZERO=m
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_ATMEL_USBA=y
CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_SDIO_UART=m
CONFIG_MMC_ATMELMCI=m
@ -145,22 +136,18 @@ CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_EXT2_FS=y
CONFIG_FUSE_FS=m
CONFIG_EXT4_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_CRAMFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_FTRACE=y
CONFIG_NLS_UTF8=y
CONFIG_DEBUG_USER=y
CONFIG_XZ_DEC=y

94
arch/arm/configs/at91sam9g45_defconfig
View file

@ -1,4 +1,3 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
@ -23,8 +22,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_SLOW_CLOCK=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_LEDS=y
CONFIG_LEDS_CPU=y
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
@ -36,6 +33,9 @@ CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
@ -45,9 +45,6 @@ CONFIG_IPV6=y
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
CONFIG_CFG80211=y
CONFIG_LIB80211=y
CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
@ -61,13 +58,14 @@ CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_MISC_DEVICES=y
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
CONFIG_ATMEL_SSC=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
@ -76,67 +74,40 @@ CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
CONFIG_DAVICOM_PHY=y
CONFIG_LIBERTAS_THINFIRM=m
CONFIG_LIBERTAS_THINFIRM_USB=m
CONFIG_AT76C50X_USB=m
CONFIG_USB_ZD1201=m
CONFIG_RTL8187=m
CONFIG_ATH_COMMON=m
CONFIG_ATH9K=m
CONFIG_CARL9170=m
CONFIG_B43=m
CONFIG_B43_PHY_N=y
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_USB=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_LIBERTAS_SPI=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_UNKNOWN=y
CONFIG_RTL8192CU=m
CONFIG_WL1251=m
CONFIG_WL1251_SDIO=m
CONFIG_WL12XX_MENU=m
CONFIG_WL12XX=m
CONFIG_WL12XX_SDIO=m
CONFIG_ZD1211RW=m
CONFIG_MWIFIEX=m
CONFIG_MWIFIEX_SDIO=m
CONFIG_INPUT_POLLDEV=m
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_QT1070=m
CONFIG_KEYBOARD_QT2160=m
CONFIG_KEYBOARD_QT1070=y
CONFIG_KEYBOARD_QT2160=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
# CONFIG_SERIO is not set
CONFIG_LEGACY_PTY_COUNT=4
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_ATMEL=y
CONFIG_FB_UDL=m
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_ATMEL_LCDC=y
CONFIG_BACKLIGHT_ATMEL_PWM=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FONTS=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SEQUENCER=y
@ -148,33 +119,25 @@ CONFIG_SND_PCM_OSS=y
# CONFIG_SND_ARM is not set
CONFIG_SND_ATMEL_AC97C=y
# CONFIG_SND_SPI is not set
CONFIG_SND_USB_AUDIO=m
# CONFIG_SND_USB is not set
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_ATMEL_USBA=m
CONFIG_USB_ZERO=m
CONFIG_USB_AUDIO=m
CONFIG_USB_ETH=m
CONFIG_USB_ETH_EEM=y
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_ATMEL_USBA=y
CONFIG_USB_G_MULTI=y
CONFIG_USB_G_MULTI_CDC=y
CONFIG_MMC=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_SDIO_UART=m
CONFIG_MMC_ATMELMCI=y
CONFIG_LEDS_ATMEL_PWM=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_GPIO=y
@ -184,17 +147,14 @@ CONFIG_DMADEVICES=y
CONFIG_AT_HDMAC=y
CONFIG_DMATEST=m
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_EXT4_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_SUMMARY=y
CONFIG_CRAMFS=m
CONFIG_SQUASHFS=m
CONFIG_SQUASHFS_EMBEDDED=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
@ -203,6 +163,8 @@ CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_CRYPTO_ECB=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_USER_API_HASH=m

35
arch/arm/configs/sama5_defconfig
View file

@ -26,7 +26,9 @@ CONFIG_AEABI=y
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_VFP=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
@ -39,6 +41,9 @@ CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
@ -68,6 +73,8 @@ CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=4
@ -95,7 +102,19 @@ CONFIG_MACB=y
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_MICREL_PHY=y
# CONFIG_WLAN is not set
CONFIG_LIBERTAS_THINFIRM=m
CONFIG_LIBERTAS_THINFIRM_USB=m
CONFIG_RTL8187=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_RT55XX=y
CONFIG_RT2800USB_UNKNOWN=y
CONFIG_MWIFIEX=m
CONFIG_MWIFIEX_SDIO=m
CONFIG_MWIFIEX_USB=m
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
@ -133,9 +152,13 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
CONFIG_USB_AT91=y
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_ATMEL_USBA=y
CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_MMC_ATMELMCI=y
@ -151,18 +174,18 @@ CONFIG_DMADEVICES=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=y
CONFIG_AT91_ADC=y
CONFIG_EXT2_FS=y
CONFIG_EXT4_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_SUMMARY=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set

166
arch/arm/mach-at91/Kconfig.non_dt
View file

@ -14,15 +14,11 @@ config ARCH_AT91RM9200
select SOC_AT91RM9200
config ARCH_AT91SAM9260
bool "AT91SAM9260 or AT91SAM9XE"
bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
select SOC_AT91SAM9260
config ARCH_AT91SAM9261
bool "AT91SAM9261"
select SOC_AT91SAM9261
config ARCH_AT91SAM9G10
bool "AT91SAM9G10"
bool "AT91SAM9261 or AT91SAM9G10"
select SOC_AT91SAM9261
config ARCH_AT91SAM9263
@ -33,10 +29,6 @@ config ARCH_AT91SAM9RL
bool "AT91SAM9RL"
select SOC_AT91SAM9RL
config ARCH_AT91SAM9G20
bool "AT91SAM9G20"
select SOC_AT91SAM9260
config ARCH_AT91SAM9G45
bool "AT91SAM9G45"
select SOC_AT91SAM9G45
@ -50,6 +42,14 @@ config ARCH_AT91X40
endchoice
config ARCH_AT91SAM9G20
bool
select ARCH_AT91SAM9260
config ARCH_AT91SAM9G10
bool
select ARCH_AT91SAM9261
# ----------------------------------------------------------
if ARCH_AT91RM9200
@ -62,13 +62,6 @@ config MACH_ONEARM
Select this if you are using Ajeco's 1ARM Single Board Computer.
<http://www.ajeco.fi/>
config ARCH_AT91RM9200DK
bool "Atmel AT91RM9200-DK Development board"
select HAVE_AT91_DATAFLASH_CARD
help
Select this if you are using Atmel's AT91RM9200-DK Development board.
(Discontinued)
config MACH_AT91RM9200EK
bool "Atmel AT91RM9200-EK Evaluation Kit"
select HAVE_AT91_DATAFLASH_CARD
@ -207,76 +200,6 @@ config MACH_FLEXIBITY
Select this if you are using Flexibity Connect board
<http://www.flexibity.com>
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9261
comment "AT91SAM9261 Board Type"
config MACH_AT91SAM9261EK
bool "Atmel AT91SAM9261-EK Evaluation Kit"
select HAVE_AT91_DATAFLASH_CARD
help
Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9G10
comment "AT91SAM9G10 Board Type"
config MACH_AT91SAM9G10EK
bool "Atmel AT91SAM9G10-EK Evaluation Kit"
select HAVE_AT91_DATAFLASH_CARD
help
Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9263
comment "AT91SAM9263 Board Type"
config MACH_AT91SAM9263EK
bool "Atmel AT91SAM9263-EK Evaluation Kit"
select HAVE_AT91_DATAFLASH_CARD
help
Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
config MACH_USB_A9263
bool "CALAO USB-A9263"
help
Select this if you are using a Calao Systems USB-A9263.
<http://www.calao-systems.com>
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9RL
comment "AT91SAM9RL Board Type"
config MACH_AT91SAM9RLEK
bool "Atmel AT91SAM9RL-EK Evaluation Kit"
help
Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9G20
comment "AT91SAM9G20 Board Type"
config MACH_AT91SAM9G20EK
@ -341,17 +264,70 @@ config MACH_USB_A9G20
Select this if you are using a Calao Systems USB-A9G20.
<http://www.calao-systems.com>
config MACH_SNAPPER_9260
bool "Bluewater Systems Snapper 9260/9G20 module"
help
Select this if you are using the Bluewater Systems Snapper 9260 or
Snapper 9G20 modules.
<http://www.bluewatersys.com/>
endif
if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
comment "AT91SAM9260/AT91SAM9G20 boards"
# ----------------------------------------------------------
if ARCH_AT91SAM9261
comment "AT91SAM9261 Board Type"
config MACH_AT91SAM9261EK
bool "Atmel AT91SAM9261-EK Evaluation Kit"
select HAVE_AT91_DATAFLASH_CARD
help
Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
comment "AT91SAM9G10 Board Type"
config MACH_AT91SAM9G10EK
bool "Atmel AT91SAM9G10-EK Evaluation Kit"
select HAVE_AT91_DATAFLASH_CARD
help
Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9263
comment "AT91SAM9263 Board Type"
config MACH_AT91SAM9263EK
bool "Atmel AT91SAM9263-EK Evaluation Kit"
select HAVE_AT91_DATAFLASH_CARD
help
Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
config MACH_USB_A9263
bool "CALAO USB-A9263"
help
Select this if you are using a Calao Systems USB-A9263.
<http://www.calao-systems.com>
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9RL
comment "AT91SAM9RL Board Type"
config MACH_AT91SAM9RLEK
bool "Atmel AT91SAM9RL-EK Evaluation Kit"
help
Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
config MACH_SNAPPER_9260
bool "Bluewater Systems Snapper 9260/9G20 module"
help
Select this if you are using the Bluewater Systems Snapper 9260 or
Snapper 9G20 modules.
<http://www.bluewatersys.com/>
endif
# ----------------------------------------------------------

3
arch/arm/mach-at91/Makefile
View file

@ -27,16 +27,13 @@ obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261_devices.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl_devices.o
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260_devices.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45_devices.o
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
# AT91RM9200 board-specific support
obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
obj-$(CONFIG_ARCH_AT91RM9200DK) += board-rm9200dk.o
obj-$(CONFIG_MACH_AT91RM9200EK) += board-rm9200ek.o
obj-$(CONFIG_MACH_CSB337) += board-csb337.o
obj-$(CONFIG_MACH_CSB637) += board-csb637.o

228
arch/arm/mach-at91/board-rm9200dk.c
View file

@ -1,228 +0,0 @@
/*
* linux/arch/arm/mach-at91/board-rm9200dk.c
*
* Copyright (C) 2005 SAN People
*
* Epson S1D framebuffer glue code is:
* Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/types.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/mtd/physmap.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
#include <mach/at91rm9200_mc.h>
#include <mach/at91_ramc.h>
#include "at91_aic.h"
#include "board.h"
#include "generic.h"
static void __init dk_init_early(void)
{
/* Initialize processor: 18.432 MHz crystal */
at91_initialize(18432000);
}
static struct macb_platform_data __initdata dk_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
};
static struct at91_usbh_data __initdata dk_usbh_data = {
.ports = 2,
.vbus_pin = {-EINVAL, -EINVAL},
.overcurrent_pin= {-EINVAL, -EINVAL},
};
static struct at91_udc_data __initdata dk_udc_data = {
.vbus_pin = AT91_PIN_PD4,
.pullup_pin = AT91_PIN_PD5,
};
static struct at91_cf_data __initdata dk_cf_data = {
.irq_pin = -EINVAL,
.det_pin = AT91_PIN_PB0,
.vcc_pin = -EINVAL,
.rst_pin = AT91_PIN_PC5,
};
#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
static struct mci_platform_data __initdata dk_mci0_data = {
.slot[0] = {
.bus_width = 4,
.detect_pin = -EINVAL,
.wp_pin = -EINVAL,
},
};
#endif
static struct spi_board_info dk_spi_devices[] = {
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
.chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000,
},
{ /* UR6HCPS2-SP40 PS2-to-SPI adapter */
.modalias = "ur6hcps2",
.chip_select = 1,
.max_speed_hz = 250 * 1000,
},
{ /* TLV1504 ADC, 4 channels, 10 bits; one is a temp sensor */
.modalias = "tlv1504",
.chip_select = 2,
.max_speed_hz = 20 * 1000 * 1000,
},
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
{ /* DataFlash card */
.modalias = "mtd_dataflash",
.chip_select = 3,
.max_speed_hz = 15 * 1000 * 1000,
}
#endif
};
static struct i2c_board_info __initdata dk_i2c_devices[] = {
{
I2C_BOARD_INFO("ics1523", 0x26),
},
{
I2C_BOARD_INFO("x9429", 0x28),
},
{
I2C_BOARD_INFO("24c1024", 0x50),
}
};
static struct mtd_partition __initdata dk_nand_partition[] = {
{
.name = "NAND Partition 1",
.offset = 0,
.size = MTDPART_SIZ_FULL,
},
};
static struct atmel_nand_data __initdata dk_nand_data = {
.ale = 22,
.cle = 21,
.det_pin = AT91_PIN_PB1,
.rdy_pin = AT91_PIN_PC2,
.enable_pin = -EINVAL,
.ecc_mode = NAND_ECC_SOFT,
.on_flash_bbt = 1,
.parts = dk_nand_partition,
.num_parts = ARRAY_SIZE(dk_nand_partition),
};
#define DK_FLASH_BASE AT91_CHIPSELECT_0
#define DK_FLASH_SIZE SZ_2M
static struct physmap_flash_data dk_flash_data = {
.width = 2,
};
static struct resource dk_flash_resource = {
.start = DK_FLASH_BASE,
.end = DK_FLASH_BASE + DK_FLASH_SIZE - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device dk_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &dk_flash_data,
},
.resource = &dk_flash_resource,
.num_resources = 1,
};
static struct gpio_led dk_leds[] = {
{
.name = "led0",
.gpio = AT91_PIN_PB2,
.active_low = 1,
.default_trigger = "heartbeat",
}
};
static void __init dk_board_init(void)
{
/* Serial */
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
/* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
| ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
| ATMEL_UART_RI);
at91_add_device_serial();
/* Ethernet */
at91_add_device_eth(&dk_eth_data);
/* USB Host */
at91_add_device_usbh(&dk_usbh_data);
/* USB Device */
at91_add_device_udc(&dk_udc_data);
at91_set_multi_drive(dk_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
/* Compact Flash */
at91_add_device_cf(&dk_cf_data);
/* I2C */
at91_add_device_i2c(dk_i2c_devices, ARRAY_SIZE(dk_i2c_devices));
/* SPI */
at91_add_device_spi(dk_spi_devices, ARRAY_SIZE(dk_spi_devices));
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
/* DataFlash card */
at91_set_gpio_output(AT91_PIN_PB7, 0);
#else
/* MMC */
at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
at91_add_device_mci(0, &dk_mci0_data);
#endif
/* NAND */
at91_add_device_nand(&dk_nand_data);
/* NOR Flash */
platform_device_register(&dk_flash);
/* LEDs */
at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
/* VGA */
// dk_add_device_video();
}
MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
/* Maintainer: SAN People/Atmel */
.init_time = at91rm9200_timer_init,
.map_io = at91_map_io,
.handle_irq = at91_aic_handle_irq,
.init_early = dk_init_early,
.init_irq = at91_init_irq_default,
.init_machine = dk_board_init,
MACHINE_END

30
arch/arm/mach-at91/board-sam9261ek.c
View file

@ -264,11 +264,7 @@ static void __init ek_add_device_ts(void) {}
*/
static struct at73c213_board_info at73c213_data = {
.ssc_id = 1,
#if defined(CONFIG_MACH_AT91SAM9261EK)
.shortname = "AT91SAM9261-EK external DAC",
#else
.shortname = "AT91SAM9G10-EK external DAC",
#endif
.shortname = "AT91SAM9261/9G10-EK external DAC",
};
#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
@ -412,9 +408,6 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
.default_monspecs = &at91fb_default_stn_monspecs,
.atmel_lcdfb_power_control = at91_lcdc_stn_power_control,
.guard_time = 1,
#if defined(CONFIG_MACH_AT91SAM9G10EK)
.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
#endif
};
#else
@ -468,9 +461,6 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
.default_monspecs = &at91fb_default_tft_monspecs,
.atmel_lcdfb_power_control = at91_lcdc_tft_power_control,
.guard_time = 1,
#if defined(CONFIG_MACH_AT91SAM9G10EK)
.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
#endif
};
#endif
@ -574,6 +564,10 @@ static void __init ek_board_init(void)
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
if (cpu_is_at91sam9g10())
ek_lcdc_data.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB;
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
@ -606,11 +600,17 @@ static void __init ek_board_init(void)
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
}
#if defined(CONFIG_MACH_AT91SAM9261EK)
MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
#else
MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
#endif
/* Maintainer: Atmel */
.init_time = at91sam926x_pit_init,
.map_io = at91_map_io,
.handle_irq = at91_aic_handle_irq,
.init_early = ek_init_early,
.init_irq = at91_init_irq_default,
.init_machine = ek_board_init,
MACHINE_END
MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
/* Maintainer: Atmel */
.init_time = at91sam926x_pit_init,
.map_io = at91_map_io,

2
arch/arm/mach-bcm/board_bcm.c
View file

@ -15,7 +15,6 @@
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/irqchip.h>
#include <linux/clocksource.h>
#include <asm/mach/arch.h>
@ -54,7 +53,6 @@ static void __init board_init(void)
static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, };
DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor")
.init_irq = irqchip_init,
.init_time = clocksource_of_init,
.init_machine = board_init,
.dt_compat = bcm11351_dt_compat,

3
arch/arm/mach-exynos/include/mach/uncompress.h
View file

@ -15,9 +15,6 @@
#include <asm/mach-types.h>
#include <mach/map.h>
volatile u8 *uart_base;
#include <plat/uncompress.h>
static unsigned int __raw_readl(unsigned int ptr)

1
arch/arm/mach-highbank/highbank.c
View file

@ -176,7 +176,6 @@ static const char *highbank_match[] __initconst = {
DT_MACHINE_START(HIGHBANK, "Highbank")
.smp = smp_ops(highbank_smp_ops),
.map_io = debug_ll_io_init,
.init_irq = highbank_init_irq,
.init_time = highbank_timer_init,
.init_machine = highbank_init,

13
arch/arm/mach-msm/Kconfig
View file

@ -48,9 +48,7 @@ config ARCH_MSM8X60
select CPU_V7
select GPIO_MSM_V2
select HAVE_SMP
select MSM_GPIOMUX
select MSM_SCM if SMP
select MSM_V2_TLMM
select USE_OF
config ARCH_MSM8960
@ -58,9 +56,8 @@ config ARCH_MSM8960
select ARM_GIC
select CPU_V7
select HAVE_SMP
select MSM_GPIOMUX
select GPIO_MSM_V2
select MSM_SCM if SMP
select MSM_V2_TLMM
select USE_OF
config MSM_HAS_DEBUG_UART_HS
@ -124,10 +121,10 @@ config MSM_SMD
bool
config MSM_GPIOMUX
bool
config MSM_V2_TLMM
bool
depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
bool "MSM V1 TLMM GPIOMUX architecture"
help
Support for MSM V1 TLMM GPIOMUX architecture.
config MSM_SCM
bool

6
arch/arm/mach-msm/Makefile
View file

@ -27,7 +27,5 @@ obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o
obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o gpiomux-v1.o gpiomux.o
obj-$(CONFIG_ARCH_MSM8X60) += gpiomux-8x60.o gpiomux-v2.o gpiomux.o
obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o

2
arch/arm/mach-msm/board-dt-8660.c
View file

@ -11,7 +11,6 @@
*/
#include <linux/init.h>
#include <linux/irqchip.h>
#include <linux/of.h>
#include <linux/of_platform.h>
@ -44,7 +43,6 @@ static const char *msm8x60_fluid_match[] __initdata = {
DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8x60_io,
.init_irq = irqchip_init,
.init_machine = msm8x60_dt_init,
.init_late = msm8x60_init_late,
.init_time = msm_dt_timer_init,

2
arch/arm/mach-msm/board-dt-8960.c
View file

@ -11,7 +11,6 @@
*/
#include <linux/init.h>
#include <linux/irqchip.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
@ -31,7 +30,6 @@ static const char * const msm8960_dt_match[] __initconst = {
DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8960_io,
.init_irq = irqchip_init,
.init_time = msm_dt_timer_init,
.init_machine = msm_dt_init,
.dt_compat = msm8960_dt_match,

2
arch/arm/mach-msm/core.h
View file

@ -1,2 +0,0 @@
extern struct smp_operations msm_smp_ops;
extern void msm_cpu_die(unsigned int cpu);

19
arch/arm/mach-msm/gpiomux-8x60.c
View file

@ -1,19 +0,0 @@
/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#include "gpiomux.h"
struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = {};

25
arch/arm/mach-msm/gpiomux-v2.c
View file

@ -1,25 +0,0 @@
/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#include <linux/io.h>
#include <mach/msm_iomap.h>
#include "gpiomux.h"
void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val)
{
writel(val & ~GPIOMUX_CTL_MASK,
MSM_TLMM_BASE + 0x1000 + (0x10 * gpio));
}

61
arch/arm/mach-msm/gpiomux-v2.h
View file

@ -1,61 +0,0 @@
/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
* 02110-1301, USA.
*/
#ifndef __ARCH_ARM_MACH_MSM_GPIOMUX_V2_H
#define __ARCH_ARM_MACH_MSM_GPIOMUX_V2_H
#define GPIOMUX_NGPIOS 173
typedef u16 gpiomux_config_t;
enum {
GPIOMUX_DRV_2MA = 0UL << 6,
GPIOMUX_DRV_4MA = 1UL << 6,
GPIOMUX_DRV_6MA = 2UL << 6,
GPIOMUX_DRV_8MA = 3UL << 6,
GPIOMUX_DRV_10MA = 4UL << 6,
GPIOMUX_DRV_12MA = 5UL << 6,
GPIOMUX_DRV_14MA = 6UL << 6,
GPIOMUX_DRV_16MA = 7UL << 6,
};
enum {
GPIOMUX_FUNC_GPIO = 0UL << 2,
GPIOMUX_FUNC_1 = 1UL << 2,
GPIOMUX_FUNC_2 = 2UL << 2,
GPIOMUX_FUNC_3 = 3UL << 2,
GPIOMUX_FUNC_4 = 4UL << 2,
GPIOMUX_FUNC_5 = 5UL << 2,
GPIOMUX_FUNC_6 = 6UL << 2,
GPIOMUX_FUNC_7 = 7UL << 2,
GPIOMUX_FUNC_8 = 8UL << 2,
GPIOMUX_FUNC_9 = 9UL << 2,
GPIOMUX_FUNC_A = 10UL << 2,
GPIOMUX_FUNC_B = 11UL << 2,
GPIOMUX_FUNC_C = 12UL << 2,
GPIOMUX_FUNC_D = 13UL << 2,
GPIOMUX_FUNC_E = 14UL << 2,
GPIOMUX_FUNC_F = 15UL << 2,
};
enum {
GPIOMUX_PULL_NONE = 0UL,
GPIOMUX_PULL_DOWN = 1UL,
GPIOMUX_PULL_KEEPER = 2UL,
GPIOMUX_PULL_UP = 3UL,
};
#endif

15
arch/arm/mach-msm/gpiomux.c
View file

@ -17,9 +17,24 @@
#include <linux/module.h>
#include <linux/spinlock.h>
#include "gpiomux.h"
#include "proc_comm.h"
static DEFINE_SPINLOCK(gpiomux_lock);
static void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val)
{
unsigned tlmm_config = (val & ~GPIOMUX_CTL_MASK) |
((gpio & 0x3ff) << 4);
unsigned tlmm_disable = 0;
int rc;
rc = msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX,
&tlmm_config, &tlmm_disable);
if (rc)
pr_err("%s: unexpected proc_comm failure %d: %08x %08x\n",
__func__, rc, tlmm_config, tlmm_disable);
}
int msm_gpiomux_write(unsigned gpio,
gpiomux_config_t active,
gpiomux_config_t suspended)

5
arch/arm/mach-msm/gpiomux.h
View file

@ -20,12 +20,7 @@
#include <linux/bitops.h>
#include <linux/errno.h>
#include <mach/msm_gpiomux.h>
#if defined(CONFIG_MSM_V2_TLMM)
#include "gpiomux-v2.h"
#else
#include "gpiomux-v1.h"
#endif
/**
* struct msm_gpiomux_config: gpiomux settings for one gpio line.

7
arch/arm/mach-msm/include/mach/msm_iomap-8960.h
View file

@ -32,13 +32,6 @@
*
*/
#define MSM8960_QGIC_DIST_PHYS 0x02000000
#define MSM8960_QGIC_DIST_SIZE SZ_4K
#define MSM8960_QGIC_CPU_PHYS 0x02002000
#define MSM8960_QGIC_CPU_SIZE SZ_4K
#define MSM8960_TMR_PHYS 0x0200A000
#define MSM8960_TMR_SIZE SZ_4K

6
arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
View file

@ -35,12 +35,6 @@
*
*/
#define MSM8X60_QGIC_DIST_PHYS 0x02080000
#define MSM8X60_QGIC_DIST_SIZE SZ_4K
#define MSM8X60_QGIC_CPU_PHYS 0x02081000
#define MSM8X60_QGIC_CPU_SIZE SZ_4K
#define MSM_TLMM_BASE IOMEM(0xF0004000)
#define MSM_TLMM_PHYS 0x00800000
#define MSM_TLMM_SIZE SZ_16K

2
arch/arm/mach-msm/include/mach/msm_iomap.h
View file

@ -62,8 +62,6 @@
/* Virtual addresses shared across all MSM targets. */
#define MSM_CSR_BASE IOMEM(0xE0001000)
#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)
#define MSM_QGIC_CPU_BASE IOMEM(0xF0001000)
#define MSM_TMR_BASE IOMEM(0xF0200000)
#define MSM_TMR0_BASE IOMEM(0xF0201000)
#define MSM_GPIO1_BASE IOMEM(0xE0003000)

4
arch/arm/mach-msm/io.c
View file

@ -107,8 +107,6 @@ void __init msm_map_qsd8x50_io(void)
#ifdef CONFIG_ARCH_MSM8X60
static struct map_desc msm8x60_io_desc[] __initdata = {
MSM_CHIP_DEVICE(QGIC_DIST, MSM8X60),
MSM_CHIP_DEVICE(QGIC_CPU, MSM8X60),
MSM_CHIP_DEVICE(TMR, MSM8X60),
MSM_CHIP_DEVICE(TMR0, MSM8X60),
#ifdef CONFIG_DEBUG_MSM8660_UART
@ -124,8 +122,6 @@ void __init msm_map_msm8x60_io(void)
#ifdef CONFIG_ARCH_MSM8960
static struct map_desc msm8960_io_desc[] __initdata = {
MSM_CHIP_DEVICE(QGIC_DIST, MSM8960),
MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
MSM_CHIP_DEVICE(TMR, MSM8960),
MSM_CHIP_DEVICE(TMR0, MSM8960),
#ifdef CONFIG_DEBUG_MSM8960_UART

8
arch/arm/mach-mvebu/armada-370-xp.c
View file

@ -20,7 +20,6 @@
#include <linux/clk/mvebu.h>
#include <linux/dma-mapping.h>
#include <linux/mbus.h>
#include <linux/irqchip.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -38,18 +37,18 @@ static struct map_desc armada_370_xp_io_desc[] __initdata = {
},
};
void __init armada_370_xp_map_io(void)
static void __init armada_370_xp_map_io(void)
{
iotable_init(armada_370_xp_io_desc, ARRAY_SIZE(armada_370_xp_io_desc));
}
void __init armada_370_xp_timer_and_clk_init(void)
static void __init armada_370_xp_timer_and_clk_init(void)
{
mvebu_clocks_init();
armada_370_xp_timer_init();
}
void __init armada_370_xp_init_early(void)
static void __init armada_370_xp_init_early(void)
{
char *mbus_soc_name;
@ -89,7 +88,6 @@ DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)")
.init_machine = armada_370_xp_dt_init,
.map_io = armada_370_xp_map_io,
.init_early = armada_370_xp_init_early,
.init_irq = irqchip_init,
.init_time = armada_370_xp_timer_and_clk_init,
.restart = mvebu_restart,
.dt_compat = armada_370_xp_dt_compat,

1
arch/arm/mach-mxs/mach-mxs.c
View file

@ -434,7 +434,6 @@ static const char *mxs_dt_compat[] __initdata = {
};
DT_MACHINE_START(MXS, "Freescale MXS (Device Tree)")
.map_io = debug_ll_io_init,
.init_irq = irqchip_init,
.handle_irq = icoll_handle_irq,
.init_time = mxs_timer_init,

2
arch/arm/mach-nomadik/cpu-8815.c
View file

@ -25,7 +25,6 @@
#include <linux/slab.h>
#include <linux/irq.h>
#include <linux/dma-mapping.h>
#include <linux/irqchip.h>
#include <linux/platform_data/clk-nomadik.h>
#include <linux/platform_data/pinctrl-nomadik.h>
#include <linux/pinctrl/machine.h>
@ -323,7 +322,6 @@ static const char * cpu8815_board_compat[] = {
DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815")
.map_io = cpu8815_map_io,
.init_irq = irqchip_init,
.init_time = cpu8815_timer_init_of,
.init_machine = cpu8815_init_of,
.restart = cpu8815_restart,

36
arch/arm/mach-omap1/board-h2.c
View file

@ -41,7 +41,6 @@
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/flash.h>
@ -50,7 +49,6 @@
#include "common.h"
#include "board-h2.h"
#include "dma.h"
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define OMAP1610_ETHR_START 0x04000300
@ -276,39 +274,6 @@ static struct platform_device h2_kp_device = {
.resource = h2_kp_resources,
};
#define H2_IRDA_FIRSEL_GPIO_PIN 17
static struct omap_irda_config h2_irda_data = {
.transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
.rx_channel = OMAP_DMA_UART3_RX,
.tx_channel = OMAP_DMA_UART3_TX,
.dest_start = UART3_THR,
.src_start = UART3_RHR,
.tx_trigger = 0,
.rx_trigger = 0,
};
static struct resource h2_irda_resources[] = {
[0] = {
.start = INT_UART3,
.end = INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
static u64 irda_dmamask = 0xffffffff;
static struct platform_device h2_irda_device = {
.name = "omapirda",
.id = 0,
.dev = {
.platform_data = &h2_irda_data,
.dma_mask = &irda_dmamask,
},
.num_resources = ARRAY_SIZE(h2_irda_resources),
.resource = h2_irda_resources,
};
static struct gpio_led h2_gpio_led_pins[] = {
{
.name = "h2:red",
@ -339,7 +304,6 @@ static struct platform_device *h2_devices[] __initdata = {
&h2_nor_device,
&h2_nand_device,
&h2_smc91x_device,
&h2_irda_device,
&h2_kp_device,
&h2_gpio_leds,
};

31
arch/arm/mach-omap1/board-palmte.c
View file

@ -38,14 +38,12 @@
#include <mach/mux.h>
#include <mach/tc.h>
#include <linux/omap-dma.h>
#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
#include "dma.h"
#define PALMTE_USBDETECT_GPIO 0
#define PALMTE_USB_OR_DC_GPIO 1
@ -167,40 +165,11 @@ static struct platform_device palmte_backlight_device = {
},
};
static struct omap_irda_config palmte_irda_config = {
.transceiver_cap = IR_SIRMODE,
.rx_channel = OMAP_DMA_UART3_RX,
.tx_channel = OMAP_DMA_UART3_TX,
.dest_start = UART3_THR,
.src_start = UART3_RHR,
.tx_trigger = 0,
.rx_trigger = 0,
};
static struct resource palmte_irda_resources[] = {
[0] = {
.start = INT_UART3,
.end = INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device palmte_irda_device = {
.name = "omapirda",
.id = -1,
.dev = {
.platform_data = &palmte_irda_config,
},
.num_resources = ARRAY_SIZE(palmte_irda_resources),
.resource = palmte_irda_resources,
};
static struct platform_device *palmte_devices[] __initdata = {
&palmte_rom_device,
&palmte_kp_device,
&palmte_lcd_device,
&palmte_backlight_device,
&palmte_irda_device,
};
static struct omap_usb_config palmte_usb_config __initdata = {

30
arch/arm/mach-omap1/board-palmtt.c
View file

@ -38,14 +38,12 @@
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
#include "dma.h"
#define PALMTT_USBDETECT_GPIO 0
#define PALMTT_CABLE_GPIO 1
@ -163,33 +161,6 @@ static struct platform_device palmtt_lcd_device = {
.name = "lcd_palmtt",
.id = -1,
};
static struct omap_irda_config palmtt_irda_config = {
.transceiver_cap = IR_SIRMODE,
.rx_channel = OMAP_DMA_UART3_RX,
.tx_channel = OMAP_DMA_UART3_TX,
.dest_start = UART3_THR,
.src_start = UART3_RHR,
.tx_trigger = 0,
.rx_trigger = 0,
};
static struct resource palmtt_irda_resources[] = {
[0] = {
.start = INT_UART3,
.end = INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device palmtt_irda_device = {
.name = "omapirda",
.id = -1,
.dev = {
.platform_data = &palmtt_irda_config,
},
.num_resources = ARRAY_SIZE(palmtt_irda_resources),
.resource = palmtt_irda_resources,
};
static struct platform_device palmtt_spi_device = {
.name = "spi_palmtt",
@ -234,7 +205,6 @@ static struct platform_device *palmtt_devices[] __initdata = {
&palmtt_flash_device,
&palmtt_kp_device,
&palmtt_lcd_device,
&palmtt_irda_device,
&palmtt_spi_device,
&palmtt_backlight_device,
&palmtt_led_device,

31
arch/arm/mach-omap1/board-palmz71.c
View file

@ -40,14 +40,12 @@
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
#include "dma.h"
#define PALMZ71_USBDETECT_GPIO 0
#define PALMZ71_PENIRQ_GPIO 6
@ -153,34 +151,6 @@ static struct platform_device palmz71_lcd_device = {
.id = -1,
};
static struct omap_irda_config palmz71_irda_config = {
.transceiver_cap = IR_SIRMODE,
.rx_channel = OMAP_DMA_UART3_RX,
.tx_channel = OMAP_DMA_UART3_TX,
.dest_start = UART3_THR,
.src_start = UART3_RHR,
.tx_trigger = 0,
.rx_trigger = 0,
};
static struct resource palmz71_irda_resources[] = {
[0] = {
.start = INT_UART3,
.end = INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device palmz71_irda_device = {
.name = "omapirda",
.id = -1,
.dev = {
.platform_data = &palmz71_irda_config,
},
.num_resources = ARRAY_SIZE(palmz71_irda_resources),
.resource = palmz71_irda_resources,
};
static struct platform_device palmz71_spi_device = {
.name = "spi_palmz71",
.id = -1,
@ -202,7 +172,6 @@ static struct platform_device *devices[] __initdata = {
&palmz71_rom_device,
&palmz71_kp_device,
&palmz71_lcd_device,
&palmz71_irda_device,
&palmz71_spi_device,
&palmz71_backlight_device,
};

36
arch/arm/mach-omap1/board-sx1.c
View file

@ -37,7 +37,6 @@
#include <mach/flash.h>
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/irda.h>
#include <mach/tc.h>
#include <mach/board-sx1.h>
@ -45,7 +44,6 @@
#include <mach/usb.h>
#include "common.h"
#include "dma.h"
/* Write to I2C device */
int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
@ -228,39 +226,6 @@ static struct platform_device sx1_kp_device = {
.resource = sx1_kp_resources,
};
/*----------- IRDA -------------------------*/
static struct omap_irda_config sx1_irda_data = {
.transceiver_cap = IR_SIRMODE,
.rx_channel = OMAP_DMA_UART3_RX,
.tx_channel = OMAP_DMA_UART3_TX,
.dest_start = UART3_THR,
.src_start = UART3_RHR,
.tx_trigger = 0,
.rx_trigger = 0,
};
static struct resource sx1_irda_resources[] = {
[0] = {
.start = INT_UART3,
.end = INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
static u64 irda_dmamask = 0xffffffff;
static struct platform_device sx1_irda_device = {
.name = "omapirda",
.id = 0,
.dev = {
.platform_data = &sx1_irda_data,
.dma_mask = &irda_dmamask,
},
.num_resources = ARRAY_SIZE(sx1_irda_resources),
.resource = sx1_irda_resources,
};
/*----------- MTD -------------------------*/
static struct mtd_partition sx1_partitions[] = {
@ -366,7 +331,6 @@ static struct omap_lcd_config sx1_lcd_config __initdata = {
static struct platform_device *sx1_devices[] __initdata = {
&sx1_flash_device,
&sx1_kp_device,
&sx1_irda_device,
};
/*-----------------------------------------*/

9
arch/arm/mach-omap1/devices.c
View file

@ -30,7 +30,6 @@
#include "common.h"
#include "clock.h"
#include "dma.h"
#include "mmc.h"
#include "sram.h"
@ -223,16 +222,16 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
case 0:
base = OMAP1_MMC1_BASE;
irq = INT_MMC;
rx_req = OMAP_DMA_MMC_RX;
tx_req = OMAP_DMA_MMC_TX;
rx_req = 22;
tx_req = 21;
break;
case 1:
if (!cpu_is_omap16xx())
return;
base = OMAP1_MMC2_BASE;
irq = INT_1610_MMC2;
rx_req = OMAP_DMA_MMC2_RX;
tx_req = OMAP_DMA_MMC2_TX;
rx_req = 55;
tx_req = 54;
break;
default:
continue;

2
arch/arm/mach-omap1/dma.c
View file

@ -30,8 +30,6 @@
#include <mach/irqs.h>
#include "dma.h"
#define OMAP1_DMA_BASE (0xfffed800)
#define OMAP1_LOGICAL_DMA_CH_COUNT 17
#define OMAP1_DMA_STRIDE 0x40

42
arch/arm/mach-omap1/dma.h
View file

@ -1,42 +0,0 @@
/*
* OMAP1 DMA channel definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __OMAP1_DMA_CHANNEL_H
#define __OMAP1_DMA_CHANNEL_H
/* DMA channels for omap1 */
#define OMAP_DMA_NO_DEVICE 0
#define OMAP_DMA_MCBSP1_TX 8
#define OMAP_DMA_MCBSP1_RX 9
#define OMAP_DMA_MCBSP3_TX 10
#define OMAP_DMA_MCBSP3_RX 11
#define OMAP_DMA_MCBSP2_TX 16
#define OMAP_DMA_MCBSP2_RX 17
#define OMAP_DMA_UART3_TX 18
#define OMAP_DMA_UART3_RX 19
#define OMAP_DMA_CAMERA_IF_RX 20
#define OMAP_DMA_MMC_TX 21
#define OMAP_DMA_MMC_RX 22
#define OMAP_DMA_USB_W2FC_RX0 26
#define OMAP_DMA_USB_W2FC_TX0 29
/* These are only for 1610 */
#define OMAP_DMA_MMC2_TX 54
#define OMAP_DMA_MMC2_RX 55
#endif /* __OMAP1_DMA_CHANNEL_H */

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