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drm/msm/dsi: Introduce DSI configuration module
With more platforms supported, the DSI host configuration array keeps expanding. This change moves those to a separate dsi_cfg module. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
parent
1bf4d7c565
commit
d248b61f61
4 changed files with 177 additions and 146 deletions
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@ -54,6 +54,7 @@ msm-$(CONFIG_DRM_MSM_FBDEV) += msm_fbdev.o
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msm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o
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msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
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dsi/dsi_cfg.o \
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dsi/dsi_host.o \
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dsi/dsi_manager.o \
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dsi/phy/dsi_phy.o \
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92
drivers/gpu/drm/msm/dsi/dsi_cfg.c
Normal file
92
drivers/gpu/drm/msm/dsi/dsi_cfg.c
Normal file
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@ -0,0 +1,92 @@
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "dsi_cfg.h"
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/* DSI v2 has not been supported by now */
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static const struct msm_dsi_config dsi_v2_cfg = {
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.io_offset = 0,
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};
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static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 3000000, 3000000, 150000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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};
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static const struct msm_dsi_config msm8916_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 2850000, 2850000, 100000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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};
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static const struct msm_dsi_config msm8994_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 7,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdda", 1250000, 1250000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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{"vcca", 1000000, 1000000, 10000, 100},
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{"vdd", 1800000, 1800000, 100000, 100},
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{"lab_reg", -1, -1, -1, -1},
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{"ibb_reg", -1, -1, -1, -1},
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},
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}
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};
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static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
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{MSM_DSI_VER_MAJOR_V2, U32_MAX, &dsi_v2_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg},
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};
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const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
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{
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const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
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int i;
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for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
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if ((dsi_cfg_handlers[i].major == major) &&
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(dsi_cfg_handlers[i].minor == minor)) {
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cfg_hnd = &dsi_cfg_handlers[i];
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break;
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}
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}
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return cfg_hnd;
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}
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44
drivers/gpu/drm/msm/dsi/dsi_cfg.h
Normal file
44
drivers/gpu/drm/msm/dsi/dsi_cfg.h
Normal file
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@ -0,0 +1,44 @@
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MSM_DSI_CFG_H__
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#define __MSM_DSI_CFG_H__
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#include "dsi.h"
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#define MSM_DSI_VER_MAJOR_V2 0x02
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#define MSM_DSI_VER_MAJOR_6G 0x03
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#define MSM_DSI_6G_VER_MINOR_V1_0 0x10000000
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#define MSM_DSI_6G_VER_MINOR_V1_1 0x10010000
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#define MSM_DSI_6G_VER_MINOR_V1_1_1 0x10010001
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#define MSM_DSI_6G_VER_MINOR_V1_2 0x10020000
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#define MSM_DSI_6G_VER_MINOR_V1_3 0x10030000
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#define MSM_DSI_6G_VER_MINOR_V1_3_1 0x10030001
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#define DSI_6G_REG_SHIFT 4
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struct msm_dsi_config {
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u32 io_offset;
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struct dsi_reg_config reg_cfg;
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};
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struct msm_dsi_cfg_handler {
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u32 major;
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u32 minor;
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const struct msm_dsi_config *cfg;
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};
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const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor);
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#endif /* __MSM_DSI_CFG_H__ */
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@ -28,115 +28,7 @@
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#include "dsi.h"
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#include "dsi.xml.h"
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#define MSM_DSI_VER_MAJOR_V2 0x02
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#define MSM_DSI_VER_MAJOR_6G 0x03
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#define MSM_DSI_6G_VER_MINOR_V1_0 0x10000000
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#define MSM_DSI_6G_VER_MINOR_V1_1 0x10010000
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#define MSM_DSI_6G_VER_MINOR_V1_1_1 0x10010001
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#define MSM_DSI_6G_VER_MINOR_V1_2 0x10020000
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#define MSM_DSI_6G_VER_MINOR_V1_3 0x10030000
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#define MSM_DSI_6G_VER_MINOR_V1_3_1 0x10030001
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#define DSI_6G_REG_SHIFT 4
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struct dsi_config {
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u32 major;
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u32 minor;
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u32 io_offset;
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struct dsi_reg_config reg_cfg;
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};
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static const struct dsi_config dsi_cfgs[] = {
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{MSM_DSI_VER_MAJOR_V2, 0, 0, {0,} },
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{ /* 8974 v1 */
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.major = MSM_DSI_VER_MAJOR_6G,
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.minor = MSM_DSI_6G_VER_MINOR_V1_0,
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 3000000, 3000000, 150000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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},
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{ /* 8974 v2 */
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.major = MSM_DSI_VER_MAJOR_6G,
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.minor = MSM_DSI_6G_VER_MINOR_V1_1,
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 3000000, 3000000, 150000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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},
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{ /* 8974 v3 */
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.major = MSM_DSI_VER_MAJOR_6G,
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.minor = MSM_DSI_6G_VER_MINOR_V1_1_1,
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 3000000, 3000000, 150000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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},
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{ /* 8084 */
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.major = MSM_DSI_VER_MAJOR_6G,
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.minor = MSM_DSI_6G_VER_MINOR_V1_2,
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 3000000, 3000000, 150000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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},
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{ /* 8916 */
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.major = MSM_DSI_VER_MAJOR_6G,
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.minor = MSM_DSI_6G_VER_MINOR_V1_3_1,
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 2850000, 2850000, 100000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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},
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{ /* 8x94 */
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.major = MSM_DSI_VER_MAJOR_6G,
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.minor = MSM_DSI_6G_VER_MINOR_V1_3,
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 7,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdda", 1250000, 1250000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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{"vcca", 1000000, 1000000, 10000, 100},
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{"vdd", 1800000, 1800000, 100000, 100},
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{"lab_reg", -1, -1, -1, -1},
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{"ibb_reg", -1, -1, -1, -1},
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},
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}
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},
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};
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#include "dsi_cfg.h"
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static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor)
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{
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@ -214,7 +106,7 @@ struct msm_dsi_host {
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struct gpio_desc *disp_en_gpio;
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struct gpio_desc *te_gpio;
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const struct dsi_config *cfg;
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const struct msm_dsi_cfg_handler *cfg_hnd;
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struct completion dma_comp;
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struct completion video_comp;
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@ -259,61 +151,58 @@ static u32 dsi_get_bpp(const enum mipi_dsi_pixel_format fmt)
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static inline u32 dsi_read(struct msm_dsi_host *msm_host, u32 reg)
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{
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return msm_readl(msm_host->ctrl_base + msm_host->cfg->io_offset + reg);
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return msm_readl(msm_host->ctrl_base + reg);
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}
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static inline void dsi_write(struct msm_dsi_host *msm_host, u32 reg, u32 data)
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{
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msm_writel(data, msm_host->ctrl_base + msm_host->cfg->io_offset + reg);
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msm_writel(data, msm_host->ctrl_base + reg);
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}
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static int dsi_host_regulator_enable(struct msm_dsi_host *msm_host);
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static void dsi_host_regulator_disable(struct msm_dsi_host *msm_host);
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static const struct dsi_config *dsi_get_config(struct msm_dsi_host *msm_host)
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static const struct msm_dsi_cfg_handler *dsi_get_config(
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struct msm_dsi_host *msm_host)
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{
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const struct dsi_config *cfg;
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const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
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struct regulator *gdsc_reg;
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int i, ret;
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int ret;
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u32 major = 0, minor = 0;
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gdsc_reg = regulator_get(&msm_host->pdev->dev, "gdsc");
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if (IS_ERR(gdsc_reg)) {
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pr_err("%s: cannot get gdsc\n", __func__);
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goto fail;
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goto exit;
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}
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ret = regulator_enable(gdsc_reg);
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if (ret) {
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pr_err("%s: unable to enable gdsc\n", __func__);
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regulator_put(gdsc_reg);
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goto fail;
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goto put_gdsc;
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}
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ret = clk_prepare_enable(msm_host->ahb_clk);
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if (ret) {
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pr_err("%s: unable to enable ahb_clk\n", __func__);
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regulator_disable(gdsc_reg);
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regulator_put(gdsc_reg);
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goto fail;
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goto disable_gdsc;
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}
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ret = dsi_get_version(msm_host->ctrl_base, &major, &minor);
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clk_disable_unprepare(msm_host->ahb_clk);
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regulator_disable(gdsc_reg);
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regulator_put(gdsc_reg);
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if (ret) {
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pr_err("%s: Invalid version\n", __func__);
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goto fail;
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goto disable_clks;
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}
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for (i = 0; i < ARRAY_SIZE(dsi_cfgs); i++) {
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cfg = dsi_cfgs + i;
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if ((cfg->major == major) && (cfg->minor == minor))
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return cfg;
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}
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pr_err("%s: Version %x:%x not support\n", __func__, major, minor);
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cfg_hnd = msm_dsi_cfg_get(major, minor);
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fail:
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return NULL;
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DBG("%s: Version %x:%x\n", __func__, major, minor);
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disable_clks:
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clk_disable_unprepare(msm_host->ahb_clk);
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disable_gdsc:
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regulator_disable(gdsc_reg);
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put_gdsc:
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regulator_put(gdsc_reg);
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exit:
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return cfg_hnd;
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}
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static inline struct msm_dsi_host *to_msm_dsi_host(struct mipi_dsi_host *host)
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@ -324,8 +213,8 @@ static inline struct msm_dsi_host *to_msm_dsi_host(struct mipi_dsi_host *host)
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static void dsi_host_regulator_disable(struct msm_dsi_host *msm_host)
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{
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struct regulator_bulk_data *s = msm_host->supplies;
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const struct dsi_reg_entry *regs = msm_host->cfg->reg_cfg.regs;
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int num = msm_host->cfg->reg_cfg.num;
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const struct dsi_reg_entry *regs = msm_host->cfg_hnd->cfg->reg_cfg.regs;
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int num = msm_host->cfg_hnd->cfg->reg_cfg.num;
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int i;
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DBG("");
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@ -340,8 +229,8 @@ static void dsi_host_regulator_disable(struct msm_dsi_host *msm_host)
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static int dsi_host_regulator_enable(struct msm_dsi_host *msm_host)
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{
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struct regulator_bulk_data *s = msm_host->supplies;
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const struct dsi_reg_entry *regs = msm_host->cfg->reg_cfg.regs;
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int num = msm_host->cfg->reg_cfg.num;
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const struct dsi_reg_entry *regs = msm_host->cfg_hnd->cfg->reg_cfg.regs;
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int num = msm_host->cfg_hnd->cfg->reg_cfg.num;
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int ret, i;
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DBG("");
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@ -374,8 +263,8 @@ static int dsi_host_regulator_enable(struct msm_dsi_host *msm_host)
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static int dsi_regulator_init(struct msm_dsi_host *msm_host)
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{
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struct regulator_bulk_data *s = msm_host->supplies;
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const struct dsi_reg_entry *regs = msm_host->cfg->reg_cfg.regs;
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int num = msm_host->cfg->reg_cfg.num;
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const struct dsi_reg_entry *regs = msm_host->cfg_hnd->cfg->reg_cfg.regs;
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int num = msm_host->cfg_hnd->cfg->reg_cfg.num;
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int i, ret;
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for (i = 0; i < num; i++)
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@ -717,6 +606,7 @@ static void dsi_ctrl_config(struct msm_dsi_host *msm_host, bool enable,
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{
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u32 flags = msm_host->mode_flags;
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enum mipi_dsi_pixel_format mipi_fmt = msm_host->format;
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const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
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u32 data = 0;
|
||||
|
||||
if (!enable) {
|
||||
|
@ -770,8 +660,8 @@ static void dsi_ctrl_config(struct msm_dsi_host *msm_host, bool enable,
|
|||
data |= DSI_TRIG_CTRL_MDP_TRIGGER(TRIGGER_NONE);
|
||||
data |= DSI_TRIG_CTRL_DMA_TRIGGER(TRIGGER_SW);
|
||||
data |= DSI_TRIG_CTRL_STREAM(msm_host->channel);
|
||||
if ((msm_host->cfg->major == MSM_DSI_VER_MAJOR_6G) &&
|
||||
(msm_host->cfg->minor >= MSM_DSI_6G_VER_MINOR_V1_2))
|
||||
if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
|
||||
(cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_2))
|
||||
data |= DSI_TRIG_CTRL_BLOCK_DMA_WITHIN_FRAME;
|
||||
dsi_write(msm_host, REG_DSI_TRIG_CTRL, data);
|
||||
|
||||
|
@ -1531,13 +1421,16 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
|
|||
goto fail;
|
||||
}
|
||||
|
||||
msm_host->cfg = dsi_get_config(msm_host);
|
||||
if (!msm_host->cfg) {
|
||||
msm_host->cfg_hnd = dsi_get_config(msm_host);
|
||||
if (!msm_host->cfg_hnd) {
|
||||
ret = -EINVAL;
|
||||
pr_err("%s: get config failed\n", __func__);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
/* fixup base address by io offset */
|
||||
msm_host->ctrl_base += msm_host->cfg_hnd->cfg->io_offset;
|
||||
|
||||
ret = dsi_regulator_init(msm_host);
|
||||
if (ret) {
|
||||
pr_err("%s: regulator init failed\n", __func__);
|
||||
|
@ -1726,6 +1619,7 @@ int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
|
|||
const struct mipi_dsi_msg *msg)
|
||||
{
|
||||
struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
|
||||
const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
|
||||
int data_byte, rx_byte, dlen, end;
|
||||
int short_response, diff, pkt_size, ret = 0;
|
||||
char cmd;
|
||||
|
@ -1767,8 +1661,8 @@ int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
if ((msm_host->cfg->major == MSM_DSI_VER_MAJOR_6G) &&
|
||||
(msm_host->cfg->minor >= MSM_DSI_6G_VER_MINOR_V1_1)) {
|
||||
if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
|
||||
(cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_1)) {
|
||||
/* Clear the RDBK_DATA registers */
|
||||
dsi_write(msm_host, REG_DSI_RDBK_DATA_CTRL,
|
||||
DSI_RDBK_DATA_CTRL_CLR);
|
||||
|
|
Loading…
Reference in a new issue