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tty: serial: uartlite: Specify time for sending chars
Xilinx MDM (Microblaze Debug Module) also contains uart interface via JTAG which is compatible with uartlite driver. This interface is really slow that's why timeout is setup to 1s. Make this time delay not to be cpu speed dependent. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Peter Korsgaard <peter@korsgaard.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 12 additions and 3 deletions
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@ -418,14 +418,23 @@ static struct uart_ops ulite_ops = {
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#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
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static void ulite_console_wait_tx(struct uart_port *port)
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{
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int i;
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u8 val;
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unsigned long timeout;
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/* Spin waiting for TX fifo to have space available */
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for (i = 0; i < 100000; i++) {
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/*
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* Spin waiting for TX fifo to have space available.
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* When using the Microblaze Debug Module this can take up to 1s
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*/
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timeout = jiffies + msecs_to_jiffies(1000);
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while (1) {
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val = uart_in32(ULITE_STATUS, port);
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if ((val & ULITE_STATUS_TXFULL) == 0)
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break;
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if (time_after(jiffies, timeout)) {
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dev_warn(port->dev,
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"timeout waiting for TX buffer empty\n");
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break;
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}
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cpu_relax();
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}
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}
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