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memory: atmel-sdramc: remove the driver
Driver does only clock request + enable for DDR clocks. DDR clocks are
enabled by bootloader and need to stay that way in Linux. To avoid having
these clocks disabled by clock subsystem in case there are no Linux
consumers for them the clocks were marked as critical in clock drivers
(in commit 68b3b6f177
("clk: at91: mark ddr clocks as critical")).
With this, there is no need to have a separate driver that only does
clock request + enable.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230516072405.2696225-1-claudiu.beznea@microchip.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
parent
1d9e93fad5
commit
d3369a4b6f
4 changed files with 0 additions and 90 deletions
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@ -97,7 +97,6 @@ config SOC_AT91SAM9
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depends on ARCH_MULTI_V5
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select ATMEL_AIC_IRQ
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select ATMEL_PM if PM
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select ATMEL_SDRAMC
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select CPU_ARM926T
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select HAVE_AT91_SMD
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select HAVE_AT91_USB_CLK
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@ -131,7 +130,6 @@ config SOC_SAM9X60
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depends on ARCH_MULTI_V5
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select ATMEL_AIC5_IRQ
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select ATMEL_PM if PM
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select ATMEL_SDRAMC
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select CPU_ARM926T
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select HAVE_AT91_USB_CLK
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select HAVE_AT91_GENERATED_CLK
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@ -213,7 +211,6 @@ config SOC_SAMA5
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bool
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select ATMEL_AIC5_IRQ
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select ATMEL_PM if PM
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select ATMEL_SDRAMC
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select MEMORY
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select SOC_SAM_V7
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select SRAM if PM
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@ -234,7 +231,6 @@ config SOC_SAMA7
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bool
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select ARM_GIC
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select ATMEL_PM if PM
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select ATMEL_SDRAMC
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select MEMORY
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select SOC_SAM_V7
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select SRAM if PM
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@ -30,17 +30,6 @@ config ARM_PL172_MPMC
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If you have an embedded system with an AMBA bus and a PL172
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controller, say Y or M here.
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config ATMEL_SDRAMC
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bool "Atmel (Multi-port DDR-)SDRAM Controller"
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default y if ARCH_AT91
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depends on ARCH_AT91 || COMPILE_TEST
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depends on OF
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help
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This driver is for Atmel SDRAM Controller or Atmel Multi-port
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DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
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Starting with the at91sam9g45, this controller supports SDR, DDR and
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LP-DDR memories.
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config ATMEL_EBI
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bool "Atmel EBI driver"
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default y if ARCH_AT91
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@ -8,7 +8,6 @@ ifeq ($(CONFIG_DDR),y)
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obj-$(CONFIG_OF) += of_memory.o
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endif
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obj-$(CONFIG_ARM_PL172_MPMC) += pl172.o
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obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o
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obj-$(CONFIG_ATMEL_EBI) += atmel-ebi.o
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obj-$(CONFIG_BRCMSTB_DPFE) += brcmstb_dpfe.o
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obj-$(CONFIG_BRCMSTB_MEMC) += brcmstb_memc.o
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@ -1,74 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Atmel (Multi-port DDR-)SDRAM Controller driver
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*
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* Author: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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*
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* Copyright (C) 2014 Atmel
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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struct at91_ramc_caps {
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bool has_ddrck;
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bool has_mpddr_clk;
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};
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static const struct at91_ramc_caps at91rm9200_caps = { };
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static const struct at91_ramc_caps at91sam9g45_caps = {
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.has_ddrck = 1,
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.has_mpddr_clk = 0,
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};
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static const struct at91_ramc_caps sama5d3_caps = {
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.has_ddrck = 1,
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.has_mpddr_clk = 1,
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};
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static const struct of_device_id atmel_ramc_of_match[] = {
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{ .compatible = "atmel,at91rm9200-sdramc", .data = &at91rm9200_caps, },
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{ .compatible = "atmel,at91sam9260-sdramc", .data = &at91rm9200_caps, },
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{ .compatible = "atmel,at91sam9g45-ddramc", .data = &at91sam9g45_caps, },
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{ .compatible = "atmel,sama5d3-ddramc", .data = &sama5d3_caps, },
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{},
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};
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static int atmel_ramc_probe(struct platform_device *pdev)
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{
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const struct at91_ramc_caps *caps;
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struct clk *clk;
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caps = of_device_get_match_data(&pdev->dev);
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if (caps->has_ddrck) {
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clk = devm_clk_get_enabled(&pdev->dev, "ddrck");
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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}
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if (caps->has_mpddr_clk) {
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clk = devm_clk_get_enabled(&pdev->dev, "mpddr");
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if (IS_ERR(clk)) {
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pr_err("AT91 RAMC: couldn't get mpddr clock\n");
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return PTR_ERR(clk);
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}
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}
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return 0;
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}
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static struct platform_driver atmel_ramc_driver = {
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.probe = atmel_ramc_probe,
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.driver = {
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.name = "atmel-ramc",
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.of_match_table = atmel_ramc_of_match,
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},
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};
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builtin_platform_driver(atmel_ramc_driver);
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