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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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iio: adc: adi-axi-adc: move to backend framework
[ Upstream commit794ef0e578] Move to the IIO backend framework. Devices supported by adi-axi-adc now register themselves as backend devices. Signed-off-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20240210-iio-backend-v11-7-f5242a5fb42a@analog.com Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Stable-dep-of:cf1c833f89("iio: adc: adi-axi-adc: only error out in major version mismatch") Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Nuno Sa
Greg Kroah-Hartman
parent
184b2967d5
commit
d3513f1261
3 changed files with 107 additions and 369 deletions
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@ -293,7 +293,7 @@ config ADI_AXI_ADC
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select IIO_BUFFER_HW_CONSUMER
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select IIO_BUFFER_DMAENGINE
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select REGMAP_MMIO
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depends on OF
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select IIO_BACKEND
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help
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Say yes here to build support for Analog Devices Generic
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AXI ADC IP core. The IP core is used for interfacing with
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@ -8,6 +8,7 @@
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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@ -17,13 +18,12 @@
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/buffer-dmaengine.h>
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#include <linux/fpga/adi-axi-common.h>
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#include <linux/iio/adc/adi-axi-adc.h>
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#include <linux/iio/backend.h>
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#include <linux/iio/buffer-dmaengine.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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/*
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* Register definitions:
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@ -44,6 +44,7 @@
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#define ADI_AXI_REG_CHAN_CTRL_PN_SEL_OWR BIT(10)
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#define ADI_AXI_REG_CHAN_CTRL_IQCOR_EN BIT(9)
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#define ADI_AXI_REG_CHAN_CTRL_DCFILT_EN BIT(8)
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#define ADI_AXI_REG_CHAN_CTRL_FMT_MASK GENMASK(6, 4)
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#define ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT BIT(6)
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#define ADI_AXI_REG_CHAN_CTRL_FMT_TYPE BIT(5)
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#define ADI_AXI_REG_CHAN_CTRL_FMT_EN BIT(4)
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@ -55,286 +56,100 @@
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ADI_AXI_REG_CHAN_CTRL_FMT_EN | \
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ADI_AXI_REG_CHAN_CTRL_ENABLE)
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struct adi_axi_adc_core_info {
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unsigned int version;
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};
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struct adi_axi_adc_state {
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struct mutex lock;
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struct adi_axi_adc_client *client;
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struct regmap *regmap;
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};
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struct adi_axi_adc_client {
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struct list_head entry;
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struct adi_axi_adc_conv conv;
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struct adi_axi_adc_state *state;
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struct device *dev;
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const struct adi_axi_adc_core_info *info;
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};
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static LIST_HEAD(registered_clients);
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static DEFINE_MUTEX(registered_clients_lock);
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static struct adi_axi_adc_client *conv_to_client(struct adi_axi_adc_conv *conv)
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static int axi_adc_enable(struct iio_backend *back)
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{
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return container_of(conv, struct adi_axi_adc_client, conv);
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struct adi_axi_adc_state *st = iio_backend_get_priv(back);
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int ret;
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ret = regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN,
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ADI_AXI_REG_RSTN_MMCM_RSTN);
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if (ret)
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return ret;
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fsleep(10000);
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return regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN,
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ADI_AXI_REG_RSTN_RSTN | ADI_AXI_REG_RSTN_MMCM_RSTN);
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}
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void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv)
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static void axi_adc_disable(struct iio_backend *back)
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{
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struct adi_axi_adc_client *cl = conv_to_client(conv);
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struct adi_axi_adc_state *st = iio_backend_get_priv(back);
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return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client),
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IIO_DMA_MINALIGN);
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regmap_write(st->regmap, ADI_AXI_REG_RSTN, 0);
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}
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EXPORT_SYMBOL_NS_GPL(adi_axi_adc_conv_priv, IIO_ADI_AXI);
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static int adi_axi_adc_config_dma_buffer(struct device *dev,
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struct iio_dev *indio_dev)
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static int axi_adc_data_format_set(struct iio_backend *back, unsigned int chan,
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const struct iio_backend_data_fmt *data)
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{
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struct adi_axi_adc_state *st = iio_backend_get_priv(back);
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u32 val;
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if (!data->enable)
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return regmap_clear_bits(st->regmap,
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ADI_AXI_REG_CHAN_CTRL(chan),
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ADI_AXI_REG_CHAN_CTRL_FMT_EN);
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val = FIELD_PREP(ADI_AXI_REG_CHAN_CTRL_FMT_EN, true);
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if (data->sign_extend)
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val |= FIELD_PREP(ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT, true);
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if (data->type == IIO_BACKEND_OFFSET_BINARY)
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val |= FIELD_PREP(ADI_AXI_REG_CHAN_CTRL_FMT_TYPE, true);
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return regmap_update_bits(st->regmap, ADI_AXI_REG_CHAN_CTRL(chan),
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ADI_AXI_REG_CHAN_CTRL_FMT_MASK, val);
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}
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static int axi_adc_chan_enable(struct iio_backend *back, unsigned int chan)
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{
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struct adi_axi_adc_state *st = iio_backend_get_priv(back);
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return regmap_set_bits(st->regmap, ADI_AXI_REG_CHAN_CTRL(chan),
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ADI_AXI_REG_CHAN_CTRL_ENABLE);
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}
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static int axi_adc_chan_disable(struct iio_backend *back, unsigned int chan)
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{
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struct adi_axi_adc_state *st = iio_backend_get_priv(back);
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return regmap_clear_bits(st->regmap, ADI_AXI_REG_CHAN_CTRL(chan),
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ADI_AXI_REG_CHAN_CTRL_ENABLE);
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}
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static struct iio_buffer *axi_adc_request_buffer(struct iio_backend *back,
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struct iio_dev *indio_dev)
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{
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struct adi_axi_adc_state *st = iio_backend_get_priv(back);
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struct iio_buffer *buffer;
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const char *dma_name;
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int ret;
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if (!device_property_present(dev, "dmas"))
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return 0;
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if (device_property_read_string(dev, "dma-names", &dma_name))
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if (device_property_read_string(st->dev, "dma-names", &dma_name))
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dma_name = "rx";
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return devm_iio_dmaengine_buffer_setup(indio_dev->dev.parent,
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indio_dev, dma_name);
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}
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static int adi_axi_adc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct adi_axi_adc_state *st = iio_priv(indio_dev);
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struct adi_axi_adc_conv *conv = &st->client->conv;
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if (!conv->read_raw)
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return -EOPNOTSUPP;
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return conv->read_raw(conv, chan, val, val2, mask);
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}
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static int adi_axi_adc_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct adi_axi_adc_state *st = iio_priv(indio_dev);
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struct adi_axi_adc_conv *conv = &st->client->conv;
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if (!conv->write_raw)
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return -EOPNOTSUPP;
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return conv->write_raw(conv, chan, val, val2, mask);
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}
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static int adi_axi_adc_read_avail(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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const int **vals, int *type, int *length,
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long mask)
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{
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struct adi_axi_adc_state *st = iio_priv(indio_dev);
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struct adi_axi_adc_conv *conv = &st->client->conv;
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if (!conv->read_avail)
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return -EOPNOTSUPP;
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return conv->read_avail(conv, chan, vals, type, length, mask);
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}
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static int adi_axi_adc_update_scan_mode(struct iio_dev *indio_dev,
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const unsigned long *scan_mask)
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{
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struct adi_axi_adc_state *st = iio_priv(indio_dev);
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struct adi_axi_adc_conv *conv = &st->client->conv;
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unsigned int i;
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int ret;
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for (i = 0; i < conv->chip_info->num_channels; i++) {
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if (test_bit(i, scan_mask))
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ret = regmap_set_bits(st->regmap,
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ADI_AXI_REG_CHAN_CTRL(i),
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ADI_AXI_REG_CHAN_CTRL_ENABLE);
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else
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ret = regmap_clear_bits(st->regmap,
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ADI_AXI_REG_CHAN_CTRL(i),
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ADI_AXI_REG_CHAN_CTRL_ENABLE);
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if (ret)
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return ret;
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buffer = iio_dmaengine_buffer_alloc(st->dev, dma_name);
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if (IS_ERR(buffer)) {
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dev_err(st->dev, "Could not get DMA buffer, %ld\n",
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PTR_ERR(buffer));
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return ERR_CAST(buffer);
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}
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return 0;
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}
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static struct adi_axi_adc_conv *adi_axi_adc_conv_register(struct device *dev,
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size_t sizeof_priv)
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{
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struct adi_axi_adc_client *cl;
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size_t alloc_size;
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alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_DMA_MINALIGN);
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if (sizeof_priv)
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alloc_size += ALIGN(sizeof_priv, IIO_DMA_MINALIGN);
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cl = kzalloc(alloc_size, GFP_KERNEL);
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if (!cl)
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return ERR_PTR(-ENOMEM);
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mutex_lock(®istered_clients_lock);
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cl->dev = get_device(dev);
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list_add_tail(&cl->entry, ®istered_clients);
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mutex_unlock(®istered_clients_lock);
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return &cl->conv;
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}
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static void adi_axi_adc_conv_unregister(struct adi_axi_adc_conv *conv)
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{
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struct adi_axi_adc_client *cl = conv_to_client(conv);
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mutex_lock(®istered_clients_lock);
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list_del(&cl->entry);
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put_device(cl->dev);
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mutex_unlock(®istered_clients_lock);
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kfree(cl);
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}
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static void devm_adi_axi_adc_conv_release(void *conv)
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{
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adi_axi_adc_conv_unregister(conv);
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}
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struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev,
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size_t sizeof_priv)
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{
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struct adi_axi_adc_conv *conv;
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int ret;
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conv = adi_axi_adc_conv_register(dev, sizeof_priv);
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if (IS_ERR(conv))
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return conv;
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ret = devm_add_action_or_reset(dev, devm_adi_axi_adc_conv_release,
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conv);
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indio_dev->modes |= INDIO_BUFFER_HARDWARE;
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ret = iio_device_attach_buffer(indio_dev, buffer);
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if (ret)
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return ERR_PTR(ret);
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return conv;
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}
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EXPORT_SYMBOL_NS_GPL(devm_adi_axi_adc_conv_register, IIO_ADI_AXI);
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static const struct iio_info adi_axi_adc_info = {
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.read_raw = &adi_axi_adc_read_raw,
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.write_raw = &adi_axi_adc_write_raw,
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.update_scan_mode = &adi_axi_adc_update_scan_mode,
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.read_avail = &adi_axi_adc_read_avail,
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};
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static const struct adi_axi_adc_core_info adi_axi_adc_10_0_a_info = {
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.version = ADI_AXI_PCORE_VER(10, 0, 'a'),
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};
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static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev)
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{
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const struct adi_axi_adc_core_info *info;
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struct adi_axi_adc_client *cl;
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struct device_node *cln;
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info = of_device_get_match_data(dev);
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if (!info)
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return ERR_PTR(-ENODEV);
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cln = of_parse_phandle(dev->of_node, "adi,adc-dev", 0);
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if (!cln) {
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dev_err(dev, "No 'adi,adc-dev' node defined\n");
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return ERR_PTR(-ENODEV);
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}
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mutex_lock(®istered_clients_lock);
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list_for_each_entry(cl, ®istered_clients, entry) {
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if (!cl->dev)
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continue;
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if (cl->dev->of_node != cln)
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continue;
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if (!try_module_get(cl->dev->driver->owner)) {
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mutex_unlock(®istered_clients_lock);
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of_node_put(cln);
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return ERR_PTR(-ENODEV);
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}
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get_device(cl->dev);
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cl->info = info;
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mutex_unlock(®istered_clients_lock);
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of_node_put(cln);
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return cl;
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}
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mutex_unlock(®istered_clients_lock);
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of_node_put(cln);
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return ERR_PTR(-EPROBE_DEFER);
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return buffer;
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}
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static int adi_axi_adc_setup_channels(struct device *dev,
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struct adi_axi_adc_state *st)
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static void axi_adc_free_buffer(struct iio_backend *back,
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struct iio_buffer *buffer)
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{
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struct adi_axi_adc_conv *conv = &st->client->conv;
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int i, ret;
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if (conv->preenable_setup) {
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ret = conv->preenable_setup(conv);
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if (ret)
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return ret;
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}
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for (i = 0; i < conv->chip_info->num_channels; i++) {
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ret = regmap_write(st->regmap, ADI_AXI_REG_CHAN_CTRL(i),
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ADI_AXI_REG_CHAN_CTRL_DEFAULTS);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int axi_adc_reset(struct adi_axi_adc_state *st)
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{
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int ret;
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ret = regmap_write(st->regmap, ADI_AXI_REG_RSTN, 0);
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if (ret)
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return ret;
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mdelay(10);
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ret = regmap_write(st->regmap, ADI_AXI_REG_RSTN,
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ADI_AXI_REG_RSTN_MMCM_RSTN);
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if (ret)
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return ret;
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mdelay(10);
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return regmap_write(st->regmap, ADI_AXI_REG_RSTN,
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ADI_AXI_REG_RSTN_RSTN | ADI_AXI_REG_RSTN_MMCM_RSTN);
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}
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static void adi_axi_adc_cleanup(void *data)
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{
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struct adi_axi_adc_client *cl = data;
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put_device(cl->dev);
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module_put(cl->dev->driver->owner);
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iio_dmaengine_buffer_free(buffer);
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}
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static const struct regmap_config axi_adc_regmap_config = {
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@ -344,45 +159,47 @@ static const struct regmap_config axi_adc_regmap_config = {
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.max_register = 0x0800,
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};
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static const struct iio_backend_ops adi_axi_adc_generic = {
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.enable = axi_adc_enable,
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.disable = axi_adc_disable,
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.data_format_set = axi_adc_data_format_set,
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.chan_enable = axi_adc_chan_enable,
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.chan_disable = axi_adc_chan_disable,
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.request_buffer = axi_adc_request_buffer,
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.free_buffer = axi_adc_free_buffer,
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};
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static int adi_axi_adc_probe(struct platform_device *pdev)
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{
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struct adi_axi_adc_conv *conv;
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struct iio_dev *indio_dev;
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struct adi_axi_adc_client *cl;
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const unsigned int *expected_ver;
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struct adi_axi_adc_state *st;
|
||||
void __iomem *base;
|
||||
unsigned int ver;
|
||||
int ret;
|
||||
|
||||
cl = adi_axi_adc_attach_client(&pdev->dev);
|
||||
if (IS_ERR(cl))
|
||||
return PTR_ERR(cl);
|
||||
|
||||
ret = devm_add_action_or_reset(&pdev->dev, adi_axi_adc_cleanup, cl);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st));
|
||||
if (indio_dev == NULL)
|
||||
st = devm_kzalloc(&pdev->dev, sizeof(*st), GFP_KERNEL);
|
||||
if (!st)
|
||||
return -ENOMEM;
|
||||
|
||||
st = iio_priv(indio_dev);
|
||||
st->client = cl;
|
||||
cl->state = st;
|
||||
mutex_init(&st->lock);
|
||||
|
||||
base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(base))
|
||||
return PTR_ERR(base);
|
||||
|
||||
st->dev = &pdev->dev;
|
||||
st->regmap = devm_regmap_init_mmio(&pdev->dev, base,
|
||||
&axi_adc_regmap_config);
|
||||
if (IS_ERR(st->regmap))
|
||||
return PTR_ERR(st->regmap);
|
||||
|
||||
conv = &st->client->conv;
|
||||
expected_ver = device_get_match_data(&pdev->dev);
|
||||
if (!expected_ver)
|
||||
return -ENODEV;
|
||||
|
||||
ret = axi_adc_reset(st);
|
||||
/*
|
||||
* Force disable the core. Up to the frontend to enable us. And we can
|
||||
* still read/write registers...
|
||||
*/
|
||||
ret = regmap_write(st->regmap, ADI_AXI_REG_RSTN, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
@ -390,33 +207,19 @@ static int adi_axi_adc_probe(struct platform_device *pdev)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (cl->info->version > ver) {
|
||||
if (*expected_ver > ver) {
|
||||
dev_err(&pdev->dev,
|
||||
"IP core version is too old. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n",
|
||||
ADI_AXI_PCORE_VER_MAJOR(cl->info->version),
|
||||
ADI_AXI_PCORE_VER_MINOR(cl->info->version),
|
||||
ADI_AXI_PCORE_VER_PATCH(cl->info->version),
|
||||
ADI_AXI_PCORE_VER_MAJOR(*expected_ver),
|
||||
ADI_AXI_PCORE_VER_MINOR(*expected_ver),
|
||||
ADI_AXI_PCORE_VER_PATCH(*expected_ver),
|
||||
ADI_AXI_PCORE_VER_MAJOR(ver),
|
||||
ADI_AXI_PCORE_VER_MINOR(ver),
|
||||
ADI_AXI_PCORE_VER_PATCH(ver));
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
indio_dev->info = &adi_axi_adc_info;
|
||||
indio_dev->name = "adi-axi-adc";
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->num_channels = conv->chip_info->num_channels;
|
||||
indio_dev->channels = conv->chip_info->channels;
|
||||
|
||||
ret = adi_axi_adc_config_dma_buffer(&pdev->dev, indio_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = adi_axi_adc_setup_channels(&pdev->dev, st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = devm_iio_device_register(&pdev->dev, indio_dev);
|
||||
ret = devm_iio_backend_register(&pdev->dev, &adi_axi_adc_generic, st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
@ -428,6 +231,8 @@ static int adi_axi_adc_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int adi_axi_adc_10_0_a_info = ADI_AXI_PCORE_VER(10, 0, 'a');
|
||||
|
||||
/* Match table for of_platform binding */
|
||||
static const struct of_device_id adi_axi_adc_of_match[] = {
|
||||
{ .compatible = "adi,axi-adc-10.0.a", .data = &adi_axi_adc_10_0_a_info },
|
||||
|
|
@ -448,3 +253,4 @@ MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
|
|||
MODULE_DESCRIPTION("Analog Devices Generic AXI ADC IP core driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_IMPORT_NS(IIO_DMAENGINE_BUFFER);
|
||||
MODULE_IMPORT_NS(IIO_BACKEND);
|
||||
|
|
|
|||
|
|
@ -1,68 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Analog Devices Generic AXI ADC IP core driver/library
|
||||
* Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
|
||||
*
|
||||
* Copyright 2012-2020 Analog Devices Inc.
|
||||
*/
|
||||
#ifndef __ADI_AXI_ADC_H__
|
||||
#define __ADI_AXI_ADC_H__
|
||||
|
||||
struct device;
|
||||
struct iio_chan_spec;
|
||||
|
||||
/**
|
||||
* struct adi_axi_adc_chip_info - Chip specific information
|
||||
* @name Chip name
|
||||
* @id Chip ID (usually product ID)
|
||||
* @channels Channel specifications of type @struct iio_chan_spec
|
||||
* @num_channels Number of @channels
|
||||
* @scale_table Supported scales by the chip; tuples of 2 ints
|
||||
* @num_scales Number of scales in the table
|
||||
* @max_rate Maximum sampling rate supported by the device
|
||||
*/
|
||||
struct adi_axi_adc_chip_info {
|
||||
const char *name;
|
||||
unsigned int id;
|
||||
|
||||
const struct iio_chan_spec *channels;
|
||||
unsigned int num_channels;
|
||||
|
||||
const unsigned int (*scale_table)[2];
|
||||
int num_scales;
|
||||
|
||||
unsigned long max_rate;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct adi_axi_adc_conv - data of the ADC attached to the AXI ADC
|
||||
* @chip_info chip info details for the client ADC
|
||||
* @preenable_setup op to run in the client before enabling the AXI ADC
|
||||
* @reg_access IIO debugfs_reg_access hook for the client ADC
|
||||
* @read_raw IIO read_raw hook for the client ADC
|
||||
* @write_raw IIO write_raw hook for the client ADC
|
||||
* @read_avail IIO read_avail hook for the client ADC
|
||||
*/
|
||||
struct adi_axi_adc_conv {
|
||||
const struct adi_axi_adc_chip_info *chip_info;
|
||||
|
||||
int (*preenable_setup)(struct adi_axi_adc_conv *conv);
|
||||
int (*reg_access)(struct adi_axi_adc_conv *conv, unsigned int reg,
|
||||
unsigned int writeval, unsigned int *readval);
|
||||
int (*read_raw)(struct adi_axi_adc_conv *conv,
|
||||
struct iio_chan_spec const *chan,
|
||||
int *val, int *val2, long mask);
|
||||
int (*write_raw)(struct adi_axi_adc_conv *conv,
|
||||
struct iio_chan_spec const *chan,
|
||||
int val, int val2, long mask);
|
||||
int (*read_avail)(struct adi_axi_adc_conv *conv,
|
||||
struct iio_chan_spec const *chan,
|
||||
const int **val, int *type, int *length, long mask);
|
||||
};
|
||||
|
||||
struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev,
|
||||
size_t sizeof_priv);
|
||||
|
||||
void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue