ARM: dts: aspeed: Add device tree for Quanta S6Q BMC
The Quanta S6Q is a server platform with AST2600 BMC SoC Signed-off-by: George Hung <george.hung@quantatw.com> Reviewed-by: Alan Kuo <Alan_Kuo@quantatw.com> Reviewed-by: P.K. Lee <p.k.lee@quantatw.com> Link: https://lore.kernel.org/r/20220217031355.46102-1-george.hung@quantatw.com Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
George Hung
Joel Stanley
parent
60170ec8ed
commit
d44ea6e3c7
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@ -1542,6 +1542,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
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aspeed-bmc-opp-zaius.dtb \
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aspeed-bmc-portwell-neptune.dtb \
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aspeed-bmc-quanta-q71l.dtb \
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aspeed-bmc-quanta-s6q.dtb \
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aspeed-bmc-supermicro-x11spi.dtb \
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aspeed-bmc-inventec-transformers.dtb \
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aspeed-bmc-tyan-s7106.dtb \
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@ -0,0 +1,610 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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// Copyright 2022 Quanta Corp.
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/dts-v1/;
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#include "aspeed-g6.dtsi"
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#include <dt-bindings/gpio/aspeed-gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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model = "Quanta S6Q BMC";
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compatible = "quanta,s6q-bmc", "aspeed,ast2600";
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aliases {
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// bus 0
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i2c20 = &SMB_HOST_DB2000_3V3AUX_SCL;
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i2c21 = &U12_PCA9546_CH1;
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i2c22 = &SMB_HOST_DB800_B_SCL;
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i2c23 = &SMB_HOST_DB800_C_SCL;
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// bus 1
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i2c24 = &SMB_M2_P0_1V8AUX_SCL;
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i2c25 = &SMB_M2_P1_1V8AUX_SCL;
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i2c26 = &SMB_CPU_PIROM_3V3AUX_SCL;
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i2c27 = &SMB_TEMP_3V3AUX_SCL;
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i2c28 = &SMB_IPMB_3V3AUX_SSDSB_SCL;
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i2c29 = &SMB_IPMB_3V3AUX_SCL;
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i2c31 = &SMB_FB_SCL;
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// bus 1 - Fan board
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i2c32 = &SMB_IOEXP_SCL;
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i2c33 = &SMB_PROGRAM_SCL;
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i2c34 = &SMB_FB_SCL_CH2;
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i2c35 = &SMB_FAN_SENSE_SCL;
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// bus 6
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i2c36 = &U197_PCA9546_CH0;
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i2c37 = &U197_PCA9546_CH1;
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i2c38 = &U197_PCA9546_CH2;
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i2c39 = &U197_PCA9546_CH3;
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//bus 7
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i2c40 = &SMB_OCP_SFF_3V3AUX_SCL; //OCP1
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i2c41 = &SMB_OCP_LFF_3V3AUX_SCL; //OCP2
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};
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chosen {
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stdout-path = &uart5;
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bootargs = "console=ttyS4,115200n8 earlycon";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x40000000>;
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};
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
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<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
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<&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
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<&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
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};
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leds {
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compatible = "gpio-leds";
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BMC_HEARTBEAT_N {
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label="BMC_HEARTBEAT_N";
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gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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};
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BMC_LED_STATUS_AMBER_N {
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label="BMC_LED_STATUS_AMBER_N";
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gpios = <&gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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FM_ID_LED_N {
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label="FM_ID_LED_N";
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gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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};
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&gpio0 {
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gpio-line-names =
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/*A0 - A7*/ "", "", "", "", "", "", "", "",
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/*B0 - B7*/ "", "", "", "", "", "", "", "",
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/*C0 - C7*/ "", "", "", "", "", "", "", "",
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/*D0 - D7*/ "", "", "", "", "", "", "", "",
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/*E0 - E7*/ "", "", "", "", "", "", "", "",
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/*F0 - F7*/ "PLTRST_N", "", "PWR_DEBUG_N", "", "", "", "", "",
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/*G0 - G7*/ "", "", "", "", "", "", "", "",
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/*H0 - H7*/ "", "", "", "", "", "", "", "",
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/*I0 - I7*/ "", "", "", "", "", "", "", "",
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/*J0 - J7*/ "", "", "", "", "", "", "", "",
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/*K0 - K7*/ "", "", "", "", "", "", "", "",
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/*L0 - L7*/ "", "", "", "", "PREQ_N", "TCK_MUX_SEL", "", "",
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/*M0 - M7*/ "", "", "", "PWRGD_SYS_PWROK", "", "PRDY_N", "", "",
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/*N0 - N7*/ "", "", "", "", "", "", "", "",
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/*O0 - O7*/ "", "", "", "", "", "", "", "",
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/*P0 - P7*/ "SYS_BMC_PWRBTN_R_N", "SYS_PWRBTN_N", "FM_MB_RST_BTN", "RST_BMC_RSTBTN_OUT_N", "", "", "", "",
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/*Q0 - Q7*/ "", "", "", "", "", "", "", "",
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/*R0 - R7*/ "", "", "", "", "", "", "", "",
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/*S0 - S7*/ "", "", "", "FP_ID_BTN_SCM_N", "", "", "", "",
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/*T0 - T7*/ "", "", "", "", "", "", "", "",
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/*U0 - U7*/ "", "", "", "", "", "", "", "",
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/*V0 - V7*/ "", "", "", "", "", "SMI", "", "",
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/*W0 - W7*/ "", "", "", "", "", "", "", "",
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/*X0 - X7*/ "", "", "", "", "", "", "", "",
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/*Y0 - Y7*/ "", "", "", "", "", "", "", "",
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/*Z0 - Z7*/ "FM_BMC_READY_N", "", "", "", "", "", "", "",
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/*AA0 - AA7*/ "", "", "", "", "", "", "", "",
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/*AB0 - AB7*/ "", "", "", "", "", "", "", "",
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/*AC0 - AC7*/ "", "", "", "", "", "", "", "";
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};
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&sgpiom0 {
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status = "okay";
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ngpios = <128>;
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bus-frequency = <48000>;
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gpio-line-names =
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/* SGPIO input lines */
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/*IOA0-IOA7*/ "","", "SIO_POWER_GOOD","OA1", "XDP_PRST_N","", "","", "FM_SLPS3_PLD_N","", "FM_SLPS4_PLD_N","", "FM_BIOS_POST_CMPLT_BMC_N","", "FM_ADR_TRIGGER_N","OA7",
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/*IOB0-IOB7*/ "FM_ADR_COMPLETE","", "FM_PMBUS_ALERT_B_EN","", "PSU0_PRESENT_N","", "PSU1_PRESENT_N","", "PSU0_VIN_BUF_GOOD","", "PSU01_VIN_BUF_GOOD","", "PWRGD_PS0_PWROK_R","", "PWRGD_PS1_PWROK_R","",
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/*IOC0-IOC7*/ "PWRGD_PS_PWROK_PLD_R","", "CHASSIS_INTRUSION","", "BMC_MFG_MODE","", "FM_BMC_EN_DET_R","", "FM_ME_BT_DONE","", "CPU1_PRESENCE","", "CPU2_PRESENCE","", "IRQ_PSYS_CRIT_N","",
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/*IOD0-IOD7*/ "","", "CPU1_THERMTRIP","", "CPU2_THERMTRIP","", "CPU1_MEM_THERM_EVENT","", "CPU2_MEM_THERM_EVENT","", "CPU1_VRHOT","", "CPU2_VRHOT","", "","",
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/*IOE0-IOE7*/ "","", "CPU1_MEM_VRHOT","", "CPU2_MEM_VRHOT","", "","", "PCH_BMC_THERMTRIP","", "","", "","", "","",
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/*IOF0-IOF7*/ "CPU_ERR0","", "CPU_ERR1","", "CPU_ERR2","", "","", "","", "CPU_CATERR","", "","", "","",
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/*IOG0-IOG7*/ "","", "","", "","", "","", "","", "","", "","", "","",
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/*IOH0-IOH7*/ "","", "FP_ID_BTN_R1_N","", "FP_RST_BTN_N","", "","", "","", "FP_PWR_BTN_PLD_N_R","", "","", "","",
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/*IOI0-IOI7*/ "","", "","", "","", "","", "","", "","", "","", "","",
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/*IOJ0-IOJ7*/ "","", "","", "","", "","", "","", "","", "","", "","",
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/*IOK0-IOK7*/ "","", "","", "","", "","", "","", "","", "","", "","",
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/*IOL0-IOL7*/ "","", "","", "","", "","", "","", "","", "","", "","",
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/*IOM0-IOM7*/ "","", "","", "","", "","", "","", "","", "","", "","",
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/*ION0-ION7*/ "","BMC_SW_HEARTBEAT_N_R", "","FP_LED_FAULT_N", "","FP_ID_LED_N", "","FM_BMC_RSTBTN_OUT_N", "","FM_THERMTRIP_DLY_LVC1_R_N", "","", "","RST_PCA9548_SENSOR_PLD_N", "","USB_OC1_REAR_N",
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/*IOO0-IOO7*/ "","IRQ_TPM_SPI_N", "","", "","IRQ_PCH_SCI_WHEA_R_N", "","IRQ_BMC_PCH_NMI_R", "","H_CPU_NMI_LVC1_R_N", "","", "","", "","FM_JTAG_BMC_PLD_MUX_SEL",
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/*IOP0-IOP7*/ "IP0","OP0", "","", "","", "","", "","", "","", "","", "IP7","OP7";
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};
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&adc0 {
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vref = <2500>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
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&pinctrl_adc2_default &pinctrl_adc3_default
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&pinctrl_adc4_default &pinctrl_adc5_default
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&pinctrl_adc6_default &pinctrl_adc7_default>;
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};
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&adc1 {
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vref = <2500>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
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&pinctrl_adc10_default &pinctrl_adc11_default
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&pinctrl_adc12_default &pinctrl_adc13_default
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&pinctrl_adc14_default &pinctrl_adc15_default>;
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};
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&mdio2 {
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status = "okay";
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ethphy2: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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};
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&mac2 {
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status = "okay";
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phy-mode = "rgmii";
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phy-handle = <ðphy2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rgmii3_default>;
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};
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&mac3 {
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status = "okay";
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phy-mode = "rmii";
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use-ncsi;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rmii4_default>;
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};
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&fmc {
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status = "okay";
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flash@0 {
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status = "okay";
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m25p,fast-read;
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label = "bmc";
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spi-max-frequency = <50000000>;
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#include "openbmc-flash-layout-64.dtsi"
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};
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};
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&spi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
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&pinctrl_spi2cs2_default>;
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status = "okay";
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flash@0 {
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status = "okay";
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m25p,fast-read;
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label = "spi2:0";
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spi-max-frequency = <50000000>;
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};
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};
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&kcs1 {
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status = "okay";
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aspeed,lpc-io-reg = <0xCA0>;
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};
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&kcs2 {
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status = "okay";
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aspeed,lpc-io-reg = <0xCA8>;
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};
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&kcs3 {
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status = "okay";
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aspeed,lpc-io-reg = <0xCA2>;
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};
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&emmc_controller {
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status = "okay";
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};
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&emmc {
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non-removable;
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bus-width = <4>;
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max-frequency = <100000000>;
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};
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&vhub {
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status = "okay";
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};
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&lpc_snoop {
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status = "okay";
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snoop-ports = <0x80>;
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};
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&uart1 {
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&uart4 {
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status = "okay";
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};
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&uart5 {
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status = "okay";
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};
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&uart_routing {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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U34_PWR_ADC@48 {
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compatible = "ti,ads7830";
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reg = <0x48>;
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};
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U35_PWR_ADC@4b {
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compatible = "ti,ads7830";
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reg = <0x4b>;
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};
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i2c-switch@70 {
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compatible = "nxp,pca9546";
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reg = <0x70>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-mux-idle-disconnect;
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SMB_HOST_DB2000_3V3AUX_SCL: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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};
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U12_PCA9546_CH1: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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};
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SMB_HOST_DB800_B_SCL: i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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};
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SMB_HOST_DB800_C_SCL: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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};
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};
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};
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&i2c1 {
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status = "okay";
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i2c-switch@59 {
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compatible = "nxp,pca9848";
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reg = <0x59>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-mux-idle-disconnect;
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SMB_M2_P0_1V8AUX_SCL: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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};
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SMB_M2_P1_1V8AUX_SCL: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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};
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SMB_CPU_PIROM_3V3AUX_SCL: i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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};
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SMB_TEMP_3V3AUX_SCL: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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U163_tmp75@48 {
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compatible = "ti,tmp75";
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reg = <0x48>;
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};
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U114_tmp75@49 {
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compatible = "ti,tmp75";
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reg = <0x49>;
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};
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};
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SMB_IPMB_3V3AUX_SSDSB_SCL: i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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U4_tmp75@4c {
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compatible = "ti,tmp75";
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reg = <0x4c>;
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};
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U73_tmp75@4d {
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compatible = "ti,tmp75";
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reg = <0x4d>;
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};
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};
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SMB_IPMB_3V3AUX_SCL: i2c@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <5>;
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U190_fru@51 {
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compatible = "atmel,24c128";
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reg = <0x51>;
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pagesize = <32>;
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};
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};
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SMB_FB_SCL: i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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i2c-switch@77 {
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compatible = "nxp,pca9546";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-mux-idle-disconnect;
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SMB_IOEXP_SCL: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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};
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SMB_PROGRAM_SCL: i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
SMB_FB_SCL_CH2: i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
SMB_FAN_SENSE_SCL: i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
Current_Meter_U2@45 {
|
||||
compatible = "ti,ina219";
|
||||
reg = <0x45>;
|
||||
shunt-resistor = <1000>; /* = 1 mOhm */
|
||||
};
|
||||
|
||||
Current_Meter_U3@44 {
|
||||
compatible = "ti,ina219";
|
||||
reg = <0x44>;
|
||||
shunt-resistor = <1000>; /* = 1 mOhm */
|
||||
};
|
||||
|
||||
TEMP_sensor_U2@4b {
|
||||
compatible = "ti,tmp75";
|
||||
reg = <0x4b>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
bus-frequency = <400000>;
|
||||
|
||||
ipmb@10 {
|
||||
compatible = "ipmb-dev";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
i2c-protocol;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
|
||||
/* MB FRU (U173) @ 0xA2 */
|
||||
mb_fru: mb_fru@51 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x51>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
|
||||
/* FP_U1 Inlet */
|
||||
FP_U1_tmp75@4a {
|
||||
compatible = "ti,tmp75";
|
||||
reg = <0x4a>;
|
||||
};
|
||||
|
||||
FP_U4_fru@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
|
||||
i2c-switch@77 {
|
||||
compatible = "nxp,pca9548";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x77>;
|
||||
i2c-mux-idle-disconnect;
|
||||
|
||||
U197_PCA9546_CH0: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
U197_PCA9546_CH1: i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
cpu0_pvccin@60 {
|
||||
compatible = "isil,raa229004";
|
||||
reg = <0x60>;
|
||||
};
|
||||
|
||||
cpu0_pvccinfaon@61 {
|
||||
compatible = "isil,isl69260";
|
||||
reg = <0x61>;
|
||||
};
|
||||
|
||||
cpu0_pvccd_hv@63 {
|
||||
compatible = "isil,isl69260";
|
||||
reg = <0x63>;
|
||||
};
|
||||
};
|
||||
|
||||
U197_PCA9546_CH2: i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
|
||||
cpu1_pvccin@72 {
|
||||
compatible = "isil,raa229004";
|
||||
reg = <0x72>;
|
||||
};
|
||||
|
||||
cpu1_pvccinfaon@74 {
|
||||
compatible = "isil,isl69260";
|
||||
reg = <0x74>;
|
||||
};
|
||||
|
||||
cpu1_pvccd_hv@76 {
|
||||
compatible = "isil,isl69260";
|
||||
reg = <0x76>;
|
||||
};
|
||||
};
|
||||
|
||||
U197_PCA9546_CH3: i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
status = "okay";
|
||||
|
||||
i2c-switch@75 {
|
||||
compatible = "nxp,pca9546";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x75>;
|
||||
i2c-mux-idle-disconnect;
|
||||
|
||||
SMB_OCP_SFF_3V3AUX_SCL: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
SMB_OCP_LFF_3V3AUX_SCL: i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c9 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c11 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c14 {
|
||||
status = "okay";
|
||||
|
||||
/* SCM FRU (U19) @ 0xA2 */
|
||||
scm_fru: scm_fru@51 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x51>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
|
||||
scm_tmp75_u4@4a {
|
||||
compatible = "ti,tmp75";
|
||||
reg = <0x4a>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c15 {
|
||||
status = "okay";
|
||||
};
|
||||
Loading…
Reference in New Issue