mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-27 03:10:12 +00:00
Here's the latest pile of clk driver and clk framework fixes for this
release. - Two clk framework fixes for a long standing issue in clk_notifier_{register,unregister}() where we used a pointer that was for a struct containing a list head when there was no container struct - A compile warning fix for socfpga that's good to have - A double free problem with devm registered fixed factor clks - One last fix to the Qualcomm camera clk driver to use the right clk ops so clks don't get stuck and stop working because the firmware takes them for a ride. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmBxArIRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSUKHhAAwlYpfIY69a8LJIwRvqRkgrdRL7xZ4L/4 K7fB2bPMt+C8BD/hoPURGPRtg3CYJySYf7aQ9JsknmA7+ZXU+EawOsYylhjsYED5 pfjdsbGGZJGXZyXXSfmspg5IrRGIE7B0vwMOsG58zp60lCpuKbVsjVr3OsEBb797 eFf2mim+AIzh9G2/HUk//KJjLCFDbP6tdi3L3nQ8XKOjEC46nKDN4jSNFldYckvC NRRxiUR2q5Jvf4mK0H1pekBT4t/KuWpAupeW85Y4aLSiP2v+PE9zW8WqWszB5b1O Ln/8FTMvANnqiRufkpOqUbp+gMuNx/0MqipE6GpoLzIpg1vGsAYHxASNOIA/7RLX LnDytcZHjHtJ5xmbw/wDCIus6a80yeQYCMY30nvA+vEd8f6PSt1WV2ISG9HQVmeh +1jOBfMDeK6dYIwcU/d2/aMoNT8V625OisWrfNCIpoaRXo1g9340qn03mpw24VlZ 6r2/roVK8jdGnrNft4z5hnLeq5kcjuzxGyzjJTnBIqC5v7ZT+HUOh6raNSQJyIes 7BdndOinZr0To/WQZ4p2yLfUrCXUxqy88nYukJUC49Iu4Ai6VhTA+Bdg3vEI4w9l yz6RbuccIgLR1goLVTFVE00hgz42iMgz0QqzWkZfMDEr8WuJCPQD0WVJ4CdlWor1 +Ya2VYFP1AE= =YRHd -----END PGP SIGNATURE----- Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk fixes from Stephen Boyd: "Here's the latest pile of clk driver and clk framework fixes for this release: - Two clk framework fixes for a long standing issue in clk_notifier_{register,unregister}() where we used a pointer that was for a struct containing a list head when there was no container struct - A compile warning fix for socfpga that's good to have - A double free problem with devm registered fixed factor clks - One last fix to the Qualcomm camera clk driver to use the right clk ops so clks don't get stuck and stop working because the firmware takes them for a ride" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: fixed: fix double free in resource managed fixed-factor clock clk: fix invalid usage of list cursor in unregister clk: fix invalid usage of list cursor in register clk: qcom: camcc: Update the clock ops for the SC7180 clk: socfpga: fix iomem pointer cast on 64-bit
This commit is contained in:
commit
d496177222
4 changed files with 56 additions and 54 deletions
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@ -66,7 +66,14 @@ EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
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static void devm_clk_hw_register_fixed_factor_release(struct device *dev, void *res)
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{
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clk_hw_unregister_fixed_factor(&((struct clk_fixed_factor *)res)->hw);
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struct clk_fixed_factor *fix = res;
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/*
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* We can not use clk_hw_unregister_fixed_factor, since it will kfree()
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* the hw, resulting in double free. Just unregister the hw and let
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* devres code kfree() it.
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*/
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clk_hw_unregister(&fix->hw);
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}
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static struct clk_hw *
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@ -4357,20 +4357,19 @@ int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
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/* search the list of notifiers for this clk */
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list_for_each_entry(cn, &clk_notifier_list, node)
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if (cn->clk == clk)
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break;
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goto found;
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/* if clk wasn't in the notifier list, allocate new clk_notifier */
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if (cn->clk != clk) {
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cn = kzalloc(sizeof(*cn), GFP_KERNEL);
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if (!cn)
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goto out;
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cn = kzalloc(sizeof(*cn), GFP_KERNEL);
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if (!cn)
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goto out;
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cn->clk = clk;
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srcu_init_notifier_head(&cn->notifier_head);
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cn->clk = clk;
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srcu_init_notifier_head(&cn->notifier_head);
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list_add(&cn->node, &clk_notifier_list);
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}
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list_add(&cn->node, &clk_notifier_list);
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found:
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ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
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clk->core->notifier_count++;
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@ -4395,32 +4394,28 @@ EXPORT_SYMBOL_GPL(clk_notifier_register);
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*/
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int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
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{
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struct clk_notifier *cn = NULL;
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int ret = -EINVAL;
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struct clk_notifier *cn;
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int ret = -ENOENT;
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if (!clk || !nb)
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return -EINVAL;
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clk_prepare_lock();
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list_for_each_entry(cn, &clk_notifier_list, node)
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if (cn->clk == clk)
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list_for_each_entry(cn, &clk_notifier_list, node) {
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if (cn->clk == clk) {
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ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
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clk->core->notifier_count--;
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/* XXX the notifier code should handle this better */
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if (!cn->notifier_head.head) {
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srcu_cleanup_notifier_head(&cn->notifier_head);
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list_del(&cn->node);
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kfree(cn);
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}
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break;
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if (cn->clk == clk) {
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ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
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clk->core->notifier_count--;
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/* XXX the notifier code should handle this better */
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if (!cn->notifier_head.head) {
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srcu_cleanup_notifier_head(&cn->notifier_head);
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list_del(&cn->node);
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kfree(cn);
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}
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} else {
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ret = -ENOENT;
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}
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clk_prepare_unlock();
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@ -304,7 +304,7 @@ static struct clk_rcg2 cam_cc_bps_clk_src = {
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.name = "cam_cc_bps_clk_src",
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.parent_data = cam_cc_parent_data_2,
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.num_parents = 5,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -325,7 +325,7 @@ static struct clk_rcg2 cam_cc_cci_0_clk_src = {
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.name = "cam_cc_cci_0_clk_src",
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.parent_data = cam_cc_parent_data_5,
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.num_parents = 3,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -339,7 +339,7 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = {
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.name = "cam_cc_cci_1_clk_src",
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.parent_data = cam_cc_parent_data_5,
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.num_parents = 3,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -360,7 +360,7 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = {
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.name = "cam_cc_cphy_rx_clk_src",
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.parent_data = cam_cc_parent_data_3,
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.num_parents = 6,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -379,7 +379,7 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = {
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.name = "cam_cc_csi0phytimer_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -393,7 +393,7 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = {
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.name = "cam_cc_csi1phytimer_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -407,7 +407,7 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = {
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.name = "cam_cc_csi2phytimer_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -421,7 +421,7 @@ static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = {
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.name = "cam_cc_csi3phytimer_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -443,7 +443,7 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = {
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.name = "cam_cc_fast_ahb_clk_src",
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -466,7 +466,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = {
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.name = "cam_cc_icp_clk_src",
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.parent_data = cam_cc_parent_data_2,
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.num_parents = 5,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -488,7 +488,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = {
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.name = "cam_cc_ife_0_clk_src",
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.parent_data = cam_cc_parent_data_4,
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.num_parents = 4,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -510,7 +510,7 @@ static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = {
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.name = "cam_cc_ife_0_csid_clk_src",
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.parent_data = cam_cc_parent_data_3,
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.num_parents = 6,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -524,7 +524,7 @@ static struct clk_rcg2 cam_cc_ife_1_clk_src = {
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.name = "cam_cc_ife_1_clk_src",
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.parent_data = cam_cc_parent_data_4,
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.num_parents = 4,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -538,7 +538,7 @@ static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = {
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.name = "cam_cc_ife_1_csid_clk_src",
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.parent_data = cam_cc_parent_data_3,
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.num_parents = 6,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -553,7 +553,7 @@ static struct clk_rcg2 cam_cc_ife_lite_clk_src = {
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.parent_data = cam_cc_parent_data_4,
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.num_parents = 4,
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.flags = CLK_SET_RATE_PARENT,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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.name = "cam_cc_ife_lite_csid_clk_src",
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.parent_data = cam_cc_parent_data_3,
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.num_parents = 6,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -590,7 +590,7 @@ static struct clk_rcg2 cam_cc_ipe_0_clk_src = {
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.name = "cam_cc_ipe_0_clk_src",
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.parent_data = cam_cc_parent_data_2,
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.num_parents = 5,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -613,7 +613,7 @@ static struct clk_rcg2 cam_cc_jpeg_clk_src = {
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.name = "cam_cc_jpeg_clk_src",
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.parent_data = cam_cc_parent_data_2,
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.num_parents = 5,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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.name = "cam_cc_lrme_clk_src",
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.parent_data = cam_cc_parent_data_6,
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.num_parents = 5,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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.name = "cam_cc_mclk0_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -670,7 +670,7 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = {
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.name = "cam_cc_mclk1_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -684,7 +684,7 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = {
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.name = "cam_cc_mclk2_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -698,7 +698,7 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = {
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.name = "cam_cc_mclk3_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -712,7 +712,7 @@ static struct clk_rcg2 cam_cc_mclk4_clk_src = {
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.name = "cam_cc_mclk4_clk_src",
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.parent_data = cam_cc_parent_data_1,
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.num_parents = 3,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -732,7 +732,7 @@ static struct clk_rcg2 cam_cc_slow_ahb_clk_src = {
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.parent_data = cam_cc_parent_data_0,
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.num_parents = 4,
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.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_shared_ops,
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},
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};
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@ -99,7 +99,7 @@ static unsigned long socfpga_clk_recalc_rate(struct clk_hw *hwclk,
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val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
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val &= GENMASK(socfpgaclk->width - 1, 0);
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/* Check for GPIO_DB_CLK by its offset */
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if ((int) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET)
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if ((uintptr_t) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET)
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div = val + 1;
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else
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div = (1 << val);
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