arm64: dts: imx8m: drop interrupt-affinity for pmu

i.MX8M use PPI for pmu, interrupt-affinity is not needed.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Peng Fan 2021-08-07 17:45:37 +08:00 committed by Shawn Guo
parent 16ce4ce32d
commit d4efa65f30
4 changed files with 0 additions and 4 deletions

View file

@ -195,7 +195,6 @@ pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
};
timer {

View file

@ -190,7 +190,6 @@ pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
};
psci {

View file

@ -150,7 +150,6 @@ pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
};
psci {

View file

@ -193,7 +193,6 @@ pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
};
psci {