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drm/amdgpu: use common fences for VMID management v2
v2: add missing NULL check. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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8120b61fdf
commit
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4 changed files with 21 additions and 18 deletions
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@ -970,7 +970,7 @@ struct amdgpu_vm_id {
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/* last flushed PD/PT update */
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/* last flushed PD/PT update */
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struct fence *flushed_updates;
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struct fence *flushed_updates;
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/* last use of vmid */
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/* last use of vmid */
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struct amdgpu_fence *last_id_use;
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struct fence *last_id_use;
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};
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};
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struct amdgpu_vm {
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struct amdgpu_vm {
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@ -1003,7 +1003,7 @@ struct amdgpu_vm {
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};
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};
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struct amdgpu_vm_manager {
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struct amdgpu_vm_manager {
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struct amdgpu_fence *active[AMDGPU_NUM_VM];
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struct fence *active[AMDGPU_NUM_VM];
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uint32_t max_pfn;
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uint32_t max_pfn;
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/* number of VMIDs */
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/* number of VMIDs */
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unsigned nvm;
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unsigned nvm;
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@ -135,7 +135,7 @@ struct amdgpu_bo_list_entry *amdgpu_vm_get_bos(struct amdgpu_device *adev,
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int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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struct amdgpu_sync *sync)
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struct amdgpu_sync *sync)
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{
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{
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struct amdgpu_fence *best[AMDGPU_MAX_RINGS] = {};
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struct fence *best[AMDGPU_MAX_RINGS] = {};
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struct amdgpu_vm_id *vm_id = &vm->ids[ring->idx];
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struct amdgpu_vm_id *vm_id = &vm->ids[ring->idx];
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struct amdgpu_device *adev = ring->adev;
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struct amdgpu_device *adev = ring->adev;
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@ -154,7 +154,8 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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/* skip over VMID 0, since it is the system VM */
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/* skip over VMID 0, since it is the system VM */
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for (i = 1; i < adev->vm_manager.nvm; ++i) {
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for (i = 1; i < adev->vm_manager.nvm; ++i) {
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struct amdgpu_fence *fence = adev->vm_manager.active[i];
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struct fence *fence = adev->vm_manager.active[i];
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struct amdgpu_ring *fring;
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if (fence == NULL) {
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if (fence == NULL) {
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/* found a free one */
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/* found a free one */
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@ -163,21 +164,23 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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return 0;
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return 0;
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}
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}
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if (amdgpu_fence_is_earlier(fence, best[fence->ring->idx])) {
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fring = amdgpu_ring_from_fence(fence);
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best[fence->ring->idx] = fence;
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if (best[fring->idx] == NULL ||
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choices[fence->ring == ring ? 0 : 1] = i;
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fence_is_later(best[fring->idx], fence)) {
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best[fring->idx] = fence;
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choices[fring == ring ? 0 : 1] = i;
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}
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}
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}
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}
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for (i = 0; i < 2; ++i) {
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for (i = 0; i < 2; ++i) {
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if (choices[i]) {
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if (choices[i]) {
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struct amdgpu_fence *fence;
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struct fence *fence;
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fence = adev->vm_manager.active[choices[i]];
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fence = adev->vm_manager.active[choices[i]];
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vm_id->id = choices[i];
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vm_id->id = choices[i];
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trace_amdgpu_vm_grab_id(choices[i], ring->idx);
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trace_amdgpu_vm_grab_id(choices[i], ring->idx);
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return amdgpu_sync_fence(ring->adev, sync, &fence->base);
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return amdgpu_sync_fence(ring->adev, sync, fence);
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}
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}
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}
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}
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@ -246,11 +249,11 @@ void amdgpu_vm_fence(struct amdgpu_device *adev,
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unsigned ridx = fence->ring->idx;
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unsigned ridx = fence->ring->idx;
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unsigned vm_id = vm->ids[ridx].id;
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unsigned vm_id = vm->ids[ridx].id;
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amdgpu_fence_unref(&adev->vm_manager.active[vm_id]);
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fence_put(adev->vm_manager.active[vm_id]);
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adev->vm_manager.active[vm_id] = amdgpu_fence_ref(fence);
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adev->vm_manager.active[vm_id] = fence_get(&fence->base);
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amdgpu_fence_unref(&vm->ids[ridx].last_id_use);
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fence_put(vm->ids[ridx].last_id_use);
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vm->ids[ridx].last_id_use = amdgpu_fence_ref(fence);
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vm->ids[ridx].last_id_use = fence_get(&fence->base);
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}
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}
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/**
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/**
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@ -1311,7 +1314,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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fence_put(vm->ids[i].flushed_updates);
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fence_put(vm->ids[i].flushed_updates);
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amdgpu_fence_unref(&vm->ids[i].last_id_use);
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fence_put(vm->ids[i].last_id_use);
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}
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}
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mutex_destroy(&vm->mutex);
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mutex_destroy(&vm->mutex);
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@ -965,7 +965,7 @@ static int gmc_v7_0_sw_fini(void *handle)
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if (adev->vm_manager.enabled) {
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if (adev->vm_manager.enabled) {
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for (i = 0; i < AMDGPU_NUM_VM; ++i)
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for (i = 0; i < AMDGPU_NUM_VM; ++i)
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amdgpu_fence_unref(&adev->vm_manager.active[i]);
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fence_put(adev->vm_manager.active[i]);
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gmc_v7_0_vm_fini(adev);
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gmc_v7_0_vm_fini(adev);
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adev->vm_manager.enabled = false;
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adev->vm_manager.enabled = false;
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}
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}
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@ -1015,7 +1015,7 @@ static int gmc_v7_0_suspend(void *handle)
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if (adev->vm_manager.enabled) {
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if (adev->vm_manager.enabled) {
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for (i = 0; i < AMDGPU_NUM_VM; ++i)
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for (i = 0; i < AMDGPU_NUM_VM; ++i)
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amdgpu_fence_unref(&adev->vm_manager.active[i]);
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fence_put(adev->vm_manager.active[i]);
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gmc_v7_0_vm_fini(adev);
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gmc_v7_0_vm_fini(adev);
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adev->vm_manager.enabled = false;
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adev->vm_manager.enabled = false;
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}
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}
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@ -984,7 +984,7 @@ static int gmc_v8_0_sw_fini(void *handle)
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if (adev->vm_manager.enabled) {
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if (adev->vm_manager.enabled) {
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for (i = 0; i < AMDGPU_NUM_VM; ++i)
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for (i = 0; i < AMDGPU_NUM_VM; ++i)
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amdgpu_fence_unref(&adev->vm_manager.active[i]);
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fence_put(adev->vm_manager.active[i]);
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gmc_v8_0_vm_fini(adev);
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gmc_v8_0_vm_fini(adev);
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adev->vm_manager.enabled = false;
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adev->vm_manager.enabled = false;
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}
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}
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@ -1036,7 +1036,7 @@ static int gmc_v8_0_suspend(void *handle)
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if (adev->vm_manager.enabled) {
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if (adev->vm_manager.enabled) {
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for (i = 0; i < AMDGPU_NUM_VM; ++i)
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for (i = 0; i < AMDGPU_NUM_VM; ++i)
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amdgpu_fence_unref(&adev->vm_manager.active[i]);
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fence_put(adev->vm_manager.active[i]);
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gmc_v8_0_vm_fini(adev);
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gmc_v8_0_vm_fini(adev);
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adev->vm_manager.enabled = false;
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adev->vm_manager.enabled = false;
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}
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}
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