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PCI: pciehp: Reduce PCIe slot_ctrl to 16 bits
4283c70e91
("PCI: pciehp: Make pcie_wait_cmd() self-contained") added
a cache of the most recent command written to the Slot Control register.
This register is only 16 bits wide, but the cache ("slot_ctrl") is 32 bits.
Reduce slot_ctrl to a u16 so it matches the register size. No functional
change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
1302fcf0d0
commit
d537a3abb4
2 changed files with 2 additions and 2 deletions
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@ -92,7 +92,7 @@ struct controller {
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struct slot *slot;
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wait_queue_head_t queue; /* sleep & wake process */
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u32 slot_cap;
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u32 slot_ctrl;
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u16 slot_ctrl;
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struct timer_list poll_timer;
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unsigned long cmd_started; /* jiffies */
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unsigned int cmd_busy:1;
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@ -171,7 +171,7 @@ static void pcie_wait_cmd(struct controller *ctrl)
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* interrupts.
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*/
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if (!rc)
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ctrl_info(ctrl, "Timeout on hotplug command %#010x (issued %u msec ago)\n",
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ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n",
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ctrl->slot_ctrl,
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jiffies_to_msecs(now - ctrl->cmd_started));
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}
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