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pinctrl: amd: Implement irq_set_wake
This allows the OS to control which devices produce wake events. $ grep enabled /sys/kernel/irq/*/wakeup /sys/kernel/irq/24/wakeup:enabled Signed-off-by: Raul E Rangel <rrangel@chromium.org> Link: https://lore.kernel.org/r/20210429163341.1.I7631534622233689dd81410525e0dd617b9b2012@changeid Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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1 changed files with 31 additions and 1 deletions
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@ -438,6 +438,29 @@ static void amd_gpio_irq_unmask(struct irq_data *d)
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raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
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}
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static int amd_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
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{
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u32 pin_reg;
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unsigned long flags;
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
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u32 wake_mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |
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BIT(WAKE_CNTRL_OFF_S4);
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raw_spin_lock_irqsave(&gpio_dev->lock, flags);
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pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
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if (on)
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pin_reg |= wake_mask;
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else
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pin_reg &= ~wake_mask;
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writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
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raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
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return 0;
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}
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static void amd_gpio_irq_eoi(struct irq_data *d)
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{
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u32 reg;
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@ -552,9 +575,16 @@ static struct irq_chip amd_gpio_irqchip = {
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.irq_disable = amd_gpio_irq_disable,
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.irq_mask = amd_gpio_irq_mask,
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.irq_unmask = amd_gpio_irq_unmask,
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.irq_set_wake = amd_gpio_irq_set_wake,
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.irq_eoi = amd_gpio_irq_eoi,
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.irq_set_type = amd_gpio_irq_set_type,
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.flags = IRQCHIP_SKIP_SET_WAKE,
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/*
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* We need to set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND so that a wake event
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* also generates an IRQ. We need the IRQ so the irq_handler can clear
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* the wake event. Otherwise the wake event will never clear and
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* prevent the system from suspending.
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*/
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.flags = IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND,
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};
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#define PIN_IRQ_PENDING (BIT(INTERRUPT_STS_OFF) | BIT(WAKE_STS_OFF))
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