mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-29 05:44:11 +00:00
arm64: dts: marvell: reorder crypto interrupts on Armada SoCs
[ Upstream commit ec55a22149
]
Match order specified in binding documentation. It says "mem" should be
the last interrupt.
This fixes:
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:0: 'ring0' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:1: 'ring1' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:2: 'ring2' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:3: 'ring3' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:4: 'eip' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:5: 'mem' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
630ed2bb6f
commit
d6433a9cc7
2 changed files with 10 additions and 10 deletions
|
@ -431,14 +431,14 @@ xor11 {
|
|||
crypto: crypto@90000 {
|
||||
compatible = "inside-secure,safexcel-eip97ies";
|
||||
reg = <0x90000 0x20000>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "mem", "ring0", "ring1",
|
||||
"ring2", "ring3", "eip";
|
||||
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ring0", "ring1", "ring2",
|
||||
"ring3", "eip", "mem";
|
||||
clocks = <&nb_periph_clk 15>;
|
||||
};
|
||||
|
||||
|
|
|
@ -511,14 +511,14 @@ CP11X_LABEL(sdhci0): mmc@780000 {
|
|||
CP11X_LABEL(crypto): crypto@800000 {
|
||||
compatible = "inside-secure,safexcel-eip197b";
|
||||
reg = <0x800000 0x200000>;
|
||||
interrupts = <87 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<88 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts = <88 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<89 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<90 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<91 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<92 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "mem", "ring0", "ring1",
|
||||
"ring2", "ring3", "eip";
|
||||
<92 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "ring0", "ring1", "ring2", "ring3",
|
||||
"eip", "mem";
|
||||
clock-names = "core", "reg";
|
||||
clocks = <&CP11X_LABEL(clk) 1 26>,
|
||||
<&CP11X_LABEL(clk) 1 17>;
|
||||
|
|
Loading…
Reference in a new issue