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[ARM] 4721/1: S3C24XX: Ensure watchdog clock is enbaled for hard reset
If the hard reset routine is using the watchdog, then ensure that the clock for the watchdog has been enabled before we try and issue a reset. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1 changed files with 11 additions and 0 deletions
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@ -20,6 +20,9 @@
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#include <asm/plat-s3c/regs-watchdog.h>
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#include <asm/arch/regs-clock.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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void (*s3c24xx_idle)(void);
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void (*s3c24xx_reset_hook)(void);
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@ -59,6 +62,8 @@ static void arch_idle(void)
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static void
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arch_reset(char mode)
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{
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struct clk *wdtclk;
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if (mode == 's') {
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cpu_reset(0);
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}
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@ -70,6 +75,12 @@ arch_reset(char mode)
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__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
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wdtclk = clk_get(NULL, "watchdog");
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if (!IS_ERR(wdtclk)) {
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clk_enable(wdtclk);
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} else
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printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
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/* put initial values into count and data */
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__raw_writel(0x100, S3C2410_WTCNT);
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__raw_writel(0x100, S3C2410_WTDAT);
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