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A couple more patches that would be good to get into -rc1.

Browse source 
- Revert an i.MX patch that's causing video failures because division
    math goes sideways
  - Fix a clang + W=1 build isue where FIELD_PREP() is taking a 32-bit
    variable instead of the usual u64 type
  - Fix a Kconfig bug in the StarFive JH7110 clk config that selects a
    reset controller when it can't be selected
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "A couple more patches that would be good to get into -rc1:

   - Revert an i.MX patch that's causing video failures because division
     math goes sideways

   - Fix a clang + W=1 build isue where FIELD_PREP() is taking a 32-bit
     variable instead of the usual u64 type

   - Fix a Kconfig bug in the StarFive JH7110 clk config that selects a
     reset controller when it can't be selected"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: starfive: Fix RESET_STARFIVE_JH7110 can't be selected in a specified case
  clk: sp7021: Adjust width of _m in HWM_FIELD_PREP()
  Revert "clk: imx: composite-8m: Add support to determine_rate"
This commit is contained in:
Linus Torvalds 2023-05-07 10:31:45 -07:00
commit d6b8a8c49a
3 changed files with 2 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/clk/clk-sp7021.c
View file

@ -41,7 +41,7 @@ enum {
/* HIWORD_MASK FIELD_PREP */
#define HWM_FIELD_PREP(mask, value) \
({ \
u32 _m = mask; \
u64 _m = mask; \
(_m << 16) | FIELD_PREP(_m, value); \
})

7
drivers/clk/imx/clk-composite-8m.c
View file

@ -119,17 +119,10 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw,
return ret;
}
static int imx8m_clk_divider_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
return clk_divider_ops.determine_rate(hw, req);
}
static const struct clk_ops imx8m_clk_composite_divider_ops = {
.recalc_rate = imx8m_clk_composite_divider_recalc_rate,
.round_rate = imx8m_clk_composite_divider_round_rate,
.set_rate = imx8m_clk_composite_divider_set_rate,
.determine_rate = imx8m_clk_divider_determine_rate,
};
static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw)

5
drivers/clk/starfive/Kconfig
View file

@ -26,7 +26,7 @@ config CLK_STARFIVE_JH7110_SYS
depends on ARCH_STARFIVE || COMPILE_TEST
select AUXILIARY_BUS
select CLK_STARFIVE_JH71X0
select RESET_STARFIVE_JH7110
select RESET_STARFIVE_JH7110 if RESET_CONTROLLER
default ARCH_STARFIVE
help
Say yes here to support the system clock controller on the
@ -35,9 +35,6 @@ config CLK_STARFIVE_JH7110_SYS
config CLK_STARFIVE_JH7110_AON
tristate "StarFive JH7110 always-on clock support"
depends on CLK_STARFIVE_JH7110_SYS
select AUXILIARY_BUS
select CLK_STARFIVE_JH71X0
select RESET_STARFIVE_JH7110
default m if ARCH_STARFIVE
help
Say yes here to support the always-on clock controller on the