ARM: imx6q: Set enet tx reference clk from anatop to support 1588

Set GRP1 BIT21 ENET_CLK_SEL:
  Enet tx reference clk from internal clock from anatop
  (loopback through pad), this clock also sent out to external PHY

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Frank Li 2012-10-30 18:25:22 +00:00 committed by David S. Miller
parent 7629838ca3
commit d6e0d9fcbb

View file

@ -117,6 +117,17 @@ static void __init imx6q_sabrelite_init(void)
imx6q_sabrelite_cko1_setup();
}
static void __init imx6q_1588_init(void)
{
struct regmap *gpr;
gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
if (!IS_ERR(gpr))
regmap_update_bits(gpr, 0x4, 1 << 21, 1 << 21);
else
pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n");
}
static void __init imx6q_usb_init(void)
{
struct regmap *anatop;
@ -153,6 +164,7 @@ static void __init imx6q_init_machine(void)
imx6q_pm_init();
imx6q_usb_init();
imx6q_1588_init();
}
static struct cpuidle_driver imx6q_cpuidle_driver = {