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[ARM] copypage: convert assembly files to C
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Russell King
parent
487ff32082
commit
d73e60b714
10 changed files with 431 additions and 411 deletions
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@ -1,95 +0,0 @@
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/*
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* linux/arch/arm/lib/copypage-feroceon.S
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*
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* Copyright (C) 2008 Marvell Semiconductors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This handles copy_user_page and clear_user_page on Feroceon
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* more optimally than the generic implementations.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/asm-offsets.h>
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.text
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.align 5
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ENTRY(feroceon_copy_user_page)
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stmfd sp!, {r4-r9, lr}
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mov ip, #PAGE_SZ
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1: mov lr, r1
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ldmia r1!, {r2 - r9}
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pld [lr, #32]
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pld [lr, #64]
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pld [lr, #96]
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pld [lr, #128]
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pld [lr, #160]
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pld [lr, #192]
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pld [lr, #224]
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stmia r0, {r2 - r9}
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ldmia r1!, {r2 - r9}
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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stmia r0, {r2 - r9}
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ldmia r1!, {r2 - r9}
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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stmia r0, {r2 - r9}
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ldmia r1!, {r2 - r9}
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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stmia r0, {r2 - r9}
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ldmia r1!, {r2 - r9}
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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stmia r0, {r2 - r9}
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ldmia r1!, {r2 - r9}
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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stmia r0, {r2 - r9}
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ldmia r1!, {r2 - r9}
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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stmia r0, {r2 - r9}
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ldmia r1!, {r2 - r9}
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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stmia r0, {r2 - r9}
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subs ip, ip, #(32 * 8)
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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bne 1b
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mcr p15, 0, ip, c7, c10, 4 @ drain WB
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ldmfd sp!, {r4-r9, pc}
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.align 5
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ENTRY(feroceon_clear_user_page)
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stmfd sp!, {r4-r7, lr}
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mov r1, #PAGE_SZ/32
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mov r2, #0
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mov r3, #0
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mov r4, #0
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mov r5, #0
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mov r6, #0
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mov r7, #0
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mov ip, #0
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mov lr, #0
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1: stmia r0, {r2-r7, ip, lr}
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subs r1, r1, #1
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
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add r0, r0, #32
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bne 1b
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mcr p15, 0, r1, c7, c10, 4 @ drain WB
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ldmfd sp!, {r4-r7, pc}
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__INITDATA
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.type feroceon_user_fns, #object
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ENTRY(feroceon_user_fns)
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.long feroceon_clear_user_page
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.long feroceon_copy_user_page
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.size feroceon_user_fns, . - feroceon_user_fns
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100
arch/arm/mm/copypage-feroceon.c
Normal file
100
arch/arm/mm/copypage-feroceon.c
Normal file
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@ -0,0 +1,100 @@
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/*
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* linux/arch/arm/mm/copypage-feroceon.S
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*
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* Copyright (C) 2008 Marvell Semiconductors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This handles copy_user_page and clear_user_page on Feroceon
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* more optimally than the generic implementations.
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*/
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#include <linux/init.h>
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#include <asm/page.h>
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void __attribute__((naked))
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feroceon_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
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{
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asm("\
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stmfd sp!, {r4-r9, lr} \n\
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mov ip, %0 \n\
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1: mov lr, r1 \n\
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ldmia r1!, {r2 - r9} \n\
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pld [lr, #32] \n\
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pld [lr, #64] \n\
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pld [lr, #96] \n\
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pld [lr, #128] \n\
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pld [lr, #160] \n\
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pld [lr, #192] \n\
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pld [lr, #224] \n\
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stmia r0, {r2 - r9} \n\
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ldmia r1!, {r2 - r9} \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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stmia r0, {r2 - r9} \n\
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ldmia r1!, {r2 - r9} \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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stmia r0, {r2 - r9} \n\
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ldmia r1!, {r2 - r9} \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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stmia r0, {r2 - r9} \n\
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ldmia r1!, {r2 - r9} \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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stmia r0, {r2 - r9} \n\
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ldmia r1!, {r2 - r9} \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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stmia r0, {r2 - r9} \n\
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ldmia r1!, {r2 - r9} \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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stmia r0, {r2 - r9} \n\
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ldmia r1!, {r2 - r9} \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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stmia r0, {r2 - r9} \n\
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subs ip, ip, #(32 * 8) \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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bne 1b \n\
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mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\
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ldmfd sp!, {r4-r9, pc}"
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:
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: "I" (PAGE_SIZE));
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}
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void __attribute__((naked))
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feroceon_clear_user_page(void *kaddr, unsigned long vaddr)
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{
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asm("\
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stmfd sp!, {r4-r7, lr} \n\
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mov r1, %0 \n\
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mov r2, #0 \n\
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mov r3, #0 \n\
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mov r4, #0 \n\
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mov r5, #0 \n\
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mov r6, #0 \n\
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mov r7, #0 \n\
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mov ip, #0 \n\
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mov lr, #0 \n\
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1: stmia r0, {r2-r7, ip, lr} \n\
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subs r1, r1, #1 \n\
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
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add r0, r0, #32 \n\
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bne 1b \n\
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mcr p15, 0, r1, c7, c10, 4 @ drain WB\n\
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ldmfd sp!, {r4-r7, pc}"
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:
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: "I" (PAGE_SIZE / 32));
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}
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struct cpu_user_fns feroceon_user_fns __initdata = {
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.cpu_clear_user_page = feroceon_clear_user_page,
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.cpu_copy_user_page = feroceon_copy_user_page,
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};
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@ -1,67 +0,0 @@
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/*
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* linux/arch/arm/lib/copypage.S
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*
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* Copyright (C) 1995-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* ASM optimised string functions
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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#include <asm/asm-offsets.h>
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.text
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.align 5
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/*
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* ARMv3 optimised copy_user_page
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*
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* FIXME: do we need to handle cache stuff...
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*/
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ENTRY(v3_copy_user_page)
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stmfd sp!, {r4, lr} @ 2
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mov r2, #PAGE_SZ/64 @ 1
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ldmia r1!, {r3, r4, ip, lr} @ 4+1
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1: stmia r0!, {r3, r4, ip, lr} @ 4
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ldmia r1!, {r3, r4, ip, lr} @ 4+1
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stmia r0!, {r3, r4, ip, lr} @ 4
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ldmia r1!, {r3, r4, ip, lr} @ 4+1
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stmia r0!, {r3, r4, ip, lr} @ 4
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ldmia r1!, {r3, r4, ip, lr} @ 4
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subs r2, r2, #1 @ 1
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stmia r0!, {r3, r4, ip, lr} @ 4
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ldmneia r1!, {r3, r4, ip, lr} @ 4
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bne 1b @ 1
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ldmfd sp!, {r4, pc} @ 3
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.align 5
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/*
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* ARMv3 optimised clear_user_page
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*
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* FIXME: do we need to handle cache stuff...
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*/
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ENTRY(v3_clear_user_page)
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str lr, [sp, #-4]!
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mov r1, #PAGE_SZ/64 @ 1
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mov r2, #0 @ 1
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mov r3, #0 @ 1
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mov ip, #0 @ 1
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mov lr, #0 @ 1
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1: stmia r0!, {r2, r3, ip, lr} @ 4
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stmia r0!, {r2, r3, ip, lr} @ 4
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stmia r0!, {r2, r3, ip, lr} @ 4
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stmia r0!, {r2, r3, ip, lr} @ 4
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subs r1, r1, #1 @ 1
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bne 1b @ 1
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ldr pc, [sp], #4
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__INITDATA
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.type v3_user_fns, #object
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ENTRY(v3_user_fns)
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.long v3_clear_user_page
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.long v3_copy_user_page
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.size v3_user_fns, . - v3_user_fns
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69
arch/arm/mm/copypage-v3.c
Normal file
69
arch/arm/mm/copypage-v3.c
Normal file
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@ -0,0 +1,69 @@
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/*
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* linux/arch/arm/mm/copypage-v3.c
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*
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* Copyright (C) 1995-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <asm/page.h>
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/*
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* ARMv3 optimised copy_user_page
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*
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* FIXME: do we need to handle cache stuff...
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*/
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void __attribute__((naked))
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v3_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
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{
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asm("\n\
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stmfd sp!, {r4, lr} @ 2\n\
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mov r2, %2 @ 1\n\
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ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
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1: stmia %1!, {r3, r4, ip, lr} @ 4\n\
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ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
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stmia %1!, {r3, r4, ip, lr} @ 4\n\
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ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
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stmia %1!, {r3, r4, ip, lr} @ 4\n\
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ldmia %0!, {r3, r4, ip, lr} @ 4\n\
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subs r2, r2, #1 @ 1\n\
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stmia %1!, {r3, r4, ip, lr} @ 4\n\
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ldmneia %0!, {r3, r4, ip, lr} @ 4\n\
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bne 1b @ 1\n\
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ldmfd sp!, {r4, pc} @ 3"
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:
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: "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64));
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}
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/*
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* ARMv3 optimised clear_user_page
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*
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* FIXME: do we need to handle cache stuff...
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*/
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void __attribute__((naked)) v3_clear_user_page(void *kaddr, unsigned long vaddr)
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{
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asm("\n\
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str lr, [sp, #-4]!\n\
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mov r1, %1 @ 1\n\
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mov r2, #0 @ 1\n\
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mov r3, #0 @ 1\n\
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mov ip, #0 @ 1\n\
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mov lr, #0 @ 1\n\
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1: stmia %0!, {r2, r3, ip, lr} @ 4\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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subs r1, r1, #1 @ 1\n\
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bne 1b @ 1\n\
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ldr pc, [sp], #4"
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:
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: "r" (kaddr), "I" (PAGE_SIZE / 64));
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}
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struct cpu_user_fns v3_user_fns __initdata = {
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.cpu_clear_user_page = v3_clear_user_page,
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.cpu_copy_user_page = v3_copy_user_page,
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};
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@ -1,79 +0,0 @@
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/*
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* linux/arch/arm/lib/copypage.S
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*
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* Copyright (C) 1995-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
|
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* ASM optimised string functions
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/asm-offsets.h>
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.text
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.align 5
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/*
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* ARMv4 optimised copy_user_page
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*
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* We flush the destination cache lines just before we write the data into the
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* corresponding address. Since the Dcache is read-allocate, this removes the
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* Dcache aliasing issue. The writes will be forwarded to the write buffer,
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* and merged as appropriate.
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*
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* Note: We rely on all ARMv4 processors implementing the "invalidate D line"
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* instruction. If your processor does not supply this, you have to write your
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* own copy_user_page that does the right thing.
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*/
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ENTRY(v4wb_copy_user_page)
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stmfd sp!, {r4, lr} @ 2
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mov r2, #PAGE_SZ/64 @ 1
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ldmia r1!, {r3, r4, ip, lr} @ 4
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1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
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stmia r0!, {r3, r4, ip, lr} @ 4
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ldmia r1!, {r3, r4, ip, lr} @ 4+1
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stmia r0!, {r3, r4, ip, lr} @ 4
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ldmia r1!, {r3, r4, ip, lr} @ 4
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mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
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stmia r0!, {r3, r4, ip, lr} @ 4
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ldmia r1!, {r3, r4, ip, lr} @ 4
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subs r2, r2, #1 @ 1
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stmia r0!, {r3, r4, ip, lr} @ 4
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ldmneia r1!, {r3, r4, ip, lr} @ 4
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bne 1b @ 1
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mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
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ldmfd sp!, {r4, pc} @ 3
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.align 5
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/*
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* ARMv4 optimised clear_user_page
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*
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* Same story as above.
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*/
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ENTRY(v4wb_clear_user_page)
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str lr, [sp, #-4]!
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mov r1, #PAGE_SZ/64 @ 1
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mov r2, #0 @ 1
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mov r3, #0 @ 1
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mov ip, #0 @ 1
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mov lr, #0 @ 1
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1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
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stmia r0!, {r2, r3, ip, lr} @ 4
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4
|
||||
mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4
|
||||
subs r1, r1, #1 @ 1
|
||||
bne 1b @ 1
|
||||
mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
|
||||
ldr pc, [sp], #4
|
||||
|
||||
__INITDATA
|
||||
|
||||
.type v4wb_user_fns, #object
|
||||
ENTRY(v4wb_user_fns)
|
||||
.long v4wb_clear_user_page
|
||||
.long v4wb_copy_user_page
|
||||
.size v4wb_user_fns, . - v4wb_user_fns
|
||||
83
arch/arm/mm/copypage-v4wb.c
Normal file
83
arch/arm/mm/copypage-v4wb.c
Normal file
|
|
@ -0,0 +1,83 @@
|
|||
/*
|
||||
* linux/arch/arm/mm/copypage-v4wb.c
|
||||
*
|
||||
* Copyright (C) 1995-1999 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/page.h>
|
||||
|
||||
/*
|
||||
* ARMv4 optimised copy_user_page
|
||||
*
|
||||
* We flush the destination cache lines just before we write the data into the
|
||||
* corresponding address. Since the Dcache is read-allocate, this removes the
|
||||
* Dcache aliasing issue. The writes will be forwarded to the write buffer,
|
||||
* and merged as appropriate.
|
||||
*
|
||||
* Note: We rely on all ARMv4 processors implementing the "invalidate D line"
|
||||
* instruction. If your processor does not supply this, you have to write your
|
||||
* own copy_user_page that does the right thing.
|
||||
*/
|
||||
void __attribute__((naked))
|
||||
v4wb_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
|
||||
{
|
||||
asm("\
|
||||
stmfd sp!, {r4, lr} @ 2\n\
|
||||
mov r2, %0 @ 1\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
subs r2, r2, #1 @ 1\n\
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
bne 1b @ 1\n\
|
||||
mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
|
||||
ldmfd sp!, {r4, pc} @ 3"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64));
|
||||
}
|
||||
|
||||
/*
|
||||
* ARMv4 optimised clear_user_page
|
||||
*
|
||||
* Same story as above.
|
||||
*/
|
||||
void __attribute__((naked))
|
||||
v4wb_clear_user_page(void *kaddr, unsigned long vaddr)
|
||||
{
|
||||
asm("\
|
||||
str lr, [sp, #-4]!\n\
|
||||
mov r1, %0 @ 1\n\
|
||||
mov r2, #0 @ 1\n\
|
||||
mov r3, #0 @ 1\n\
|
||||
mov ip, #0 @ 1\n\
|
||||
mov lr, #0 @ 1\n\
|
||||
1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
subs r1, r1, #1 @ 1\n\
|
||||
bne 1b @ 1\n\
|
||||
mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
|
||||
ldr pc, [sp], #4"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64));
|
||||
}
|
||||
|
||||
struct cpu_user_fns v4wb_user_fns __initdata = {
|
||||
.cpu_clear_user_page = v4wb_clear_user_page,
|
||||
.cpu_copy_user_page = v4wb_copy_user_page,
|
||||
};
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/lib/copypage-v4.S
|
||||
*
|
||||
* Copyright (C) 1995-1999 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* ASM optimised string functions
|
||||
*
|
||||
* This is for CPUs with a writethrough cache and 'flush ID cache' is
|
||||
* the only supported cache operation.
|
||||
*/
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
|
||||
.text
|
||||
.align 5
|
||||
/*
|
||||
* ARMv4 optimised copy_user_page
|
||||
*
|
||||
* Since we have writethrough caches, we don't have to worry about
|
||||
* dirty data in the cache. However, we do have to ensure that
|
||||
* subsequent reads are up to date.
|
||||
*/
|
||||
ENTRY(v4wt_copy_user_page)
|
||||
stmfd sp!, {r4, lr} @ 2
|
||||
mov r2, #PAGE_SZ/64 @ 1
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4
|
||||
1: stmia r0!, {r3, r4, ip, lr} @ 4
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4+1
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4
|
||||
subs r2, r2, #1 @ 1
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4
|
||||
ldmneia r1!, {r3, r4, ip, lr} @ 4
|
||||
bne 1b @ 1
|
||||
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache
|
||||
ldmfd sp!, {r4, pc} @ 3
|
||||
|
||||
.align 5
|
||||
/*
|
||||
* ARMv4 optimised clear_user_page
|
||||
*
|
||||
* Same story as above.
|
||||
*/
|
||||
ENTRY(v4wt_clear_user_page)
|
||||
str lr, [sp, #-4]!
|
||||
mov r1, #PAGE_SZ/64 @ 1
|
||||
mov r2, #0 @ 1
|
||||
mov r3, #0 @ 1
|
||||
mov ip, #0 @ 1
|
||||
mov lr, #0 @ 1
|
||||
1: stmia r0!, {r2, r3, ip, lr} @ 4
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4
|
||||
subs r1, r1, #1 @ 1
|
||||
bne 1b @ 1
|
||||
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache
|
||||
ldr pc, [sp], #4
|
||||
|
||||
__INITDATA
|
||||
|
||||
.type v4wt_user_fns, #object
|
||||
ENTRY(v4wt_user_fns)
|
||||
.long v4wt_clear_user_page
|
||||
.long v4wt_copy_user_page
|
||||
.size v4wt_user_fns, . - v4wt_user_fns
|
||||
77
arch/arm/mm/copypage-v4wt.c
Normal file
77
arch/arm/mm/copypage-v4wt.c
Normal file
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
* linux/arch/arm/mm/copypage-v4wt.S
|
||||
*
|
||||
* Copyright (C) 1995-1999 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This is for CPUs with a writethrough cache and 'flush ID cache' is
|
||||
* the only supported cache operation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/page.h>
|
||||
|
||||
/*
|
||||
* ARMv4 optimised copy_user_page
|
||||
*
|
||||
* Since we have writethrough caches, we don't have to worry about
|
||||
* dirty data in the cache. However, we do have to ensure that
|
||||
* subsequent reads are up to date.
|
||||
*/
|
||||
void __attribute__((naked))
|
||||
v4wt_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
|
||||
{
|
||||
asm("\
|
||||
stmfd sp!, {r4, lr} @ 2\n\
|
||||
mov r2, %0 @ 1\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
1: stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
subs r2, r2, #1 @ 1\n\
|
||||
stmia r0!, {r3, r4, ip, lr} @ 4\n\
|
||||
ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
|
||||
bne 1b @ 1\n\
|
||||
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
|
||||
ldmfd sp!, {r4, pc} @ 3"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64));
|
||||
}
|
||||
|
||||
/*
|
||||
* ARMv4 optimised clear_user_page
|
||||
*
|
||||
* Same story as above.
|
||||
*/
|
||||
void __attribute__((naked))
|
||||
v4wt_clear_user_page(void *kaddr, unsigned long vaddr)
|
||||
{
|
||||
asm("\
|
||||
str lr, [sp, #-4]!\n\
|
||||
mov r1, %0 @ 1\n\
|
||||
mov r2, #0 @ 1\n\
|
||||
mov r3, #0 @ 1\n\
|
||||
mov ip, #0 @ 1\n\
|
||||
mov lr, #0 @ 1\n\
|
||||
1: stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
stmia r0!, {r2, r3, ip, lr} @ 4\n\
|
||||
subs r1, r1, #1 @ 1\n\
|
||||
bne 1b @ 1\n\
|
||||
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
|
||||
ldr pc, [sp], #4"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64));
|
||||
}
|
||||
|
||||
struct cpu_user_fns v4wt_user_fns __initdata = {
|
||||
.cpu_clear_user_page = v4wt_clear_user_page,
|
||||
.cpu_copy_user_page = v4wt_copy_user_page,
|
||||
};
|
||||
|
|
@ -1,97 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/lib/copypage-xsc3.S
|
||||
*
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Adapted for 3rd gen XScale core, no more mini-dcache
|
||||
* Author: Matt Gilbert (matthew.m.gilbert@intel.com)
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
|
||||
/*
|
||||
* General note:
|
||||
* We don't really want write-allocate cache behaviour for these functions
|
||||
* since that will just eat through 8K of the cache.
|
||||
*/
|
||||
|
||||
.text
|
||||
.align 5
|
||||
/*
|
||||
* XSC3 optimised copy_user_page
|
||||
* r0 = destination
|
||||
* r1 = source
|
||||
* r2 = virtual user address of ultimate destination page
|
||||
*
|
||||
* The source page may have some clean entries in the cache already, but we
|
||||
* can safely ignore them - break_cow() will flush them out of the cache
|
||||
* if we eventually end up using our copied page.
|
||||
*
|
||||
*/
|
||||
ENTRY(xsc3_mc_copy_user_page)
|
||||
stmfd sp!, {r4, r5, lr}
|
||||
mov lr, #PAGE_SZ/64-1
|
||||
|
||||
pld [r1, #0]
|
||||
pld [r1, #32]
|
||||
1: pld [r1, #64]
|
||||
pld [r1, #96]
|
||||
|
||||
2: ldrd r2, [r1], #8
|
||||
mov ip, r0
|
||||
ldrd r4, [r1], #8
|
||||
mcr p15, 0, ip, c7, c6, 1 @ invalidate
|
||||
strd r2, [r0], #8
|
||||
ldrd r2, [r1], #8
|
||||
strd r4, [r0], #8
|
||||
ldrd r4, [r1], #8
|
||||
strd r2, [r0], #8
|
||||
strd r4, [r0], #8
|
||||
ldrd r2, [r1], #8
|
||||
mov ip, r0
|
||||
ldrd r4, [r1], #8
|
||||
mcr p15, 0, ip, c7, c6, 1 @ invalidate
|
||||
strd r2, [r0], #8
|
||||
ldrd r2, [r1], #8
|
||||
subs lr, lr, #1
|
||||
strd r4, [r0], #8
|
||||
ldrd r4, [r1], #8
|
||||
strd r2, [r0], #8
|
||||
strd r4, [r0], #8
|
||||
bgt 1b
|
||||
beq 2b
|
||||
|
||||
ldmfd sp!, {r4, r5, pc}
|
||||
|
||||
.align 5
|
||||
/*
|
||||
* XScale optimised clear_user_page
|
||||
* r0 = destination
|
||||
* r1 = virtual user address of ultimate destination page
|
||||
*/
|
||||
ENTRY(xsc3_mc_clear_user_page)
|
||||
mov r1, #PAGE_SZ/32
|
||||
mov r2, #0
|
||||
mov r3, #0
|
||||
1: mcr p15, 0, r0, c7, c6, 1 @ invalidate line
|
||||
strd r2, [r0], #8
|
||||
strd r2, [r0], #8
|
||||
strd r2, [r0], #8
|
||||
strd r2, [r0], #8
|
||||
subs r1, r1, #1
|
||||
bne 1b
|
||||
mov pc, lr
|
||||
|
||||
__INITDATA
|
||||
|
||||
.type xsc3_mc_user_fns, #object
|
||||
ENTRY(xsc3_mc_user_fns)
|
||||
.long xsc3_mc_clear_user_page
|
||||
.long xsc3_mc_copy_user_page
|
||||
.size xsc3_mc_user_fns, . - xsc3_mc_user_fns
|
||||
102
arch/arm/mm/copypage-xsc3.c
Normal file
102
arch/arm/mm/copypage-xsc3.c
Normal file
|
|
@ -0,0 +1,102 @@
|
|||
/*
|
||||
* linux/arch/arm/mm/copypage-xsc3.S
|
||||
*
|
||||
* Copyright (C) 2004 Intel Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Adapted for 3rd gen XScale core, no more mini-dcache
|
||||
* Author: Matt Gilbert (matthew.m.gilbert@intel.com)
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/page.h>
|
||||
|
||||
/*
|
||||
* General note:
|
||||
* We don't really want write-allocate cache behaviour for these functions
|
||||
* since that will just eat through 8K of the cache.
|
||||
*/
|
||||
|
||||
/*
|
||||
* XSC3 optimised copy_user_page
|
||||
* r0 = destination
|
||||
* r1 = source
|
||||
* r2 = virtual user address of ultimate destination page
|
||||
*
|
||||
* The source page may have some clean entries in the cache already, but we
|
||||
* can safely ignore them - break_cow() will flush them out of the cache
|
||||
* if we eventually end up using our copied page.
|
||||
*
|
||||
*/
|
||||
void __attribute__((naked))
|
||||
xsc3_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
|
||||
{
|
||||
asm("\
|
||||
stmfd sp!, {r4, r5, lr} \n\
|
||||
mov lr, %0 \n\
|
||||
\n\
|
||||
pld [r1, #0] \n\
|
||||
pld [r1, #32] \n\
|
||||
1: pld [r1, #64] \n\
|
||||
pld [r1, #96] \n\
|
||||
\n\
|
||||
2: ldrd r2, [r1], #8 \n\
|
||||
mov ip, r0 \n\
|
||||
ldrd r4, [r1], #8 \n\
|
||||
mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\
|
||||
strd r2, [r0], #8 \n\
|
||||
ldrd r2, [r1], #8 \n\
|
||||
strd r4, [r0], #8 \n\
|
||||
ldrd r4, [r1], #8 \n\
|
||||
strd r2, [r0], #8 \n\
|
||||
strd r4, [r0], #8 \n\
|
||||
ldrd r2, [r1], #8 \n\
|
||||
mov ip, r0 \n\
|
||||
ldrd r4, [r1], #8 \n\
|
||||
mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\
|
||||
strd r2, [r0], #8 \n\
|
||||
ldrd r2, [r1], #8 \n\
|
||||
subs lr, lr, #1 \n\
|
||||
strd r4, [r0], #8 \n\
|
||||
ldrd r4, [r1], #8 \n\
|
||||
strd r2, [r0], #8 \n\
|
||||
strd r4, [r0], #8 \n\
|
||||
bgt 1b \n\
|
||||
beq 2b \n\
|
||||
\n\
|
||||
ldmfd sp!, {r4, r5, pc}"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 64 - 1));
|
||||
}
|
||||
|
||||
/*
|
||||
* XScale optimised clear_user_page
|
||||
* r0 = destination
|
||||
* r1 = virtual user address of ultimate destination page
|
||||
*/
|
||||
void __attribute__((naked))
|
||||
xsc3_mc_clear_user_page(void *kaddr, unsigned long vaddr)
|
||||
{
|
||||
asm("\
|
||||
mov r1, %0 \n\
|
||||
mov r2, #0 \n\
|
||||
mov r3, #0 \n\
|
||||
1: mcr p15, 0, r0, c7, c6, 1 @ invalidate line\n\
|
||||
strd r2, [r0], #8 \n\
|
||||
strd r2, [r0], #8 \n\
|
||||
strd r2, [r0], #8 \n\
|
||||
strd r2, [r0], #8 \n\
|
||||
subs r1, r1, #1 \n\
|
||||
bne 1b \n\
|
||||
mov pc, lr"
|
||||
:
|
||||
: "I" (PAGE_SIZE / 32));
|
||||
}
|
||||
|
||||
struct cpu_user_fns xsc3_mc_user_fns __initdata = {
|
||||
.cpu_clear_user_page = xsc3_mc_clear_user_page,
|
||||
.cpu_copy_user_page = xsc3_mc_copy_user_page,
|
||||
};
|
||||
Loading…
Reference in a new issue