amdgpu/pm: set pp_dpm_dcefclk to readonly on NAVI10 and newer gpus

v2 : change condition to apply to all chips after NAVI10

Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch prevents user from successfully writing to file pp_dpm_dcefclk on parts
NAVI10 and newer, and gives better user feedback that this operation is not allowed.

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Darren Powell 2021-04-07 18:40:34 -04:00 committed by Alex Deucher
parent b117b3964f
commit d7b4a6077e
1 changed files with 8 additions and 0 deletions

View File

@ -1891,6 +1891,14 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
}
}
if (DEVICE_ATTR_IS(pp_dpm_dcefclk)) {
/* SMU MP1 does not support dcefclk level setting */
if (asic_type >= CHIP_NAVI10) {
dev_attr->attr.mode &= ~S_IWUGO;
dev_attr->store = NULL;
}
}
#undef DEVICE_ATTR_IS
return 0;