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Staging: octeon: quoted string split across lines in ethernet-spi.c
Fix checkpatch.pl issues with quoted string split across lines in ethernet-spi.c Signed-off-by: Ebru Akagunduz <ebru.akagunduz@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
d83ce2ddb7
commit
d7c9fde4d4
1 changed files with 30 additions and 62 deletions
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@ -64,31 +64,23 @@ static irqreturn_t cvm_oct_spi_rml_interrupt(int cpl, void *dev_id)
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if (spx_int_reg.s.spf)
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pr_err("SPI1: SRX Spi4 interface down\n");
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if (spx_int_reg.s.calerr)
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pr_err("SPI1: SRX Spi4 Calendar table "
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"parity error\n");
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pr_err("SPI1: SRX Spi4 Calendar table parity error\n");
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if (spx_int_reg.s.syncerr)
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pr_err("SPI1: SRX Consecutive Spi4 DIP4 "
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"errors have exceeded "
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"SPX_ERR_CTL[ERRCNT]\n");
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pr_err("SPI1: SRX Consecutive Spi4 DIP4 errors have exceeded SPX_ERR_CTL[ERRCNT]\n");
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if (spx_int_reg.s.diperr)
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pr_err("SPI1: SRX Spi4 DIP4 error\n");
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if (spx_int_reg.s.tpaovr)
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pr_err("SPI1: SRX Selected port has hit "
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"TPA overflow\n");
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pr_err("SPI1: SRX Selected port has hit TPA overflow\n");
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if (spx_int_reg.s.rsverr)
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pr_err("SPI1: SRX Spi4 reserved control "
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"word detected\n");
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pr_err("SPI1: SRX Spi4 reserved control word detected\n");
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if (spx_int_reg.s.drwnng)
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pr_err("SPI1: SRX Spi4 receive FIFO "
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"drowning/overflow\n");
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pr_err("SPI1: SRX Spi4 receive FIFO drowning/overflow\n");
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if (spx_int_reg.s.clserr)
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pr_err("SPI1: SRX Spi4 packet closed on "
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"non-16B alignment without EOP\n");
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pr_err("SPI1: SRX Spi4 packet closed on non-16B alignment without EOP\n");
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if (spx_int_reg.s.spiovr)
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pr_err("SPI1: SRX Spi4 async FIFO overflow\n");
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if (spx_int_reg.s.abnorm)
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pr_err("SPI1: SRX Abnormal packet "
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"termination (ERR bit)\n");
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pr_err("SPI1: SRX Abnormal packet termination (ERR bit)\n");
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if (spx_int_reg.s.prtnxa)
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pr_err("SPI1: SRX Port out of range\n");
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}
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@ -99,31 +91,23 @@ static irqreturn_t cvm_oct_spi_rml_interrupt(int cpl, void *dev_id)
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stx_int_reg.u64 &= cvmx_read_csr(CVMX_STXX_INT_MSK(1));
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if (stx_int_reg.s.syncerr)
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pr_err("SPI1: STX Interface encountered a "
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"fatal error\n");
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pr_err("SPI1: STX Interface encountered a fatal error\n");
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if (stx_int_reg.s.frmerr)
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pr_err("SPI1: STX FRMCNT has exceeded "
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"STX_DIP_CNT[MAXFRM]\n");
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pr_err("SPI1: STX FRMCNT has exceeded STX_DIP_CNT[MAXFRM]\n");
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if (stx_int_reg.s.unxfrm)
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pr_err("SPI1: STX Unexpected framing "
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"sequence\n");
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pr_err("SPI1: STX Unexpected framing sequence\n");
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if (stx_int_reg.s.nosync)
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pr_err("SPI1: STX ERRCNT has exceeded "
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"STX_DIP_CNT[MAXDIP]\n");
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pr_err("SPI1: STX ERRCNT has exceeded STX_DIP_CNT[MAXDIP]\n");
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if (stx_int_reg.s.diperr)
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pr_err("SPI1: STX DIP2 error on the Spi4 "
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"Status channel\n");
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pr_err("SPI1: STX DIP2 error on the Spi4 Status channel\n");
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if (stx_int_reg.s.datovr)
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pr_err("SPI1: STX Spi4 FIFO overflow error\n");
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if (stx_int_reg.s.ovrbst)
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pr_err("SPI1: STX Transmit packet burst "
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"too big\n");
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pr_err("SPI1: STX Transmit packet burst too big\n");
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if (stx_int_reg.s.calpar1)
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pr_err("SPI1: STX Calendar Table Parity "
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"Error Bank1\n");
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pr_err("SPI1: STX Calendar Table Parity Error Bank1\n");
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if (stx_int_reg.s.calpar0)
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pr_err("SPI1: STX Calendar Table Parity "
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"Error Bank0\n");
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pr_err("SPI1: STX Calendar Table Parity Error Bank0\n");
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}
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cvmx_write_csr(CVMX_SPXX_INT_MSK(1), 0);
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@ -144,31 +128,23 @@ static irqreturn_t cvm_oct_spi_rml_interrupt(int cpl, void *dev_id)
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if (spx_int_reg.s.spf)
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pr_err("SPI0: SRX Spi4 interface down\n");
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if (spx_int_reg.s.calerr)
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pr_err("SPI0: SRX Spi4 Calendar table "
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"parity error\n");
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pr_err("SPI0: SRX Spi4 Calendar table parity error\n");
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if (spx_int_reg.s.syncerr)
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pr_err("SPI0: SRX Consecutive Spi4 DIP4 "
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"errors have exceeded "
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"SPX_ERR_CTL[ERRCNT]\n");
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pr_err("SPI0: SRX Consecutive Spi4 DIP4 errors have exceeded SPX_ERR_CTL[ERRCNT]\n");
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if (spx_int_reg.s.diperr)
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pr_err("SPI0: SRX Spi4 DIP4 error\n");
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if (spx_int_reg.s.tpaovr)
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pr_err("SPI0: SRX Selected port has hit "
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"TPA overflow\n");
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pr_err("SPI0: SRX Selected port has hit TPA overflow\n");
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if (spx_int_reg.s.rsverr)
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pr_err("SPI0: SRX Spi4 reserved control "
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"word detected\n");
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pr_err("SPI0: SRX Spi4 reserved control word detected\n");
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if (spx_int_reg.s.drwnng)
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pr_err("SPI0: SRX Spi4 receive FIFO "
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"drowning/overflow\n");
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pr_err("SPI0: SRX Spi4 receive FIFO drowning/overflow\n");
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if (spx_int_reg.s.clserr)
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pr_err("SPI0: SRX Spi4 packet closed on "
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"non-16B alignment without EOP\n");
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pr_err("SPI0: SRX Spi4 packet closed on non-16B alignment without EOP\n");
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if (spx_int_reg.s.spiovr)
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pr_err("SPI0: SRX Spi4 async FIFO overflow\n");
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if (spx_int_reg.s.abnorm)
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pr_err("SPI0: SRX Abnormal packet "
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"termination (ERR bit)\n");
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pr_err("SPI0: SRX Abnormal packet termination (ERR bit)\n");
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if (spx_int_reg.s.prtnxa)
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pr_err("SPI0: SRX Port out of range\n");
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}
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@ -179,31 +155,23 @@ static irqreturn_t cvm_oct_spi_rml_interrupt(int cpl, void *dev_id)
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stx_int_reg.u64 &= cvmx_read_csr(CVMX_STXX_INT_MSK(0));
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if (stx_int_reg.s.syncerr)
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pr_err("SPI0: STX Interface encountered a "
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"fatal error\n");
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pr_err("SPI0: STX Interface encountered a fatal error\n");
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if (stx_int_reg.s.frmerr)
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pr_err("SPI0: STX FRMCNT has exceeded "
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"STX_DIP_CNT[MAXFRM]\n");
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pr_err("SPI0: STX FRMCNT has exceeded STX_DIP_CNT[MAXFRM]\n");
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if (stx_int_reg.s.unxfrm)
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pr_err("SPI0: STX Unexpected framing "
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"sequence\n");
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pr_err("SPI0: STX Unexpected framing sequence\n");
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if (stx_int_reg.s.nosync)
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pr_err("SPI0: STX ERRCNT has exceeded "
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"STX_DIP_CNT[MAXDIP]\n");
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pr_err("SPI0: STX ERRCNT has exceeded STX_DIP_CNT[MAXDIP]\n");
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if (stx_int_reg.s.diperr)
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pr_err("SPI0: STX DIP2 error on the Spi4 "
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"Status channel\n");
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pr_err("SPI0: STX DIP2 error on the Spi4 Status channel\n");
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if (stx_int_reg.s.datovr)
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pr_err("SPI0: STX Spi4 FIFO overflow error\n");
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if (stx_int_reg.s.ovrbst)
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pr_err("SPI0: STX Transmit packet burst "
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"too big\n");
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pr_err("SPI0: STX Transmit packet burst too big\n");
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if (stx_int_reg.s.calpar1)
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pr_err("SPI0: STX Calendar Table Parity "
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"Error Bank1\n");
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pr_err("SPI0: STX Calendar Table Parity Error Bank1\n");
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if (stx_int_reg.s.calpar0)
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pr_err("SPI0: STX Calendar Table Parity "
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"Error Bank0\n");
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pr_err("SPI0: STX Calendar Table Parity Error Bank0\n");
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}
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cvmx_write_csr(CVMX_SPXX_INT_MSK(0), 0);
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