media: nxp: imx8-isi-debug: Add missing 36-Bit DMA registers to debugfs output

The extended address registers are missing in the debug output register
list. These are only available on 36-Bit DMA platforms. Due to the
prolonged name, the output width has to be adjusted as well.

Link: https://lore.kernel.org/r/20231207110918.1338524-1-alexander.stein@ew.tq-group.com

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Alexander Stein 2023-12-07 12:09:18 +01:00 committed by Mauro Carvalho Chehab
parent fb387fcb5c
commit d80d227eb0
1 changed files with 24 additions and 3 deletions

View File

@ -22,10 +22,11 @@ static inline u32 mxc_isi_read(struct mxc_isi_pipe *pipe, u32 reg)
static int mxc_isi_debug_dump_regs_show(struct seq_file *m, void *p)
{
#define MXC_ISI_DEBUG_REG(name) { name, #name }
static const struct {
struct debug_regs {
u32 offset;
const char * const name;
} registers[] = {
};
static const struct debug_regs registers[] = {
MXC_ISI_DEBUG_REG(CHNL_CTRL),
MXC_ISI_DEBUG_REG(CHNL_IMG_CTRL),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF_CTRL),
@ -67,6 +68,16 @@ static int mxc_isi_debug_dump_regs_show(struct seq_file *m, void *p)
MXC_ISI_DEBUG_REG(CHNL_SCL_IMG_CFG),
MXC_ISI_DEBUG_REG(CHNL_FLOW_CTRL),
};
/* These registers contain the upper 4 bits of 36-bit DMA addresses. */
static const struct debug_regs registers_36bit_dma[] = {
MXC_ISI_DEBUG_REG(CHNL_Y_BUF1_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_U_BUF1_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_V_BUF1_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_Y_BUF2_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_U_BUF2_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_V_BUF2_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_IN_BUF_XTND_ADDR),
};
struct mxc_isi_pipe *pipe = m->private;
unsigned int i;
@ -77,10 +88,20 @@ static int mxc_isi_debug_dump_regs_show(struct seq_file *m, void *p)
seq_printf(m, "--- ISI pipe %u registers ---\n", pipe->id);
for (i = 0; i < ARRAY_SIZE(registers); ++i)
seq_printf(m, "%20s[0x%02x]: 0x%08x\n",
seq_printf(m, "%21s[0x%02x]: 0x%08x\n",
registers[i].name, registers[i].offset,
mxc_isi_read(pipe, registers[i].offset));
if (pipe->isi->pdata->has_36bit_dma) {
for (i = 0; i < ARRAY_SIZE(registers_36bit_dma); ++i) {
const struct debug_regs *reg = &registers_36bit_dma[i];
seq_printf(m, "%21s[0x%02x]: 0x%08x\n",
reg->name, reg->offset,
mxc_isi_read(pipe, reg->offset));
}
}
pm_runtime_put(pipe->isi->dev);
return 0;