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arm64: allwinner: h5: fix pinctrl IRQs

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The pin controller of H5 has three IRQs at the chip's GIC, which
represents three banks of pinctrl IRQs. However, the device tree used to
miss the third IRQ of the pin controller, which makes the PG bank IRQ
not usable.

Add the missing IRQ to the pinctrl node.

Fixes: 4e36de179f ("arm64: allwinner: h5: add Allwinner H5 .dtsi")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Icenowy Zheng 2017-08-11 22:27:35 +08:00 committed by Chen-Yu Tsai
parent 56a9155074
commit d86e63e1f0
1 changed files with 3 additions and 0 deletions
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3
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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@ -120,5 +120,8 @@ &mmc2 {
};
&pio {
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
compatible = "allwinner,sun50i-h5-pinctrl";
};