mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-24 17:59:32 +00:00
Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: omapfb: Blizzard: constify register address tables omapfb: Blizzard: fix pointer to be const omapfb: Condition mutex acquisition omap: iovmm: Add missing mutex_unlock omap: iovmm: Fix incorrect spelling omap: SRAM: flush the right address after memcpy in omap_sram_push omap: Lock DPLL5 at boot omap: Fix incorrect 730 vs 850 detection OMAP3: PM: introduce a new powerdomain walk helper OMAP3: PM: Enable GPIO module-level wakeups OMAP3: PM: USBHOST: clear wakeup events on both hosts OMAP3: PM: PRCM interrupt: only handle selected PRCM interrupts OMAP3: PM: PRCM interrupt: check MPUGRPSEL register OMAP3: PM: Prevent hang in prcm_interrupt_handler
This commit is contained in:
commit
d8e7b2b3ac
10 changed files with 214 additions and 138 deletions
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@ -338,6 +338,13 @@ static struct omap_clk omap34xx_clks[] = {
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*/
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#define SDRC_MPURATE_LOOPS 96
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/*
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* DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks
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* that are sourced by DPLL5, and both of these require this clock
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* to be at 120 MHz for proper operation.
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*/
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#define DPLL5_FREQ_FOR_USBHOST 120000000
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/**
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* omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI
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* @clk: struct clk * being enabled
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@ -1056,6 +1063,28 @@ void omap2_clk_prepare_for_reboot(void)
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#endif
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}
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static void omap3_clk_lock_dpll5(void)
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{
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struct clk *dpll5_clk;
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struct clk *dpll5_m2_clk;
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dpll5_clk = clk_get(NULL, "dpll5_ck");
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clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
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clk_enable(dpll5_clk);
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/* Enable autoidle to allow it to enter low power bypass */
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omap3_dpll_allow_idle(dpll5_clk);
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/* Program dpll5_m2_clk divider for no division */
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dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck");
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clk_enable(dpll5_m2_clk);
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clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
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clk_disable(dpll5_m2_clk);
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clk_disable(dpll5_clk);
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return;
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}
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/* REVISIT: Move this init stuff out into clock.c */
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/*
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@ -1148,6 +1177,12 @@ int __init omap2_clk_init(void)
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*/
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clk_enable_init_clocks();
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/*
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* Lock DPLL5 and put it in autoidle.
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*/
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if (omap_rev() >= OMAP3430_REV_ES2_0)
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omap3_clk_lock_dpll5();
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/* Avoid sleeping during omap2_clk_prepare_for_reboot() */
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/* REVISIT: not yet ready for 343x */
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#if 0
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@ -551,7 +551,7 @@ static int __init pm_dbg_init(void)
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(void) debugfs_create_file("time", S_IRUGO,
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d, (void *)DEBUG_FILE_TIMERS, &debug_fops);
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pwrdm_for_each(pwrdms_setup, (void *)d);
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pwrdm_for_each_nolock(pwrdms_setup, (void *)d);
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pm_dbg_dir = debugfs_create_dir("registers", d);
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if (IS_ERR(pm_dbg_dir))
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@ -51,97 +51,112 @@ static void (*_omap_sram_idle)(u32 *addr, int save_state);
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static struct powerdomain *mpu_pwrdm;
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/* PRCM Interrupt Handler for wakeups */
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/*
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* PRCM Interrupt Handler Helper Function
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*
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* The purpose of this function is to clear any wake-up events latched
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* in the PRCM PM_WKST_x registers. It is possible that a wake-up event
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* may occur whilst attempting to clear a PM_WKST_x register and thus
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* set another bit in this register. A while loop is used to ensure
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* that any peripheral wake-up events occurring while attempting to
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* clear the PM_WKST_x are detected and cleared.
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*/
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static int prcm_clear_mod_irqs(s16 module, u8 regs)
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{
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u32 wkst, fclk, iclk, clken;
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u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1;
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u16 fclk_off = (regs == 3) ? OMAP3430ES2_CM_FCLKEN3 : CM_FCLKEN1;
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u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1;
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u16 grpsel_off = (regs == 3) ?
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OMAP3430ES2_PM_MPUGRPSEL3 : OMAP3430_PM_MPUGRPSEL;
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int c = 0;
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wkst = prm_read_mod_reg(module, wkst_off);
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wkst &= prm_read_mod_reg(module, grpsel_off);
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if (wkst) {
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iclk = cm_read_mod_reg(module, iclk_off);
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fclk = cm_read_mod_reg(module, fclk_off);
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while (wkst) {
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clken = wkst;
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cm_set_mod_reg_bits(clken, module, iclk_off);
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/*
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* For USBHOST, we don't know whether HOST1 or
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* HOST2 woke us up, so enable both f-clocks
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*/
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if (module == OMAP3430ES2_USBHOST_MOD)
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clken |= 1 << OMAP3430ES2_EN_USBHOST2_SHIFT;
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cm_set_mod_reg_bits(clken, module, fclk_off);
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prm_write_mod_reg(wkst, module, wkst_off);
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wkst = prm_read_mod_reg(module, wkst_off);
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c++;
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}
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cm_write_mod_reg(iclk, module, iclk_off);
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cm_write_mod_reg(fclk, module, fclk_off);
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}
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return c;
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}
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static int _prcm_int_handle_wakeup(void)
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{
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int c;
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c = prcm_clear_mod_irqs(WKUP_MOD, 1);
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c += prcm_clear_mod_irqs(CORE_MOD, 1);
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c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1);
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if (omap_rev() > OMAP3430_REV_ES1_0) {
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c += prcm_clear_mod_irqs(CORE_MOD, 3);
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c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1);
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}
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return c;
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}
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/*
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* PRCM Interrupt Handler
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*
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* The PRM_IRQSTATUS_MPU register indicates if there are any pending
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* interrupts from the PRCM for the MPU. These bits must be cleared in
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* order to clear the PRCM interrupt. The PRCM interrupt handler is
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* implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
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* the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
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* register indicates that a wake-up event is pending for the MPU and
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* this bit can only be cleared if the all the wake-up events latched
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* in the various PM_WKST_x registers have been cleared. The interrupt
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* handler is implemented using a do-while loop so that if a wake-up
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* event occurred during the processing of the prcm interrupt handler
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* (setting a bit in the corresponding PM_WKST_x register and thus
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* preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
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* this would be handled.
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*/
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static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
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{
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u32 wkst, irqstatus_mpu;
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u32 fclk, iclk;
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/* WKUP */
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wkst = prm_read_mod_reg(WKUP_MOD, PM_WKST);
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if (wkst) {
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iclk = cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
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fclk = cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
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cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_ICLKEN);
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cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_FCLKEN);
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prm_write_mod_reg(wkst, WKUP_MOD, PM_WKST);
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while (prm_read_mod_reg(WKUP_MOD, PM_WKST))
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cpu_relax();
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cm_write_mod_reg(iclk, WKUP_MOD, CM_ICLKEN);
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cm_write_mod_reg(fclk, WKUP_MOD, CM_FCLKEN);
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}
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/* CORE */
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wkst = prm_read_mod_reg(CORE_MOD, PM_WKST1);
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if (wkst) {
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iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
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fclk = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
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cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN1);
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cm_set_mod_reg_bits(wkst, CORE_MOD, CM_FCLKEN1);
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prm_write_mod_reg(wkst, CORE_MOD, PM_WKST1);
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while (prm_read_mod_reg(CORE_MOD, PM_WKST1))
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cpu_relax();
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cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN1);
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cm_write_mod_reg(fclk, CORE_MOD, CM_FCLKEN1);
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}
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wkst = prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3);
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if (wkst) {
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iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
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fclk = cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
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cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN3);
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cm_set_mod_reg_bits(wkst, CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
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prm_write_mod_reg(wkst, CORE_MOD, OMAP3430ES2_PM_WKST3);
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while (prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3))
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cpu_relax();
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cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN3);
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cm_write_mod_reg(fclk, CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
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}
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/* PER */
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wkst = prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST);
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if (wkst) {
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iclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
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fclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
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cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_ICLKEN);
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cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_FCLKEN);
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prm_write_mod_reg(wkst, OMAP3430_PER_MOD, PM_WKST);
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while (prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST))
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cpu_relax();
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cm_write_mod_reg(iclk, OMAP3430_PER_MOD, CM_ICLKEN);
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cm_write_mod_reg(fclk, OMAP3430_PER_MOD, CM_FCLKEN);
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}
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if (omap_rev() > OMAP3430_REV_ES1_0) {
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/* USBHOST */
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wkst = prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKST);
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if (wkst) {
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iclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
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CM_ICLKEN);
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fclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
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CM_FCLKEN);
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cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD,
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CM_ICLKEN);
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cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD,
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CM_FCLKEN);
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prm_write_mod_reg(wkst, OMAP3430ES2_USBHOST_MOD,
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PM_WKST);
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while (prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
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PM_WKST))
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cpu_relax();
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cm_write_mod_reg(iclk, OMAP3430ES2_USBHOST_MOD,
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CM_ICLKEN);
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cm_write_mod_reg(fclk, OMAP3430ES2_USBHOST_MOD,
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CM_FCLKEN);
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}
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}
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u32 irqstatus_mpu;
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int c = 0;
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do {
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irqstatus_mpu = prm_read_mod_reg(OCP_MOD,
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OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
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if (irqstatus_mpu & (OMAP3430_WKUP_ST | OMAP3430_IO_ST)) {
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c = _prcm_int_handle_wakeup();
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/*
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* Is the MPU PRCM interrupt handler racing with the
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* IVA2 PRCM interrupt handler ?
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*/
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WARN(c == 0, "prcm: WARNING: PRCM indicated MPU wakeup "
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"but no wakeup sources are marked\n");
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} else {
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/* XXX we need to expand our PRCM interrupt handler */
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WARN(1, "prcm: WARNING: PRCM interrupt received, but "
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"no code to handle it (%08x)\n", irqstatus_mpu);
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}
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prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
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OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
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while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET))
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cpu_relax();
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} while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET));
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return IRQ_HANDLED;
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}
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|
@ -624,6 +639,16 @@ static void __init prcm_setup_regs(void)
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prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN,
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OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
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/* Enable GPIO wakeups in PER */
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prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 |
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OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 |
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OMAP3430_EN_GPIO6, OMAP3430_PER_MOD, PM_WKEN);
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/* and allow them to wake up MPU */
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prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 |
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OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 |
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OMAP3430_GRPSEL_GPIO6,
|
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OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
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|
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/* Don't attach IVA interrupts */
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prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
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prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
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|
|
|
@ -273,35 +273,50 @@ struct powerdomain *pwrdm_lookup(const char *name)
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}
|
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|
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/**
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* pwrdm_for_each - call function on each registered clockdomain
|
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* pwrdm_for_each_nolock - call function on each registered clockdomain
|
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* @fn: callback function *
|
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*
|
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* Call the supplied function for each registered powerdomain. The
|
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* callback function can return anything but 0 to bail out early from
|
||||
* the iterator. The callback function is called with the pwrdm_rwlock
|
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* held for reading, so no powerdomain structure manipulation
|
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* functions should be called from the callback, although hardware
|
||||
* powerdomain control functions are fine. Returns the last return
|
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* value of the callback function, which should be 0 for success or
|
||||
* anything else to indicate failure; or -EINVAL if the function
|
||||
* pointer is null.
|
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* the iterator. Returns the last return value of the callback function, which
|
||||
* should be 0 for success or anything else to indicate failure; or -EINVAL if
|
||||
* the function pointer is null.
|
||||
*/
|
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int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
|
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int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
|
||||
void *user)
|
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{
|
||||
struct powerdomain *temp_pwrdm;
|
||||
unsigned long flags;
|
||||
int ret = 0;
|
||||
|
||||
if (!fn)
|
||||
return -EINVAL;
|
||||
|
||||
read_lock_irqsave(&pwrdm_rwlock, flags);
|
||||
list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
|
||||
ret = (*fn)(temp_pwrdm, user);
|
||||
if (ret)
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_for_each - call function on each registered clockdomain
|
||||
* @fn: callback function *
|
||||
*
|
||||
* This function is the same as 'pwrdm_for_each_nolock()', but keeps the
|
||||
* &pwrdm_rwlock locked for reading, so no powerdomain structure manipulation
|
||||
* functions should be called from the callback, although hardware powerdomain
|
||||
* control functions are fine.
|
||||
*/
|
||||
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
|
||||
void *user)
|
||||
{
|
||||
unsigned long flags;
|
||||
int ret;
|
||||
|
||||
read_lock_irqsave(&pwrdm_rwlock, flags);
|
||||
ret = pwrdm_for_each_nolock(fn, user);
|
||||
read_unlock_irqrestore(&pwrdm_rwlock, flags);
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -303,32 +303,21 @@ IS_OMAP_TYPE(3430, 0x3430)
|
|||
#define cpu_is_omap2430() 0
|
||||
#define cpu_is_omap3430() 0
|
||||
|
||||
#if defined(MULTI_OMAP1)
|
||||
# if defined(CONFIG_ARCH_OMAP730)
|
||||
# undef cpu_is_omap730
|
||||
# define cpu_is_omap730() is_omap730()
|
||||
# endif
|
||||
# if defined(CONFIG_ARCH_OMAP850)
|
||||
# undef cpu_is_omap850
|
||||
# define cpu_is_omap850() is_omap850()
|
||||
# endif
|
||||
#else
|
||||
# if defined(CONFIG_ARCH_OMAP730)
|
||||
# undef cpu_is_omap730
|
||||
# define cpu_is_omap730() 1
|
||||
# endif
|
||||
#endif
|
||||
#else
|
||||
# if defined(CONFIG_ARCH_OMAP850)
|
||||
# undef cpu_is_omap850
|
||||
# define cpu_is_omap850() 1
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Whether we have MULTI_OMAP1 or not, we still need to distinguish
|
||||
* between 330 vs. 1510 and 1611B/5912 vs. 1710.
|
||||
* between 730 vs 850, 330 vs. 1510 and 1611B/5912 vs. 1710.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP730)
|
||||
# undef cpu_is_omap730
|
||||
# define cpu_is_omap730() is_omap730()
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP850)
|
||||
# undef cpu_is_omap850
|
||||
# define cpu_is_omap850() is_omap850()
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP15XX)
|
||||
# undef cpu_is_omap310
|
||||
# undef cpu_is_omap1510
|
||||
|
@ -433,3 +422,5 @@ IS_OMAP_TYPE(3430, 0x3430)
|
|||
|
||||
int omap_chip_is(struct omap_chip_id oci);
|
||||
void omap2_check_revision(void);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -135,6 +135,8 @@ struct powerdomain *pwrdm_lookup(const char *name);
|
|||
|
||||
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
|
||||
void *user);
|
||||
int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
|
||||
void *user);
|
||||
|
||||
int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
|
||||
int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
|
||||
|
|
|
@ -47,7 +47,7 @@
|
|||
* 'va': mpu virtual address
|
||||
*
|
||||
* 'c': contiguous memory area
|
||||
* 'd': dicontiguous memory area
|
||||
* 'd': discontiguous memory area
|
||||
* 'a': anonymous memory allocation
|
||||
* '()': optional feature
|
||||
*
|
||||
|
@ -363,8 +363,9 @@ void *da_to_va(struct iommu *obj, u32 da)
|
|||
goto out;
|
||||
}
|
||||
va = area->va;
|
||||
mutex_unlock(&obj->mmap_lock);
|
||||
out:
|
||||
mutex_unlock(&obj->mmap_lock);
|
||||
|
||||
return va;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(da_to_va);
|
||||
|
@ -398,7 +399,7 @@ static inline void sgtable_drain_vmalloc(struct sg_table *sgt)
|
|||
{
|
||||
/*
|
||||
* Actually this is not necessary at all, just exists for
|
||||
* consistency of the code readibility.
|
||||
* consistency of the code readability.
|
||||
*/
|
||||
BUG_ON(!sgt);
|
||||
}
|
||||
|
@ -434,7 +435,7 @@ static inline void sgtable_drain_kmalloc(struct sg_table *sgt)
|
|||
{
|
||||
/*
|
||||
* Actually this is not necessary at all, just exists for
|
||||
* consistency of the code readibility
|
||||
* consistency of the code readability
|
||||
*/
|
||||
BUG_ON(!sgt);
|
||||
}
|
||||
|
|
|
@ -270,7 +270,8 @@ void * omap_sram_push(void * start, unsigned long size)
|
|||
omap_sram_ceil -= size;
|
||||
omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
|
||||
memcpy((void *)omap_sram_ceil, start, size);
|
||||
flush_icache_range((unsigned long)start, (unsigned long)(start + size));
|
||||
flush_icache_range((unsigned long)omap_sram_ceil,
|
||||
(unsigned long)(omap_sram_ceil + size));
|
||||
|
||||
return (void *)omap_sram_ceil;
|
||||
}
|
||||
|
|
|
@ -93,7 +93,7 @@ struct blizzard_reg_list {
|
|||
};
|
||||
|
||||
/* These need to be saved / restored separately from the rest. */
|
||||
static struct blizzard_reg_list blizzard_pll_regs[] = {
|
||||
static const struct blizzard_reg_list blizzard_pll_regs[] = {
|
||||
{
|
||||
.start = 0x04, /* Don't save PLL ctrl (0x0C) */
|
||||
.end = 0x0a,
|
||||
|
@ -104,7 +104,7 @@ static struct blizzard_reg_list blizzard_pll_regs[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct blizzard_reg_list blizzard_gen_regs[] = {
|
||||
static const struct blizzard_reg_list blizzard_gen_regs[] = {
|
||||
{
|
||||
.start = 0x18, /* SDRAM control */
|
||||
.end = 0x20,
|
||||
|
@ -191,7 +191,7 @@ struct blizzard_struct {
|
|||
|
||||
struct omapfb_device *fbdev;
|
||||
struct lcd_ctrl_extif *extif;
|
||||
struct lcd_ctrl *int_ctrl;
|
||||
const struct lcd_ctrl *int_ctrl;
|
||||
|
||||
void (*power_up)(struct device *dev);
|
||||
void (*power_down)(struct device *dev);
|
||||
|
@ -1372,7 +1372,7 @@ static void blizzard_get_caps(int plane, struct omapfb_caps *caps)
|
|||
(1 << OMAPFB_COLOR_YUV420);
|
||||
}
|
||||
|
||||
static void _save_regs(struct blizzard_reg_list *list, int cnt)
|
||||
static void _save_regs(const struct blizzard_reg_list *list, int cnt)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
@ -1383,7 +1383,7 @@ static void _save_regs(struct blizzard_reg_list *list, int cnt)
|
|||
}
|
||||
}
|
||||
|
||||
static void _restore_regs(struct blizzard_reg_list *list, int cnt)
|
||||
static void _restore_regs(const struct blizzard_reg_list *list, int cnt)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
|
@ -393,7 +393,7 @@ static void omapfb_sync(struct fb_info *fbi)
|
|||
* Set fb_info.fix fields and also updates fbdev.
|
||||
* When calling this fb_info.var must be set up already.
|
||||
*/
|
||||
static void set_fb_fix(struct fb_info *fbi)
|
||||
static void set_fb_fix(struct fb_info *fbi, int from_init)
|
||||
{
|
||||
struct fb_fix_screeninfo *fix = &fbi->fix;
|
||||
struct fb_var_screeninfo *var = &fbi->var;
|
||||
|
@ -403,10 +403,16 @@ static void set_fb_fix(struct fb_info *fbi)
|
|||
|
||||
rg = &plane->fbdev->mem_desc.region[plane->idx];
|
||||
fbi->screen_base = rg->vaddr;
|
||||
|
||||
if (!from_init) {
|
||||
mutex_lock(&fbi->mm_lock);
|
||||
fix->smem_start = rg->paddr;
|
||||
fix->smem_len = rg->size;
|
||||
mutex_unlock(&fbi->mm_lock);
|
||||
} else {
|
||||
fix->smem_start = rg->paddr;
|
||||
fix->smem_len = rg->size;
|
||||
}
|
||||
|
||||
fix->type = FB_TYPE_PACKED_PIXELS;
|
||||
bpp = var->bits_per_pixel;
|
||||
|
@ -704,7 +710,7 @@ static int omapfb_set_par(struct fb_info *fbi)
|
|||
int r = 0;
|
||||
|
||||
omapfb_rqueue_lock(fbdev);
|
||||
set_fb_fix(fbi);
|
||||
set_fb_fix(fbi, 0);
|
||||
r = ctrl_change_mode(fbi);
|
||||
omapfb_rqueue_unlock(fbdev);
|
||||
|
||||
|
@ -904,7 +910,7 @@ static int omapfb_setup_mem(struct fb_info *fbi, struct omapfb_mem_info *mi)
|
|||
if (old_size != size) {
|
||||
if (size) {
|
||||
memcpy(&fbi->var, new_var, sizeof(fbi->var));
|
||||
set_fb_fix(fbi);
|
||||
set_fb_fix(fbi, 0);
|
||||
} else {
|
||||
/*
|
||||
* Set these explicitly to indicate that the
|
||||
|
@ -1504,7 +1510,7 @@ static int fbinfo_init(struct omapfb_device *fbdev, struct fb_info *info)
|
|||
var->bits_per_pixel = fbdev->panel->bpp;
|
||||
|
||||
set_fb_var(info, var);
|
||||
set_fb_fix(info);
|
||||
set_fb_fix(info, 1);
|
||||
|
||||
r = fb_alloc_cmap(&info->cmap, 16, 0);
|
||||
if (r != 0)
|
||||
|
|
Loading…
Reference in a new issue