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ALSA: hda: Rework snd_hdac_stream_reset() to use macros 

We can use existing macros to poll and update register values instead of
open coding the functionality.

Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com>
Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Link: https://lore.kernel.org/r/20220818141517.109280-3-amadeuszx.slawinski@linux.intel.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Amadeusz Sławiński 2022-08-18 16:15:15 +02:00 committed by Takashi Iwai
parent 3cab69d99d
commit d91857059d
1 changed files with 6 additions and 20 deletions
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26
sound/hda/hdac_stream.c
View File

@ -165,7 +165,6 @@ EXPORT_SYMBOL_GPL(snd_hdac_stop_streams_and_chip);
void snd_hdac_stream_reset(struct hdac_stream *azx_dev) void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
{ {
unsigned char val; unsigned char val;
int timeout;
int dma_run_state; int dma_run_state;
snd_hdac_stream_clear(azx_dev); snd_hdac_stream_clear(azx_dev);
@ -173,30 +172,17 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START; dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET); snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
udelay(3);
timeout = 300; /* wait for hardware to report that the stream entered reset */
do { snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300);
val = snd_hdac_stream_readb(azx_dev, SD_CTL) &
SD_CTL_STREAM_RESET;
if (val)
break;
} while (--timeout);
if (azx_dev->bus->dma_stop_delay && dma_run_state) if (azx_dev->bus->dma_stop_delay && dma_run_state)
udelay(azx_dev->bus->dma_stop_delay); udelay(azx_dev->bus->dma_stop_delay);
val &= ~SD_CTL_STREAM_RESET; snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
snd_hdac_stream_writeb(azx_dev, SD_CTL, val);
udelay(3);
timeout = 300; /* wait for hardware to report that the stream is out of reset */
/* waiting for hardware to report that the stream is out of reset */ snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300);
do {
val = snd_hdac_stream_readb(azx_dev, SD_CTL) &
SD_CTL_STREAM_RESET;
if (!val)
break;
} while (--timeout);
/* reset first position - may not be synced with hw at this time */ /* reset first position - may not be synced with hw at this time */
if (azx_dev->posbuf) if (azx_dev->posbuf)