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Code Issues Releases Wiki Activity

drm/nouveau/ce: cosmetic changes

Browse source 
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-08-20 14:54:07 +10:00
parent d8c304b504
commit d9261a6837
8 changed files with 97 additions and 113 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
View file

@ -51,7 +51,7 @@ struct nvkm_falcon {
} data;
};
#define nv_falcon(priv) (&(priv)->base)
#define nv_falcon(priv) ((struct nvkm_falcon *)priv)
#define nvkm_falcon_create(p,e,c,b,d,i,f,r) \
nvkm_falcon_create_((p), (e), (c), (b), (d), (i), (f), \

8
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/com.fuc
View file

@ -24,9 +24,9 @@
*/
#ifdef GT215
.section #gt215_pce_data
.section #gt215_ce_data
#else
.section #gf100_pce_data
.section #gf100_ce_data
#endif
ctx_object: .b32 0
@ -128,9 +128,9 @@ dispatch_dma:
.b16 0x800 0
#ifdef GT215
.section #gt215_pce_code
.section #gt215_ce_code
#else
.section #gf100_pce_code
.section #gf100_ce_code
#endif
main:

4
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3.h
View file

@ -1,4 +1,4 @@
uint32_t gf100_pce_data[] = {
uint32_t gf100_ce_data[] = {
/* 0x0000: ctx_object */
0x00000000,
/* 0x0004: ctx_query_address_high */
@ -171,7 +171,7 @@ uint32_t gf100_pce_data[] = {
0x00000800,
};
uint32_t gf100_pce_code[] = {
uint32_t gf100_ce_code[] = {
/* 0x0000: main */
0x04fe04bd,
0x3517f000,

4
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3.h
View file

@ -1,4 +1,4 @@
uint32_t gt215_pce_data[] = {
uint32_t gt215_ce_data[] = {
/* 0x0000: ctx_object */
0x00000000,
/* 0x0004: ctx_dma */
@ -183,7 +183,7 @@ uint32_t gt215_pce_data[] = {
0x00000800,
};
uint32_t gt215_pce_code[] = {
uint32_t gt215_ce_code[] = {
/* 0x0000: main */
0x04fe04bd,
0x3517f000,

54
drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c
View file

@ -25,10 +25,6 @@
#include <engine/falcon.h>
#include "fuc/gf100.fuc3.h"
struct gf100_ce_priv {
struct nvkm_falcon base;
};
/*******************************************************************************
* Copy object classes
******************************************************************************/
@ -78,14 +74,14 @@ gf100_ce1_cclass = {
static int
gf100_ce_init(struct nvkm_object *object)
{
struct gf100_ce_priv *priv = (void *)object;
struct nvkm_falcon *ce = (void *)object;
int ret;
ret = nvkm_falcon_init(&priv->base);
ret = nvkm_falcon_init(ce);
if (ret)
return ret;
nv_wo32(priv, 0x084, nv_engidx(&priv->base.engine) - NVDEV_ENGINE_CE0);
nv_wo32(ce, 0x084, nv_engidx(&ce->engine) - NVDEV_ENGINE_CE0);
return 0;
}
@ -94,23 +90,23 @@ gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gf100_ce_priv *priv;
struct nvkm_falcon *ce;
int ret;
ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, true,
"PCE0", "ce0", &priv);
*pobject = nv_object(priv);
"PCE0", "ce0", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00000040;
nv_subdev(priv)->intr = gt215_ce_intr;
nv_engine(priv)->cclass = &gf100_ce0_cclass;
nv_engine(priv)->sclass = gf100_ce0_sclass;
nv_falcon(priv)->code.data = gf100_pce_code;
nv_falcon(priv)->code.size = sizeof(gf100_pce_code);
nv_falcon(priv)->data.data = gf100_pce_data;
nv_falcon(priv)->data.size = sizeof(gf100_pce_data);
nv_subdev(ce)->unit = 0x00000040;
nv_subdev(ce)->intr = gt215_ce_intr;
nv_engine(ce)->cclass = &gf100_ce0_cclass;
nv_engine(ce)->sclass = gf100_ce0_sclass;
nv_falcon(ce)->code.data = gf100_ce_code;
nv_falcon(ce)->code.size = sizeof(gf100_ce_code);
nv_falcon(ce)->data.data = gf100_ce_data;
nv_falcon(ce)->data.size = sizeof(gf100_ce_data);
return 0;
}
@ -119,23 +115,23 @@ gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gf100_ce_priv *priv;
struct nvkm_falcon *ce;
int ret;
ret = nvkm_falcon_create(parent, engine, oclass, 0x105000, true,
"PCE1", "ce1", &priv);
*pobject = nv_object(priv);
"PCE1", "ce1", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00000080;
nv_subdev(priv)->intr = gt215_ce_intr;
nv_engine(priv)->cclass = &gf100_ce1_cclass;
nv_engine(priv)->sclass = gf100_ce1_sclass;
nv_falcon(priv)->code.data = gf100_pce_code;
nv_falcon(priv)->code.size = sizeof(gf100_pce_code);
nv_falcon(priv)->data.data = gf100_pce_data;
nv_falcon(priv)->data.size = sizeof(gf100_pce_data);
nv_subdev(ce)->unit = 0x00000080;
nv_subdev(ce)->intr = gt215_ce_intr;
nv_engine(ce)->cclass = &gf100_ce1_cclass;
nv_engine(ce)->sclass = gf100_ce1_sclass;
nv_falcon(ce)->code.data = gf100_ce_code;
nv_falcon(ce)->code.size = sizeof(gf100_ce_code);
nv_falcon(ce)->data.data = gf100_ce_data;
nv_falcon(ce)->data.size = sizeof(gf100_ce_data);
return 0;
}

56
drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.c
View file

@ -25,10 +25,6 @@
#include <core/engctx.h>
struct gk104_ce_priv {
struct nvkm_engine base;
};
/*******************************************************************************
* Copy object classes
******************************************************************************/
@ -66,13 +62,13 @@ gk104_ce_cclass = {
static void
gk104_ce_intr(struct nvkm_subdev *subdev)
{
const int ce = nv_subidx(subdev) - NVDEV_ENGINE_CE0;
struct gk104_ce_priv *priv = (void *)subdev;
u32 stat = nv_rd32(priv, 0x104908 + (ce * 0x1000));
const int idx = nv_subidx(subdev) - NVDEV_ENGINE_CE0;
struct nvkm_engine *ce = (void *)subdev;
u32 stat = nv_rd32(ce, 0x104908 + (idx * 0x1000));
if (stat) {
nv_warn(priv, "unhandled intr 0x%08x\n", stat);
nv_wr32(priv, 0x104908 + (ce * 0x1000), stat);
nv_warn(ce, "unhandled intr 0x%08x\n", stat);
nv_wr32(ce, 0x104908 + (idx * 0x1000), stat);
}
}
@ -81,19 +77,19 @@ gk104_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gk104_ce_priv *priv;
struct nvkm_engine *ce;
int ret;
ret = nvkm_engine_create(parent, engine, oclass, true,
"PCE0", "ce0", &priv);
*pobject = nv_object(priv);
"PCE0", "ce0", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00000040;
nv_subdev(priv)->intr = gk104_ce_intr;
nv_engine(priv)->cclass = &gk104_ce_cclass;
nv_engine(priv)->sclass = gk104_ce_sclass;
nv_subdev(ce)->unit = 0x00000040;
nv_subdev(ce)->intr = gk104_ce_intr;
nv_engine(ce)->cclass = &gk104_ce_cclass;
nv_engine(ce)->sclass = gk104_ce_sclass;
return 0;
}
@ -102,19 +98,19 @@ gk104_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gk104_ce_priv *priv;
struct nvkm_engine *ce;
int ret;
ret = nvkm_engine_create(parent, engine, oclass, true,
"PCE1", "ce1", &priv);
*pobject = nv_object(priv);
"PCE1", "ce1", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00000080;
nv_subdev(priv)->intr = gk104_ce_intr;
nv_engine(priv)->cclass = &gk104_ce_cclass;
nv_engine(priv)->sclass = gk104_ce_sclass;
nv_subdev(ce)->unit = 0x00000080;
nv_subdev(ce)->intr = gk104_ce_intr;
nv_engine(ce)->cclass = &gk104_ce_cclass;
nv_engine(ce)->sclass = gk104_ce_sclass;
return 0;
}
@ -123,19 +119,19 @@ gk104_ce2_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gk104_ce_priv *priv;
struct nvkm_engine *ce;
int ret;
ret = nvkm_engine_create(parent, engine, oclass, true,
"PCE2", "ce2", &priv);
*pobject = nv_object(priv);
"PCE2", "ce2", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00200000;
nv_subdev(priv)->intr = gk104_ce_intr;
nv_engine(priv)->cclass = &gk104_ce_cclass;
nv_engine(priv)->sclass = gk104_ce_sclass;
nv_subdev(ce)->unit = 0x00200000;
nv_subdev(ce)->intr = gk104_ce_intr;
nv_engine(ce)->cclass = &gk104_ce_cclass;
nv_engine(ce)->sclass = gk104_ce_sclass;
return 0;
}

56
drivers/gpu/drm/nouveau/nvkm/engine/ce/gm204.c
View file

@ -25,10 +25,6 @@
#include <core/engctx.h>
struct gm204_ce_priv {
struct nvkm_engine base;
};
/*******************************************************************************
* Copy object classes
******************************************************************************/
@ -66,13 +62,13 @@ gm204_ce_cclass = {
static void
gm204_ce_intr(struct nvkm_subdev *subdev)
{
const int ce = nv_subidx(subdev) - NVDEV_ENGINE_CE0;
struct gm204_ce_priv *priv = (void *)subdev;
u32 stat = nv_rd32(priv, 0x104908 + (ce * 0x1000));
const int idx = nv_subidx(subdev) - NVDEV_ENGINE_CE0;
struct nvkm_engine *ce = (void *)subdev;
u32 stat = nv_rd32(ce, 0x104908 + (idx * 0x1000));
if (stat) {
nv_warn(priv, "unhandled intr 0x%08x\n", stat);
nv_wr32(priv, 0x104908 + (ce * 0x1000), stat);
nv_warn(ce, "unhandled intr 0x%08x\n", stat);
nv_wr32(ce, 0x104908 + (idx * 0x1000), stat);
}
}
@ -81,19 +77,19 @@ gm204_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gm204_ce_priv *priv;
struct nvkm_engine *ce;
int ret;
ret = nvkm_engine_create(parent, engine, oclass, true,
"PCE0", "ce0", &priv);
*pobject = nv_object(priv);
"PCE0", "ce0", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00000040;
nv_subdev(priv)->intr = gm204_ce_intr;
nv_engine(priv)->cclass = &gm204_ce_cclass;
nv_engine(priv)->sclass = gm204_ce_sclass;
nv_subdev(ce)->unit = 0x00000040;
nv_subdev(ce)->intr = gm204_ce_intr;
nv_engine(ce)->cclass = &gm204_ce_cclass;
nv_engine(ce)->sclass = gm204_ce_sclass;
return 0;
}
@ -102,19 +98,19 @@ gm204_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gm204_ce_priv *priv;
struct nvkm_engine *ce;
int ret;
ret = nvkm_engine_create(parent, engine, oclass, true,
"PCE1", "ce1", &priv);
*pobject = nv_object(priv);
"PCE1", "ce1", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00000080;
nv_subdev(priv)->intr = gm204_ce_intr;
nv_engine(priv)->cclass = &gm204_ce_cclass;
nv_engine(priv)->sclass = gm204_ce_sclass;
nv_subdev(ce)->unit = 0x00000080;
nv_subdev(ce)->intr = gm204_ce_intr;
nv_engine(ce)->cclass = &gm204_ce_cclass;
nv_engine(ce)->sclass = gm204_ce_sclass;
return 0;
}
@ -123,19 +119,19 @@ gm204_ce2_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gm204_ce_priv *priv;
struct nvkm_engine *ce;
int ret;
ret = nvkm_engine_create(parent, engine, oclass, true,
"PCE2", "ce2", &priv);
*pobject = nv_object(priv);
"PCE2", "ce2", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00200000;
nv_subdev(priv)->intr = gm204_ce_intr;
nv_engine(priv)->cclass = &gm204_ce_cclass;
nv_engine(priv)->sclass = gm204_ce_sclass;
nv_subdev(ce)->unit = 0x00200000;
nv_subdev(ce)->intr = gm204_ce_intr;
nv_engine(ce)->cclass = &gm204_ce_cclass;
nv_engine(ce)->sclass = gm204_ce_sclass;
return 0;
}

26
drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c
View file

@ -29,10 +29,6 @@
#include <core/client.h>
#include <core/enum.h>
struct gt215_ce_priv {
struct nvkm_falcon base;
};
/*******************************************************************************
* Copy object classes
******************************************************************************/
@ -117,23 +113,23 @@ gt215_ce_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_object **pobject)
{
bool enable = (nv_device(parent)->chipset != 0xaf);
struct gt215_ce_priv *priv;
struct nvkm_falcon *ce;
int ret;
ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, enable,
"PCE0", "ce0", &priv);
*pobject = nv_object(priv);
"PCE0", "ce0", &ce);
*pobject = nv_object(ce);
if (ret)
return ret;
nv_subdev(priv)->unit = 0x00802000;
nv_subdev(priv)->intr = gt215_ce_intr;
nv_engine(priv)->cclass = &gt215_ce_cclass;
nv_engine(priv)->sclass = gt215_ce_sclass;
nv_falcon(priv)->code.data = gt215_pce_code;
nv_falcon(priv)->code.size = sizeof(gt215_pce_code);
nv_falcon(priv)->data.data = gt215_pce_data;
nv_falcon(priv)->data.size = sizeof(gt215_pce_data);
nv_subdev(ce)->unit = 0x00802000;
nv_subdev(ce)->intr = gt215_ce_intr;
nv_engine(ce)->cclass = &gt215_ce_cclass;
nv_engine(ce)->sclass = gt215_ce_sclass;
nv_falcon(ce)->code.data = gt215_ce_code;
nv_falcon(ce)->code.size = sizeof(gt215_ce_code);
nv_falcon(ce)->data.data = gt215_ce_data;
nv_falcon(ce)->data.size = sizeof(gt215_ce_data);
return 0;
}