tty: serial: amba-pl011: fix whitespace formatting
Follow recommandations from: $ ./scripts/checkpatch.pl --strict --file \ drivers/tty/serial/amba-pl011.c We fix 5 warnings and 48 checks, all related to whitespace. Culprits are: CHECK: Alignment should match open parenthesis CHECK: Blank lines aren't necessary after an open brace '{' CHECK: Lines should not end with a '(' CHECK: Please don't use multiple blank lines CHECK: Please use a blank line after function/struct/union/enum declarations CHECK: spaces preferred around that '/' (ctx:VxV) CHECK: spaces preferred around that '|' (ctx:VxV) WARNING: Missing a blank line after declarations WARNING: please, no spaces at the start of a line Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/r/20231207-mbly-uart-v6-2-e384afa5e78c@bootlin.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
1f78c56007
commit
d93ebe0fcf
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@ -50,7 +50,7 @@
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#define AMBA_ISR_PASS_LIMIT 256
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#define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE)
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#define UART_DR_ERROR (UART011_DR_OE | UART011_DR_BE | UART011_DR_PE | UART011_DR_FE)
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#define UART_DUMMY_DR_RX (1 << 16)
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enum {
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@ -125,7 +125,7 @@ static unsigned int get_fifosize_arm(struct amba_device *dev)
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static struct vendor_data vendor_arm = {
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.reg_offset = pl011_std_offsets,
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.ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8,
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.ifls = UART011_IFLS_RX4_8 | UART011_IFLS_TX4_8,
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.fr_busy = UART01x_FR_BUSY,
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.fr_dsr = UART01x_FR_DSR,
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.fr_cts = UART01x_FR_CTS,
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@ -203,7 +203,7 @@ static unsigned int get_fifosize_st(struct amba_device *dev)
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static struct vendor_data vendor_st = {
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.reg_offset = pl011_st_offsets,
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.ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF,
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.ifls = UART011_IFLS_RX_HALF | UART011_IFLS_TX_HALF,
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.fr_busy = UART01x_FR_BUSY,
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.fr_dsr = UART01x_FR_DSR,
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.fr_cts = UART01x_FR_CTS,
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@ -277,13 +277,13 @@ struct uart_amba_port {
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static unsigned int pl011_tx_empty(struct uart_port *port);
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static unsigned int pl011_reg_to_offset(const struct uart_amba_port *uap,
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unsigned int reg)
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unsigned int reg)
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{
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return uap->reg_offset[reg];
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}
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static unsigned int pl011_read(const struct uart_amba_port *uap,
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unsigned int reg)
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unsigned int reg)
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{
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void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg);
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@ -292,7 +292,7 @@ static unsigned int pl011_read(const struct uart_amba_port *uap,
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}
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static void pl011_write(unsigned int val, const struct uart_amba_port *uap,
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unsigned int reg)
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unsigned int reg)
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{
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void __iomem *addr = uap->port.membase + pl011_reg_to_offset(uap, reg);
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@ -358,7 +358,6 @@ static int pl011_fifo_to_tty(struct uart_amba_port *uap)
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return fifotaken;
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}
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/*
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* All the DMA operation mode stuff goes inside this ifdef.
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* This assumes that you have a generic DMA device interface,
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@ -369,7 +368,7 @@ static int pl011_fifo_to_tty(struct uart_amba_port *uap)
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#define PL011_DMA_BUFFER_SIZE PAGE_SIZE
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static int pl011_dmabuf_init(struct dma_chan *chan, struct pl011_dmabuf *db,
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enum dma_data_direction dir)
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enum dma_data_direction dir)
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{
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db->buf = dma_alloc_coherent(chan->device->dev, PL011_DMA_BUFFER_SIZE,
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&db->dma, GFP_KERNEL);
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@ -381,7 +380,7 @@ static int pl011_dmabuf_init(struct dma_chan *chan, struct pl011_dmabuf *db,
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}
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static void pl011_dmabuf_free(struct dma_chan *chan, struct pl011_dmabuf *db,
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enum dma_data_direction dir)
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enum dma_data_direction dir)
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{
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if (db->buf) {
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dma_free_coherent(chan->device->dev,
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@ -424,7 +423,7 @@ static void pl011_dma_probe(struct uart_amba_port *uap)
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dma_cap_set(DMA_SLAVE, mask);
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chan = dma_request_channel(mask, plat->dma_filter,
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plat->dma_tx_param);
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plat->dma_tx_param);
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if (!chan) {
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dev_err(uap->port.dev, "no TX DMA channel!\n");
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return;
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@ -470,7 +469,7 @@ static void pl011_dma_probe(struct uart_amba_port *uap)
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DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
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dma_release_channel(chan);
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dev_info(uap->port.dev,
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"RX DMA disabled - no residue processing\n");
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"RX DMA disabled - no residue processing\n");
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return;
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}
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}
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@ -499,18 +498,16 @@ static void pl011_dma_probe(struct uart_amba_port *uap)
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else
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uap->dmarx.poll_timeout = 3000;
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} else if (!plat && dev->of_node) {
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uap->dmarx.auto_poll_rate = of_property_read_bool(
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dev->of_node, "auto-poll");
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uap->dmarx.auto_poll_rate =
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of_property_read_bool(dev->of_node, "auto-poll");
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if (uap->dmarx.auto_poll_rate) {
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u32 x;
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if (0 == of_property_read_u32(dev->of_node,
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"poll-rate-ms", &x))
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if (0 == of_property_read_u32(dev->of_node, "poll-rate-ms", &x))
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uap->dmarx.poll_rate = x;
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else
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uap->dmarx.poll_rate = 100;
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if (0 == of_property_read_u32(dev->of_node,
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"poll-timeout-ms", &x))
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if (0 == of_property_read_u32(dev->of_node, "poll-timeout-ms", &x))
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uap->dmarx.poll_timeout = x;
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else
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uap->dmarx.poll_timeout = 3000;
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@ -547,7 +544,7 @@ static void pl011_dma_tx_callback(void *data)
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uart_port_lock_irqsave(&uap->port, &flags);
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if (uap->dmatx.queued)
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dma_unmap_single(dmatx->chan->device->dev, dmatx->dma,
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dmatx->len, DMA_TO_DEVICE);
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dmatx->len, DMA_TO_DEVICE);
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dmacr = uap->dmacr;
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uap->dmacr = dmacr & ~UART011_TXDMAE;
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@ -643,7 +640,7 @@ static int pl011_dma_tx_refill(struct uart_amba_port *uap)
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}
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desc = dmaengine_prep_slave_single(chan, dmatx->dma, dmatx->len, DMA_MEM_TO_DEV,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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dma_unmap_single(dma_dev->dev, dmatx->dma, dmatx->len, DMA_TO_DEVICE);
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uap->dmatx.queued = false;
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@ -832,8 +829,8 @@ static int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap)
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dbuf = uap->dmarx.use_buf_b ?
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&uap->dmarx.dbuf_b : &uap->dmarx.dbuf_a;
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desc = dmaengine_prep_slave_single(rxchan, dbuf->dma, dbuf->len,
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DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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/*
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* If the DMA engine is busy and cannot prepare a
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* channel, no big deal, the driver will fall back
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@ -889,14 +886,12 @@ static void pl011_dma_rx_chars(struct uart_amba_port *uap,
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/* Pick the remain data from the DMA */
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if (pending) {
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/*
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* First take all chars in the DMA pipe, then look in the FIFO.
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* Note that tty_insert_flip_buf() tries to take as many chars
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* as it can.
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*/
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dma_count = tty_insert_flip_string(port, dbuf->buf + dmataken,
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pending);
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dma_count = tty_insert_flip_string(port, dbuf->buf + dmataken, pending);
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uap->port.icount.rx += dma_count;
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if (dma_count < pending)
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dmataken = dbuf->len - dmarx->last_residue;
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size = dmarx->last_residue - state.residue;
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dma_count = tty_insert_flip_string(port, dbuf->buf + dmataken,
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size);
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size);
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if (dma_count == size)
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dmarx->last_residue = state.residue;
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dmarx->last_jiffies = jiffies;
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@ -1085,7 +1080,6 @@ static void pl011_dma_rx_poll(struct timer_list *t)
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*/
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if (jiffies_to_msecs(jiffies - dmarx->last_jiffies)
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> uap->dmarx.poll_timeout) {
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uart_port_lock_irqsave(&uap->port, &flags);
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pl011_dma_rx_stop(uap);
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uap->im |= UART011_RXIM;
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del_timer(&uap->dmarx.timer);
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} else {
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mod_timer(&uap->dmarx.timer,
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jiffies + msecs_to_jiffies(uap->dmarx.poll_rate));
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jiffies + msecs_to_jiffies(uap->dmarx.poll_rate));
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}
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}
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@ -1129,7 +1123,7 @@ static void pl011_dma_startup(struct uart_amba_port *uap)
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/* Allocate and map DMA RX buffers */
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ret = pl011_dmabuf_init(uap->dmarx.chan, &uap->dmarx.dbuf_a,
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DMA_FROM_DEVICE);
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DMA_FROM_DEVICE);
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if (ret) {
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dev_err(uap->port.dev, "failed to init DMA %s: %d\n",
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"RX buffer A", ret);
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}
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ret = pl011_dmabuf_init(uap->dmarx.chan, &uap->dmarx.dbuf_b,
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DMA_FROM_DEVICE);
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DMA_FROM_DEVICE);
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if (ret) {
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dev_err(uap->port.dev, "failed to init DMA %s: %d\n",
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"RX buffer B", ret);
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pl011_dmabuf_free(uap->dmarx.chan, &uap->dmarx.dbuf_a,
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DMA_FROM_DEVICE);
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DMA_FROM_DEVICE);
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goto skip_rx;
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}
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if (uap->dmarx.poll_rate) {
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timer_setup(&uap->dmarx.timer, pl011_dma_rx_poll, 0);
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mod_timer(&uap->dmarx.timer,
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jiffies +
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msecs_to_jiffies(uap->dmarx.poll_rate));
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jiffies + msecs_to_jiffies(uap->dmarx.poll_rate));
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uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE;
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uap->dmarx.last_jiffies = jiffies;
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}
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@ -1359,8 +1352,8 @@ static void pl011_stop_rx(struct uart_port *port)
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struct uart_amba_port *uap =
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container_of(port, struct uart_amba_port, port);
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uap->im &= ~(UART011_RXIM|UART011_RTIM|UART011_FEIM|
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UART011_PEIM|UART011_BEIM|UART011_OEIM);
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uap->im &= ~(UART011_RXIM | UART011_RTIM | UART011_FEIM |
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UART011_PEIM | UART011_BEIM | UART011_OEIM);
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pl011_write(uap->im, uap, REG_IMSC);
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pl011_dma_rx_stop(uap);
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@ -1380,7 +1373,7 @@ static void pl011_enable_ms(struct uart_port *port)
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struct uart_amba_port *uap =
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container_of(port, struct uart_amba_port, port);
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uap->im |= UART011_RIMIM|UART011_CTSMIM|UART011_DCDMIM|UART011_DSRMIM;
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uap->im |= UART011_RIMIM | UART011_CTSMIM | UART011_DCDMIM | UART011_DSRMIM;
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pl011_write(uap->im, uap, REG_IMSC);
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}
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@ -1409,8 +1402,7 @@ __acquires(&uap->port.lock)
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uap->dmarx.last_jiffies = jiffies;
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uap->dmarx.last_residue = PL011_DMA_BUFFER_SIZE;
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mod_timer(&uap->dmarx.timer,
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jiffies +
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msecs_to_jiffies(uap->dmarx.poll_rate));
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jiffies + msecs_to_jiffies(uap->dmarx.poll_rate));
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}
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#endif
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}
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@ -1557,18 +1549,17 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
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do {
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check_apply_cts_event_workaround(uap);
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pl011_write(status & ~(UART011_TXIS|UART011_RTIS|
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UART011_RXIS),
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pl011_write(status & ~(UART011_TXIS | UART011_RTIS | UART011_RXIS),
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uap, REG_ICR);
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if (status & (UART011_RTIS|UART011_RXIS)) {
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if (status & (UART011_RTIS | UART011_RXIS)) {
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if (pl011_dma_rx_running(uap))
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pl011_dma_rx_irq(uap);
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else
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pl011_rx_chars(uap);
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}
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if (status & (UART011_DSRMIS|UART011_DCDMIS|
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UART011_CTSMIS|UART011_RIMIS))
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if (status & (UART011_DSRMIS | UART011_DCDMIS |
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UART011_CTSMIS | UART011_RIMIS))
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pl011_modem_status(uap);
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if (status & UART011_TXIS)
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pl011_tx_chars(uap, true);
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return pl011_read(uap, REG_DR);
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}
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static void pl011_put_poll_char(struct uart_port *port,
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unsigned char ch)
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static void pl011_put_poll_char(struct uart_port *port, unsigned char ch)
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{
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struct uart_amba_port *uap =
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container_of(port, struct uart_amba_port, port);
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return 0;
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}
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static void pl011_shutdown_channel(struct uart_amba_port *uap,
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unsigned int lcrh)
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static void pl011_shutdown_channel(struct uart_amba_port *uap, unsigned int lcrh)
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{
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unsigned long val;
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unsigned long val;
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val = pl011_read(uap, lcrh);
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val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN);
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pl011_write(val, uap, lcrh);
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val = pl011_read(uap, lcrh);
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val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN);
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pl011_write(val, uap, lcrh);
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}
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/*
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uap->dmarx.poll_rate = DIV_ROUND_UP(10000000, baud);
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#endif
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if (baud > port->uartclk/16)
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if (baud > port->uartclk / 16)
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quot = DIV_ROUND_CLOSEST(port->uartclk * 8, baud);
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else
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quot = DIV_ROUND_CLOSEST(port->uartclk * 4, baud);
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static int pl011_verify_port(struct uart_port *port, struct serial_struct *ser)
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{
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int ret = 0;
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if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
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ret = -EINVAL;
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if (ser->irq < 0 || ser->irq >= nr_irqs)
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ret = -EINVAL;
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if (ser->baud_base < 9600)
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ret = -EINVAL;
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if (port->mapbase != (unsigned long) ser->iomem_base)
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if (port->mapbase != (unsigned long)ser->iomem_base)
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ret = -EINVAL;
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return ret;
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}
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@ -2613,7 +2603,9 @@ static int __init pl011_early_console_setup(struct earlycon_device *device,
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return 0;
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}
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OF_EARLYCON_DECLARE(pl011, "arm,pl011", pl011_early_console_setup);
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OF_EARLYCON_DECLARE(pl011, "arm,sbsa-uart", pl011_early_console_setup);
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/*
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device->con->write = qdf2400_e44_early_write;
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return 0;
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}
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EARLYCON_DECLARE(qdf2400_e44, qdf2400_e44_early_console_setup);
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#else
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