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drm/amd/pm: correct the fan speed RPM retrieving

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The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed RPM.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2021-02-09 12:23:33 +08:00 committed by Alex Deucher
parent fb1f667e71
commit d9ca7567b8
8 changed files with 106 additions and 5 deletions
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3
drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h
View file

@ -38,6 +38,9 @@
#define mmCG_TACH_CTRL 0x006a
#define mmCG_TACH_CTRL_BASE_IDX 0
#define mmCG_TACH_STATUS 0x006b
#define mmCG_TACH_STATUS_BASE_IDX 0
#define mmTHM_THERMAL_INT_ENA 0x000a
#define mmTHM_THERMAL_INT_ENA_BASE_IDX 0
#define mmTHM_THERMAL_INT_CTRL 0x000b

5
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
View file

@ -729,6 +729,11 @@ struct pptable_funcs {
*/
int (*get_fan_speed_percent)(struct smu_context *smu, uint32_t *speed);
/**
* @get_fan_speed_rpm: Get the current fan speed in rpm.
*/
int (*get_fan_speed_rpm)(struct smu_context *smu, uint32_t *speed);
/**
* @set_watermarks_table: Configure and upload the watermarks tables to
* the SMU.

3
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
View file

@ -230,6 +230,9 @@ int smu_v11_0_set_fan_speed_rpm(struct smu_context *smu,
int smu_v11_0_get_fan_speed_percent(struct smu_context *smu,
uint32_t *speed);
int smu_v11_0_get_fan_speed_rpm(struct smu_context *smu,
uint32_t *speed);
int smu_v11_0_set_xgmi_pstate(struct smu_context *smu,
uint32_t pstate);

7
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
View file

@ -2639,17 +2639,14 @@ static int smu_get_fan_speed_rpm(void *handle, uint32_t *speed)
{
struct smu_context *smu = handle;
int ret = 0;
u32 percent;
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
return -EOPNOTSUPP;
mutex_lock(&smu->mutex);
if (smu->ppt_funcs->get_fan_speed_percent) {
ret = smu->ppt_funcs->get_fan_speed_percent(smu, &percent);
*speed = percent * smu->fan_max_rpm / 100;
}
if (smu->ppt_funcs->get_fan_speed_rpm)
ret = smu->ppt_funcs->get_fan_speed_rpm(smu, speed);
mutex_unlock(&smu->mutex);

24
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
View file

@ -1162,6 +1162,29 @@ static int arcturus_read_sensor(struct smu_context *smu,
return ret;
}
static int arcturus_get_fan_speed_rpm(struct smu_context *smu,
uint32_t *speed)
{
int ret = 0;
if (!speed)
return -EINVAL;
switch (smu_v11_0_get_fan_control_mode(smu)) {
case AMD_FAN_CTRL_AUTO:
ret = arcturus_get_smu_metrics_data(smu,
METRICS_CURR_FANSPEED,
speed);
break;
default:
ret = smu_v11_0_get_fan_speed_rpm(smu,
speed);
break;
}
return ret;
}
static int arcturus_get_fan_parameters(struct smu_context *smu)
{
PPTable_t *pptable = smu->smu_table.driver_pptable;
@ -2248,6 +2271,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
.force_clk_levels = arcturus_force_clk_levels,
.read_sensor = arcturus_read_sensor,
.get_fan_speed_percent = smu_v11_0_get_fan_speed_percent,
.get_fan_speed_rpm = arcturus_get_fan_speed_rpm,
.get_power_profile_mode = arcturus_get_power_profile_mode,
.set_power_profile_mode = arcturus_set_power_profile_mode,
.set_performance_level = arcturus_set_performance_level,

24
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
View file

@ -1671,6 +1671,29 @@ static bool navi10_is_dpm_running(struct smu_context *smu)
return !!(feature_enabled & SMC_DPM_FEATURE);
}
static int navi10_get_fan_speed_rpm(struct smu_context *smu,
uint32_t *speed)
{
int ret = 0;
if (!speed)
return -EINVAL;
switch (smu_v11_0_get_fan_control_mode(smu)) {
case AMD_FAN_CTRL_AUTO:
ret = navi10_get_smu_metrics_data(smu,
METRICS_CURR_FANSPEED,
speed);
break;
default:
ret = smu_v11_0_get_fan_speed_rpm(smu,
speed);
break;
}
return ret;
}
static int navi10_get_fan_parameters(struct smu_context *smu)
{
PPTable_t *pptable = smu->smu_table.driver_pptable;
@ -3205,6 +3228,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
.notify_smc_display_config = navi10_notify_smc_display_config,
.is_dpm_running = navi10_is_dpm_running,
.get_fan_speed_percent = smu_v11_0_get_fan_speed_percent,
.get_fan_speed_rpm = navi10_get_fan_speed_rpm,
.get_power_profile_mode = navi10_get_power_profile_mode,
.set_power_profile_mode = navi10_set_power_profile_mode,
.set_watermarks_table = navi10_set_watermarks_table,

17
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
View file

@ -1354,6 +1354,22 @@ static bool sienna_cichlid_is_dpm_running(struct smu_context *smu)
return !!(feature_enabled & SMC_DPM_FEATURE);
}
static int sienna_cichlid_get_fan_speed_rpm(struct smu_context *smu,
uint32_t *speed)
{
if (!speed)
return -EINVAL;
/*
* For Sienna_Cichlid and later, the fan speed(rpm) reported
* by pmfw is always trustable(even when the fan control feature
* disabled or 0 RPM kicked in).
*/
return sienna_cichlid_get_smu_metrics_data(smu,
METRICS_CURR_FANSPEED,
speed);
}
static int sienna_cichlid_get_fan_parameters(struct smu_context *smu)
{
uint16_t *table_member;
@ -3837,6 +3853,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.notify_smc_display_config = sienna_cichlid_notify_smc_display_config,
.is_dpm_running = sienna_cichlid_is_dpm_running,
.get_fan_speed_percent = smu_v11_0_get_fan_speed_percent,
.get_fan_speed_rpm = sienna_cichlid_get_fan_speed_rpm,
.get_power_profile_mode = sienna_cichlid_get_power_profile_mode,
.set_power_profile_mode = sienna_cichlid_set_power_profile_mode,
.set_watermarks_table = sienna_cichlid_set_watermarks_table,

28
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
View file

@ -1298,6 +1298,34 @@ int smu_v11_0_get_fan_speed_percent(struct smu_context *smu,
return 0;
}
int smu_v11_0_get_fan_speed_rpm(struct smu_context *smu,
uint32_t *speed)
{
struct amdgpu_device *adev = smu->adev;
uint32_t crystal_clock_freq = 2500;
uint32_t tach_status;
uint64_t tmp64;
/*
* For pre Sienna Cichlid ASICs, the 0 RPM may be not correctly
* detected via register retrieving. To workaround this, we will
* report the fan speed as 0 RPM if user just requested such.
*/
if ((smu->user_dpm_profile.flags & SMU_CUSTOM_FAN_SPEED_RPM)
&& !smu->user_dpm_profile.fan_speed_rpm) {
*speed = 0;
return 0;
}
tmp64 = (uint64_t)crystal_clock_freq * 60 * 10000;
tach_status = RREG32_SOC15(THM, 0, mmCG_TACH_STATUS);
do_div(tmp64, tach_status);
*speed = (uint32_t)tmp64;
return 0;
}
int
smu_v11_0_set_fan_control_mode(struct smu_context *smu,
uint32_t mode)