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dmaengine: altera: fix response FIFO emptying
Commit 6084fc2ec4
("dmaengine: altera: Use macros instead of structs
to describe the registers") introduced a minus sign before a register
offset.
This leads to soft-locks of the DMA controller, since reading the last
status byte is required to pop the response from the FIFO. Failing to
do so will lead to a full FIFO, which means that the DMA controller
will stop processing descriptors.
Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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1 changed files with 1 additions and 1 deletions
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@ -698,7 +698,7 @@ static void msgdma_tasklet(unsigned long data)
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* bits. So we need to just drop these values.
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*/
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size = ioread32(mdev->resp + MSGDMA_RESP_BYTES_TRANSFERRED);
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status = ioread32(mdev->resp - MSGDMA_RESP_STATUS);
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status = ioread32(mdev->resp + MSGDMA_RESP_STATUS);
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msgdma_complete_descriptor(mdev);
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msgdma_chan_desc_cleanup(mdev);
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