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drm/nouveau: initial chipset description for nvdX chipsets
All the non-stubbed functions should be okay for this chipset, the rest will be added back as they're figured out. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
03bc9675d3
commit
d9f61c2d28
1 changed files with 46 additions and 2 deletions
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@ -299,7 +299,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
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case 0x50:
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case 0x80: /* gotta love NVIDIA's consistency.. */
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case 0x90:
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case 0xA0:
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case 0xa0:
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engine->instmem.init = nv50_instmem_init;
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engine->instmem.takedown = nv50_instmem_takedown;
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engine->instmem.suspend = nv50_instmem_suspend;
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@ -376,7 +376,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
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engine->vram.put = nv50_vram_del;
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engine->vram.flags_valid = nv50_vram_flags_valid;
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break;
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case 0xC0:
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case 0xc0:
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engine->instmem.init = nvc0_instmem_init;
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engine->instmem.takedown = nvc0_instmem_takedown;
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engine->instmem.suspend = nvc0_instmem_suspend;
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@ -426,6 +426,47 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
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engine->pm.voltage_get = nouveau_voltage_gpio_get;
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engine->pm.voltage_set = nouveau_voltage_gpio_set;
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break;
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case 0xd0:
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engine->instmem.init = nvc0_instmem_init;
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engine->instmem.takedown = nvc0_instmem_takedown;
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engine->instmem.suspend = nvc0_instmem_suspend;
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engine->instmem.resume = nvc0_instmem_resume;
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engine->instmem.get = nv50_instmem_get;
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engine->instmem.put = nv50_instmem_put;
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engine->instmem.map = nv50_instmem_map;
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engine->instmem.unmap = nv50_instmem_unmap;
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engine->instmem.flush = nv84_instmem_flush;
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engine->mc.init = nv50_mc_init;
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engine->mc.takedown = nv50_mc_takedown;
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engine->timer.init = nv04_timer_init;
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engine->timer.read = nv04_timer_read;
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engine->timer.takedown = nv04_timer_takedown;
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engine->fb.init = nvc0_fb_init;
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engine->fb.takedown = nvc0_fb_takedown;
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engine->fifo.channels = 128;
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engine->fifo.init = nvc0_fifo_init;
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engine->fifo.takedown = nvc0_fifo_takedown;
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engine->fifo.disable = nvc0_fifo_disable;
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engine->fifo.enable = nvc0_fifo_enable;
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engine->fifo.reassign = nvc0_fifo_reassign;
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engine->fifo.channel_id = nvc0_fifo_channel_id;
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engine->fifo.create_context = nvc0_fifo_create_context;
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engine->fifo.destroy_context = nvc0_fifo_destroy_context;
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engine->fifo.load_context = nvc0_fifo_load_context;
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engine->fifo.unload_context = nvc0_fifo_unload_context;
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engine->display.early_init = nouveau_stub_init;
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engine->display.late_takedown = nouveau_stub_takedown;
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engine->display.create = nouveau_stub_init;
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engine->display.init = nouveau_stub_init;
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engine->display.destroy = nouveau_stub_takedown;
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engine->gpio.init = nouveau_stub_init;
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engine->gpio.takedown = nouveau_stub_takedown;
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engine->vram.init = nvc0_vram_init;
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engine->vram.takedown = nv50_vram_fini;
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engine->vram.get = nvc0_vram_new;
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engine->vram.put = nv50_vram_del;
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engine->vram.flags_valid = nvc0_vram_flags_valid;
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break;
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default:
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NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset);
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return 1;
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@ -1015,6 +1056,9 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
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case 0xc0:
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dev_priv->card_type = NV_C0;
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break;
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case 0xd0:
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dev_priv->card_type = NV_D0;
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break;
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default:
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NV_INFO(dev, "Unsupported chipset 0x%08x\n", reg0);
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ret = -EINVAL;
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