AT91 fixes for 6.1 #3

It contains:
 - build fix for SAMA5D3 devices which don't have an L2 cache and due to this
   accesssing outer_cache.write_sec in sama5_secure_cache_init() could throw
   undefined reference to `outer_cache' if CONFIG_OUTER_CACHE is disabled
   from common sama5_defconfig.
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Merge tag 'at91-fixes-6.1-3' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes

AT91 fixes for 6.1 #3

It contains:
- build fix for SAMA5D3 devices which don't have an L2 cache and due to this
  accesssing outer_cache.write_sec in sama5_secure_cache_init() could throw
  undefined reference to `outer_cache' if CONFIG_OUTER_CACHE is disabled
  from common sama5_defconfig.

* tag 'at91-fixes-6.1-3' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: fix build for SAMA5D3 w/o L2 cache

Link: https://lore.kernel.org/r/20221125093521.382105-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-11-29 15:45:36 +01:00
commit da0cbf9307

View file

@ -26,7 +26,7 @@ static void sama5_l2c310_write_sec(unsigned long val, unsigned reg)
static void __init sama5_secure_cache_init(void)
{
sam_secure_init();
if (sam_linux_is_optee_available())
if (IS_ENABLED(CONFIG_OUTER_CACHE) && sam_linux_is_optee_available())
outer_cache.write_sec = sama5_l2c310_write_sec;
}