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ASoC: Intel: common: add match tables for CNL/CFL/CML w/ SoundWire
The two configurations are with the Realtek 3-in-1 board requiring all 4 links to be enabled, or basic configuration with the on-board RT700 using link1. For now we only have definitions for CML. CNL and CFL are just placeholders. Signed-off-by: Rander Wang <rander.wang@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20200110222530.30303-5-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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3 changed files with 99 additions and 0 deletions
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@ -14,5 +14,10 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_cfl_machines[] = {
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};
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EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cfl_machines);
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struct snd_soc_acpi_mach snd_soc_acpi_intel_cfl_sdw_machines[] = {
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{}
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};
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EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cfl_sdw_machines);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Intel Common ACPI Match module");
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@ -59,5 +59,94 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_cml_machines[] = {
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};
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EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cml_machines);
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static const u64 rt711_0_adr[] = {
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0x000010025D071100
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};
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static const u64 rt1308_1_adr[] = {
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0x000110025D130800
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};
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static const u64 rt1308_2_adr[] = {
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0x000210025D130800
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};
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static const u64 rt715_3_adr[] = {
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0x000310025D071500
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};
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static const struct snd_soc_acpi_link_adr cml_3_in_1_default[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt711_0_adr),
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.adr = rt711_0_adr,
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},
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{
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.mask = BIT(1),
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.num_adr = ARRAY_SIZE(rt1308_1_adr),
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.adr = rt1308_1_adr,
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},
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{
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.mask = BIT(2),
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.num_adr = ARRAY_SIZE(rt1308_2_adr),
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.adr = rt1308_2_adr,
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},
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{
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.mask = BIT(3),
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.num_adr = ARRAY_SIZE(rt715_3_adr),
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.adr = rt715_3_adr,
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},
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{}
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};
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static const struct snd_soc_acpi_link_adr cml_3_in_1_mono_amp[] = {
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{
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.mask = BIT(0),
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.num_adr = ARRAY_SIZE(rt711_0_adr),
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.adr = rt711_0_adr,
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},
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{
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.mask = BIT(1),
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.num_adr = ARRAY_SIZE(rt1308_1_adr),
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.adr = rt1308_1_adr,
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},
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{
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.mask = BIT(3),
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.num_adr = ARRAY_SIZE(rt715_3_adr),
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.adr = rt715_3_adr,
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},
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{}
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};
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struct snd_soc_acpi_mach snd_soc_acpi_intel_cml_sdw_machines[] = {
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{
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.link_mask = 0xF, /* 4 active links required */
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.links = cml_3_in_1_default,
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.drv_name = "sdw_rt711_rt1308_rt715",
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.sof_fw_filename = "sof-cml.ri",
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.sof_tplg_filename = "sof-cml-rt711-rt1308-rt715.tplg",
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},
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{
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/*
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* link_mask should be 0xB, but all links are enabled by BIOS.
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* This entry will be selected if there is no rt1308 exposed
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* on link2 since it will fail to match the above entry.
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*/
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.link_mask = 0xF,
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.links = cml_3_in_1_mono_amp,
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.drv_name = "sdw_rt711_rt1308_rt715",
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.sof_fw_filename = "sof-cml.ri",
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.sof_tplg_filename = "sof-cml-rt711-rt1308-mono-rt715.tplg",
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},
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{
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.link_mask = 0x2, /* RT700 connected on Link1 */
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.drv_name = "sdw_rt700",
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.sof_fw_filename = "sof-cml.ri",
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.sof_tplg_filename = "sof-cml-rt700.tplg",
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},
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{}
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};
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EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cml_sdw_machines);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Intel Common ACPI Match module");
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@ -27,5 +27,10 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_cnl_machines[] = {
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};
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EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cnl_machines);
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struct snd_soc_acpi_mach snd_soc_acpi_intel_cnl_sdw_machines[] = {
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{},
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};
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EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cnl_sdw_machines);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Intel Common ACPI Match module");
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