arm64: mm: Wire up TCR.DS bit to PTE shareability fields
When LPA2 is enabled, bits 8 and 9 of page and block descriptors become part of the output address instead of carrying shareability attributes for the region in question. So avoid setting these bits if TCR.DS == 1, which means LPA2 is enabled. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20240214122845.2033971-74-ardb+git@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -1377,6 +1377,10 @@ config ARM64_PA_BITS
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default 48 if ARM64_PA_BITS_48
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default 52 if ARM64_PA_BITS_52
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config ARM64_LPA2
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def_bool y
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depends on ARM64_PA_BITS_52 && !ARM64_64K_PAGES
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choice
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prompt "Endianness"
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default CPU_LITTLE_ENDIAN
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@ -284,6 +284,7 @@
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#define TCR_E0PD1 (UL(1) << 56)
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#define TCR_TCMA0 (UL(1) << 57)
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#define TCR_TCMA1 (UL(1) << 58)
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#define TCR_DS (UL(1) << 59)
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/*
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* TTBR.
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@ -30,8 +30,8 @@
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#define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
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#define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
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#define PROT_DEFAULT (_PROT_DEFAULT | PTE_MAYBE_NG)
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#define PROT_SECT_DEFAULT (_PROT_SECT_DEFAULT | PMD_MAYBE_NG)
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#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_MAYBE_NG | PTE_MAYBE_SHARED | PTE_AF)
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#define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_MAYBE_NG | PMD_MAYBE_SHARED | PMD_SECT_AF)
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#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
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#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
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@ -67,7 +67,19 @@ extern bool arm64_use_ng_mappings;
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#define PTE_MAYBE_NG (arm64_use_ng_mappings ? PTE_NG : 0)
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#define PMD_MAYBE_NG (arm64_use_ng_mappings ? PMD_SECT_NG : 0)
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#ifndef CONFIG_ARM64_LPA2
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#define lpa2_is_enabled() false
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#define PTE_MAYBE_SHARED PTE_SHARED
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#define PMD_MAYBE_SHARED PMD_SECT_S
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#else
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static inline bool __pure lpa2_is_enabled(void)
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{
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return read_tcr() & TCR_DS;
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}
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#define PTE_MAYBE_SHARED (lpa2_is_enabled() ? 0 : PTE_SHARED)
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#define PMD_MAYBE_SHARED (lpa2_is_enabled() ? 0 : PMD_SECT_S)
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#endif
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/*
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* If we have userspace only BTI we don't want to mark kernel pages
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@ -73,6 +73,10 @@ static int __init adjust_protection_map(void)
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protection_map[VM_EXEC | VM_SHARED] = PAGE_EXECONLY;
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}
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if (lpa2_is_enabled())
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for (int i = 0; i < ARRAY_SIZE(protection_map); i++)
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pgprot_val(protection_map[i]) &= ~PTE_SHARED;
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return 0;
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}
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arch_initcall(adjust_protection_map);
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@ -466,6 +466,7 @@ alternative_else_nop_endif
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*/
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#define PTE_MAYBE_NG 0
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#define PTE_MAYBE_SHARED 0
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mov_q x0, PIE_E0
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msr REG_PIRE0_EL1, x0
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@ -473,6 +474,7 @@ alternative_else_nop_endif
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msr REG_PIR_EL1, x0
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#undef PTE_MAYBE_NG
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#undef PTE_MAYBE_SHARED
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mov x0, TCR2_EL1x_PIE
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msr REG_TCR2_EL1, x0
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