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drm/amd/display: Update scaler v_active data if interlaced

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Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2018-03-26 12:33:22 -04:00 committed by Alex Deucher
parent 5282cbe32e
commit dc002a2e4f
1 changed files with 8 additions and 0 deletions
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8
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
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@ -844,6 +844,9 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
pipe_ctx->plane_res.scl_data.format = convert_pixel_format_to_dalsurface(
pipe_ctx->plane_state->format);
if (pipe_ctx->stream->timing.flags.INTERLACE)
pipe_ctx->stream->dst.height *= 2;
calculate_scaling_ratios(pipe_ctx);
calculate_viewport(pipe_ctx);
@ -864,6 +867,8 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right;
pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable + timing->v_border_top + timing->v_border_bottom;
if (pipe_ctx->stream->timing.flags.INTERLACE)
pipe_ctx->plane_res.scl_data.v_active *= 2;
/* Taps calculations */
@ -909,6 +914,9 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx)
plane_state->dst_rect.x,
plane_state->dst_rect.y);
if (pipe_ctx->stream->timing.flags.INTERLACE)
pipe_ctx->stream->dst.height /= 2;
return res;
}