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ARM: S3C24XX: remove plat/irq.h in plat-samsung

Browse source 
plat-samsung/irq.h did only contain functions for handling the spread out
subirqs on s3c24xx arches, which are not needed anymore.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[kgene.kim@samsung.com: fixed build error on bast-irq.c]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Heiko Stuebner 2013-02-12 14:23:01 -08:00 committed by Kukjin Kim
parent 4d512a908e
commit dc1a3538fe
4 changed files with 9 additions and 124 deletions
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2
arch/arm/mach-s3c24xx/bast-irq.c
View file

@ -34,8 +34,6 @@
#include <mach/hardware.h>
#include <mach/regs-irq.h>
#include <plat/irq.h>
#include "bast.h"
#define irqdbf(x...)

7
arch/arm/mach-s3c24xx/irq-pm.c
View file

@ -16,10 +16,15 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/syscore_ops.h>
#include <linux/io.h>
#include <plat/cpu.h>
#include <plat/pm.h>
#include <plat/irq.h>
#include <plat/map-base.h>
#include <plat/map-s3c.h>
#include <mach/regs-irq.h>
#include <mach/regs-gpio.h>
#include <asm/irq.h>

8
arch/arm/mach-s3c24xx/irq.c
View file

@ -34,7 +34,6 @@
#include <plat/cpu.h>
#include <plat/regs-irqtype.h>
#include <plat/pm.h>
#include <plat/irq.h>
#define S3C_IRQTYPE_NONE 0
#define S3C_IRQTYPE_EINT 1
@ -175,8 +174,7 @@ static int s3c_irqext_type_set(void __iomem *gpcon_reg,
return 0;
}
/* FIXME: make static when it's out of plat-samsung/irq.h */
int s3c_irqext_type(struct irq_data *data, unsigned int type)
static int s3c_irqext_type(struct irq_data *data, unsigned int type)
{
void __iomem *extint_reg;
void __iomem *gpcon_reg;
@ -224,7 +222,7 @@ static int s3c_irqext0_type(struct irq_data *data, unsigned int type)
extint_offset, type);
}
struct irq_chip s3c_irq_chip = {
static struct irq_chip s3c_irq_chip = {
.name = "s3c",
.irq_ack = s3c_irq_ack,
.irq_mask = s3c_irq_mask,
@ -232,7 +230,7 @@ struct irq_chip s3c_irq_chip = {
.irq_set_wake = s3c_irq_wake
};
struct irq_chip s3c_irq_level_chip = {
static struct irq_chip s3c_irq_level_chip = {
.name = "s3c-level",
.irq_mask = s3c_irq_mask,
.irq_unmask = s3c_irq_unmask,

116
arch/arm/plat-samsung/include/plat/irq.h
View file

@ -1,116 +0,0 @@
/* linux/arch/arm/plat-samsung/include/plat/irq.h
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for S3C24XX CPU IRQ support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/regs-irq.h>
#include <mach/regs-gpio.h>
#define irqdbf(x...)
#define irqdbf2(x...)
#define EXTINT_OFF (IRQ_EINT4 - 4)
/* these are exported for arch/arm/mach-* usage */
extern struct irq_chip s3c_irq_level_chip;
extern struct irq_chip s3c_irq_chip;
static inline void s3c_irqsub_mask(unsigned int irqno,
unsigned int parentbit,
int subcheck)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
/* check to see if we need to mask the parent IRQ */
if ((submask & subcheck) == subcheck)
__raw_writel(mask | parentbit, S3C2410_INTMSK);
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
}
static inline void s3c_irqsub_unmask(unsigned int irqno,
unsigned int parentbit)
{
unsigned long mask;
unsigned long submask;
submask = __raw_readl(S3C2410_INTSUBMSK);
mask = __raw_readl(S3C2410_INTMSK);
submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
mask &= ~parentbit;
/* write back masks */
__raw_writel(submask, S3C2410_INTSUBMSK);
__raw_writel(mask, S3C2410_INTMSK);
}
static inline void s3c_irqsub_maskack(unsigned int irqno,
unsigned int parentmask,
unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
s3c_irqsub_mask(irqno, parentmask, group);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
static inline void s3c_irqsub_ack(unsigned int irqno,
unsigned int parentmask,
unsigned int group)
{
unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
__raw_writel(bit, S3C2410_SUBSRCPND);
/* only ack parent if we've got all the irqs (seems we must
* ack, all and hope that the irq system retriggers ok when
* the interrupt goes off again)
*/
if (1) {
__raw_writel(parentmask, S3C2410_SRCPND);
__raw_writel(parentmask, S3C2410_INTPND);
}
}
/* exported for use in arch/arm/mach-s3c2410 */
#ifdef CONFIG_PM
extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
#else
#define s3c_irq_wake NULL
#endif
extern int s3c_irqext_type(struct irq_data *d, unsigned int type);