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sdhci: build fix: rename SDHCI I/O accessor functions

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Unfortunately some architectures #define their read{b,w,l} and
write{b,w,l} I/O accessors which makes the SDHCI I/O accessor functions of
the same names subject to preprocessing.  This leads to the following
compiler error,

In file included from drivers/mmc/host/sdhci.c:26:
drivers/mmc/host/sdhci.h:318:35: error: macro "writel" passed 3 arguments, but takes just 2

Rename the SDHCI I/O functions so that CONFIG_MMC_SDHCI_IO_ACCESSORS can
be enabled for architectures that implement their read{b,w,l} and
write{b,w,l} functions with macros.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Cc: Zhangfei Gao <zgao6@marvell.com>
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Matt Fleming 2010-05-26 14:42:03 -07:00 committed by Linus Torvalds
parent a751a7d69f
commit dc297c92e6
3 changed files with 30 additions and 30 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
drivers/mmc/host/sdhci-of-esdhc.c
View file

@ -129,12 +129,12 @@ struct sdhci_of_data sdhci_esdhc = {
SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET | SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
SDHCI_QUIRK_NO_CARD_NO_RESET, SDHCI_QUIRK_NO_CARD_NO_RESET,
.ops = { .ops = {
.readl = sdhci_be32bs_readl, .read_l = sdhci_be32bs_readl,
.readw = esdhc_readw, .read_w = esdhc_readw,
.readb = sdhci_be32bs_readb, .read_b = sdhci_be32bs_readb,
.writel = sdhci_be32bs_writel, .write_l = sdhci_be32bs_writel,
.writew = esdhc_writew, .write_w = esdhc_writew,
.writeb = esdhc_writeb, .write_b = esdhc_writeb,
.set_clock = esdhc_set_clock, .set_clock = esdhc_set_clock,
.enable_dma = esdhc_enable_dma, .enable_dma = esdhc_enable_dma,
.get_max_clock = esdhc_get_max_clock, .get_max_clock = esdhc_get_max_clock,

12
drivers/mmc/host/sdhci-of-hlwd.c
View file

@ -55,11 +55,11 @@ struct sdhci_of_data sdhci_hlwd = {
.quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
SDHCI_QUIRK_32BIT_DMA_SIZE, SDHCI_QUIRK_32BIT_DMA_SIZE,
.ops = { .ops = {
.readl = sdhci_be32bs_readl, .read_l = sdhci_be32bs_readl,
.readw = sdhci_be32bs_readw, .read_w = sdhci_be32bs_readw,
.readb = sdhci_be32bs_readb, .read_b = sdhci_be32bs_readb,
.writel = sdhci_hlwd_writel, .write_l = sdhci_hlwd_writel,
.writew = sdhci_hlwd_writew, .write_w = sdhci_hlwd_writew,
.writeb = sdhci_hlwd_writeb, .write_b = sdhci_hlwd_writeb,
}, },
}; };

36
drivers/mmc/host/sdhci.h
View file

@ -296,12 +296,12 @@ struct sdhci_host {
struct sdhci_ops { struct sdhci_ops {
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
u32 (*readl)(struct sdhci_host *host, int reg); u32 (*read_l)(struct sdhci_host *host, int reg);
u16 (*readw)(struct sdhci_host *host, int reg); u16 (*read_w)(struct sdhci_host *host, int reg);
u8 (*readb)(struct sdhci_host *host, int reg); u8 (*read_b)(struct sdhci_host *host, int reg);
void (*writel)(struct sdhci_host *host, u32 val, int reg); void (*write_l)(struct sdhci_host *host, u32 val, int reg);
void (*writew)(struct sdhci_host *host, u16 val, int reg); void (*write_w)(struct sdhci_host *host, u16 val, int reg);
void (*writeb)(struct sdhci_host *host, u8 val, int reg); void (*write_b)(struct sdhci_host *host, u8 val, int reg);
#endif #endif
void (*set_clock)(struct sdhci_host *host, unsigned int clock); void (*set_clock)(struct sdhci_host *host, unsigned int clock);
@ -316,48 +316,48 @@ struct sdhci_ops {
static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)
{ {
if (unlikely(host->ops->writel)) if (unlikely(host->ops->write_l))
host->ops->writel(host, val, reg); host->ops->write_l(host, val, reg);
else else
writel(val, host->ioaddr + reg); writel(val, host->ioaddr + reg);
} }
static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg)
{ {
if (unlikely(host->ops->writew)) if (unlikely(host->ops->write_w))
host->ops->writew(host, val, reg); host->ops->write_w(host, val, reg);
else else
writew(val, host->ioaddr + reg); writew(val, host->ioaddr + reg);
} }
static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg) static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
{ {
if (unlikely(host->ops->writeb)) if (unlikely(host->ops->write_b))
host->ops->writeb(host, val, reg); host->ops->write_b(host, val, reg);
else else
writeb(val, host->ioaddr + reg); writeb(val, host->ioaddr + reg);
} }
static inline u32 sdhci_readl(struct sdhci_host *host, int reg) static inline u32 sdhci_readl(struct sdhci_host *host, int reg)
{ {
if (unlikely(host->ops->readl)) if (unlikely(host->ops->read_l))
return host->ops->readl(host, reg); return host->ops->read_l(host, reg);
else else
return readl(host->ioaddr + reg); return readl(host->ioaddr + reg);
} }
static inline u16 sdhci_readw(struct sdhci_host *host, int reg) static inline u16 sdhci_readw(struct sdhci_host *host, int reg)
{ {
if (unlikely(host->ops->readw)) if (unlikely(host->ops->read_w))
return host->ops->readw(host, reg); return host->ops->read_w(host, reg);
else else
return readw(host->ioaddr + reg); return readw(host->ioaddr + reg);
} }
static inline u8 sdhci_readb(struct sdhci_host *host, int reg) static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
{ {
if (unlikely(host->ops->readb)) if (unlikely(host->ops->read_b))
return host->ops->readb(host, reg); return host->ops->read_b(host, reg);
else else
return readb(host->ioaddr + reg); return readb(host->ioaddr + reg);
} }