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drm/amd/pm: share the code around SMU13 pcie parameters update
So that SMU13.0.0 and SMU13.0.7 do not need to have one copy each. Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.1.x
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8a774fe912
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4 changed files with 37 additions and 64 deletions
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@ -295,5 +295,9 @@ int smu_v13_0_get_pptable_from_firmware(struct smu_context *smu,
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uint32_t *size,
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uint32_t pptable_id);
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int smu_v13_0_update_pcie_parameters(struct smu_context *smu,
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uint32_t pcie_gen_cap,
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uint32_t pcie_width_cap);
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#endif
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#endif
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@ -2424,3 +2424,34 @@ int smu_v13_0_mode1_reset(struct smu_context *smu)
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return ret;
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}
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int smu_v13_0_update_pcie_parameters(struct smu_context *smu,
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uint32_t pcie_gen_cap,
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uint32_t pcie_width_cap)
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{
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struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
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struct smu_13_0_pcie_table *pcie_table =
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&dpm_context->dpm_tables.pcie_table;
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uint32_t smu_pcie_arg;
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int ret, i;
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for (i = 0; i < pcie_table->num_of_link_levels; i++) {
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if (pcie_table->pcie_gen[i] > pcie_gen_cap)
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pcie_table->pcie_gen[i] = pcie_gen_cap;
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if (pcie_table->pcie_lane[i] > pcie_width_cap)
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pcie_table->pcie_lane[i] = pcie_width_cap;
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smu_pcie_arg = i << 16;
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smu_pcie_arg |= pcie_table->pcie_gen[i] << 8;
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smu_pcie_arg |= pcie_table->pcie_lane[i];
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ret = smu_cmn_send_smc_msg_with_param(smu,
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SMU_MSG_OverridePcieParameters,
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smu_pcie_arg,
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NULL);
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if (ret)
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return ret;
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}
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return 0;
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}
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@ -1645,37 +1645,6 @@ static int smu_v13_0_0_force_clk_levels(struct smu_context *smu,
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return ret;
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}
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static int smu_v13_0_0_update_pcie_parameters(struct smu_context *smu,
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uint32_t pcie_gen_cap,
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uint32_t pcie_width_cap)
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{
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struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
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struct smu_13_0_pcie_table *pcie_table =
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&dpm_context->dpm_tables.pcie_table;
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uint32_t smu_pcie_arg;
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int ret, i;
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for (i = 0; i < pcie_table->num_of_link_levels; i++) {
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if (pcie_table->pcie_gen[i] > pcie_gen_cap)
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pcie_table->pcie_gen[i] = pcie_gen_cap;
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if (pcie_table->pcie_lane[i] > pcie_width_cap)
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pcie_table->pcie_lane[i] = pcie_width_cap;
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smu_pcie_arg = i << 16;
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smu_pcie_arg |= pcie_table->pcie_gen[i] << 8;
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smu_pcie_arg |= pcie_table->pcie_lane[i];
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ret = smu_cmn_send_smc_msg_with_param(smu,
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SMU_MSG_OverridePcieParameters,
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smu_pcie_arg,
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NULL);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct smu_temperature_range smu13_thermal_policy[] = {
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{-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000},
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{ 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000},
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@ -2654,7 +2623,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
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.feature_is_enabled = smu_cmn_feature_is_enabled,
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.print_clk_levels = smu_v13_0_0_print_clk_levels,
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.force_clk_levels = smu_v13_0_0_force_clk_levels,
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.update_pcie_parameters = smu_v13_0_0_update_pcie_parameters,
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.update_pcie_parameters = smu_v13_0_update_pcie_parameters,
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.get_thermal_temperature_range = smu_v13_0_0_get_thermal_temperature_range,
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.register_irq_handler = smu_v13_0_register_irq_handler,
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.enable_thermal_alert = smu_v13_0_enable_thermal_alert,
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@ -1635,37 +1635,6 @@ static int smu_v13_0_7_force_clk_levels(struct smu_context *smu,
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return ret;
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}
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static int smu_v13_0_7_update_pcie_parameters(struct smu_context *smu,
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uint32_t pcie_gen_cap,
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uint32_t pcie_width_cap)
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{
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struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
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struct smu_13_0_pcie_table *pcie_table =
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&dpm_context->dpm_tables.pcie_table;
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uint32_t smu_pcie_arg;
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int ret, i;
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for (i = 0; i < pcie_table->num_of_link_levels; i++) {
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if (pcie_table->pcie_gen[i] > pcie_gen_cap)
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pcie_table->pcie_gen[i] = pcie_gen_cap;
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if (pcie_table->pcie_lane[i] > pcie_width_cap)
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pcie_table->pcie_lane[i] = pcie_width_cap;
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smu_pcie_arg = i << 16;
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smu_pcie_arg |= pcie_table->pcie_gen[i] << 8;
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smu_pcie_arg |= pcie_table->pcie_lane[i];
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ret = smu_cmn_send_smc_msg_with_param(smu,
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SMU_MSG_OverridePcieParameters,
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smu_pcie_arg,
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NULL);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct smu_temperature_range smu13_thermal_policy[] =
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{
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{-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000},
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@ -2234,7 +2203,7 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
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.feature_is_enabled = smu_cmn_feature_is_enabled,
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.print_clk_levels = smu_v13_0_7_print_clk_levels,
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.force_clk_levels = smu_v13_0_7_force_clk_levels,
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.update_pcie_parameters = smu_v13_0_7_update_pcie_parameters,
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.update_pcie_parameters = smu_v13_0_update_pcie_parameters,
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.get_thermal_temperature_range = smu_v13_0_7_get_thermal_temperature_range,
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.register_irq_handler = smu_v13_0_register_irq_handler,
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.enable_thermal_alert = smu_v13_0_enable_thermal_alert,
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