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sh-pfc: Don't define the per-device pinctrl struct instances as global
The pinctrl_desc and pinctrl_gpio_range structures registered with the pinctrl core are per-device instances. Move them to the dynamically allocated sh_pfc_pinctrl structure and initialize them at runtime. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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parent
fe330ce8e1
commit
dcc427e1a8
1 changed files with 18 additions and 22 deletions
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@ -27,6 +27,9 @@
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struct sh_pfc_pinctrl {
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struct pinctrl_dev *pctl;
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struct pinctrl_desc pctl_desc;
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struct pinctrl_gpio_range range;
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struct sh_pfc *pfc;
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struct pinmux_gpio **functions;
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@ -314,19 +317,6 @@ static const struct pinconf_ops sh_pfc_pinconf_ops = {
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.pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
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};
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static struct pinctrl_gpio_range sh_pfc_gpio_range = {
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.name = DRV_NAME,
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.id = 0,
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};
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static struct pinctrl_desc sh_pfc_pinctrl_desc = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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.pctlops = &sh_pfc_pinctrl_ops,
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.pmxops = &sh_pfc_pinmux_ops,
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.confops = &sh_pfc_pinconf_ops,
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};
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static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx,
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struct pinmux_gpio *gpio, unsigned offset)
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{
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@ -386,9 +376,6 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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spin_unlock_irqrestore(&pfc->lock, flags);
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sh_pfc_pinctrl_desc.pins = pmx->pads;
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sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
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return 0;
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}
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@ -438,16 +425,25 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
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if (unlikely(ret != 0))
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return ret;
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pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, pfc->dev, pmx);
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pmx->pctl_desc.name = DRV_NAME;
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pmx->pctl_desc.owner = THIS_MODULE;
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pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
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pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
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pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
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pmx->pctl_desc.pins = pmx->pads;
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pmx->pctl_desc.npins = pmx->nr_pads;
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pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
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if (IS_ERR(pmx->pctl))
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return PTR_ERR(pmx->pctl);
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sh_pfc_gpio_range.npins = pfc->info->last_gpio
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- pfc->info->first_gpio + 1;
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sh_pfc_gpio_range.base = pfc->info->first_gpio;
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sh_pfc_gpio_range.pin_base = pfc->info->first_gpio;
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pmx->range.name = DRV_NAME,
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pmx->range.id = 0;
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pmx->range.npins = pfc->info->last_gpio - pfc->info->first_gpio + 1;
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pmx->range.base = pfc->info->first_gpio;
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pmx->range.pin_base = pfc->info->first_gpio;
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pinctrl_add_gpio_range(pmx->pctl, &sh_pfc_gpio_range);
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pinctrl_add_gpio_range(pmx->pctl, &pmx->range);
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return 0;
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}
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